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From: "Chang S. Bae" <chang.seok.bae@intel.com>
To: dave.hansen@linux.intel.com, x86@kernel.org, tglx@linutronix.de,
	mingo@redhat.com, bp@alien8.de
Cc: hpa@zytor.com, corbet@lwn.net, bagasdotme@gmail.com,
	tony.luck@intel.com, yang.zhong@intel.com,
	linux-doc@vger.kernel.org, linux-man@vger.kernel.org,
	linux-kernel@vger.kernel.org, chang.seok.bae@intel.com
Subject: [PATCH v5 RESEND 1/4] Documentation/x86: Explain the purpose for dynamic features
Date: Fri, 20 Jan 2023 16:18:57 -0800	[thread overview]
Message-ID: <20230121001900.14900-2-chang.seok.bae@intel.com> (raw)
In-Reply-To: <20230121001900.14900-1-chang.seok.bae@intel.com>

This summary will help to guide the proper use of the enabling model.

Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Cc: x86@kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-doc@vger.kernel.org
---
Changes from v4:
* Re-write about the sigaltstack sizing (Dave Hansen).
* Drop the second point as the case is not clear yet.

Changes from v3:
* Add as a new patch (Tony Luck).
---
 Documentation/x86/xstate.rst | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/Documentation/x86/xstate.rst b/Documentation/x86/xstate.rst
index 5cec7fb558d6..e954e79af4ce 100644
--- a/Documentation/x86/xstate.rst
+++ b/Documentation/x86/xstate.rst
@@ -11,6 +11,22 @@ are enabled by XCR0 as well, but the first use of related instruction is
 trapped by the kernel because by default the required large XSTATE buffers
 are not allocated automatically.
 
+The purpose for dynamic features
+--------------------------------
+
+Legacy userspace libraries often have hard-coded, static sizes for
+alternate signal stacks, often using MINSIGSTKSZ which is typically 2KB.
+That stack must be able to store at *least* the signal frame that the
+kernel sets up before jumping into the signal handler. That signal frame
+must include an XSAVE buffer defined by the CPU.
+
+However, that means that the size of signal stacks is dynamic, not static,
+because different CPUs have differently-sized XSAVE buffers. A compiled-in
+size of 2KB with existing applications is too small for new CPU features
+like AMX. Instead of universally requiring larger stack, with the dynamic
+enabling, the kernel can enforce userspace applications to have
+properly-sized altstacks.
+
 Using dynamically enabled XSTATE features in user space applications
 --------------------------------------------------------------------
 
-- 
2.17.1


  reply	other threads:[~2023-01-21  0:31 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-22 19:58 [PATCH v5 0/4] Documentation/x86: Improve the AMX documentation Chang S. Bae
2022-09-22 19:58 ` [PATCH v5 1/4] Documentation/x86: Explain the purpose for dynamic features Chang S. Bae
2022-09-22 19:58 ` [PATCH v5 2/4] x86/arch_prctl: Add AMX feature numbers as ABI constants Chang S. Bae
2022-09-22 19:58 ` [PATCH v5 3/4] Documentation/x86: Add the AMX enabling example Chang S. Bae
2022-09-22 19:58 ` [PATCH v5 4/4] Documentation/x86: Explain the state component permission for guests Chang S. Bae
2023-01-21  0:18 ` [PATCH v5 RESEND 0/4] Documentation/x86: Improve the AMX documentation Chang S. Bae
2023-01-21  0:18   ` Chang S. Bae [this message]
2023-01-21  0:18   ` [PATCH v5 RESEND 2/4] x86/arch_prctl: Add AMX feature numbers as ABI constants Chang S. Bae
2023-01-21  0:18   ` [PATCH v5 RESEND 3/4] Documentation/x86: Add the AMX enabling example Chang S. Bae
2023-01-21  0:19   ` [PATCH v5 RESEND 4/4] Documentation/x86: Explain the state component permission for guests Chang S. Bae

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