From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D0840C27C76 for ; Wed, 25 Jan 2023 22:27:58 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id AD10685666; Wed, 25 Jan 2023 23:27:55 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=edgeble.ai Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=edgeble-ai.20210112.gappssmtp.com header.i=@edgeble-ai.20210112.gappssmtp.com header.b="YIIQ0OMB"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 8CF208546F; Wed, 25 Jan 2023 23:27:53 +0100 (CET) Received: from mail-pf1-x430.google.com (mail-pf1-x430.google.com [IPv6:2607:f8b0:4864:20::430]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 2B8D88546F for ; Wed, 25 Jan 2023 23:27:50 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=edgeble.ai Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=jagan@edgeble.ai Received: by mail-pf1-x430.google.com with SMTP id f11so48384pfc.1 for ; Wed, 25 Jan 2023 14:27:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=edgeble-ai.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=dtiO2StxVLZ7CH4SujCiWj+jsq79qsCKuUbi7aeBiCY=; b=YIIQ0OMBu3YG3iKS2WbaovQJR5EHCm1sZmNikYphR3jHwp276npIw8zttgxaknbKcg yANwD2EsXlT1JPXxY5UOmxA86EE2uBRz+X/4HpFENHS1vLfYfnrT8LTu5EmN6t+oZJMI qF6j+4Tgl+i0pgz5gpyCxnFyAqg16VkVTs54rFU8xaIfNwlq6ZxpQrF55/RP7lZUQkV2 ookPCc/DSLNW8GIT3wIVK/0omz3++f1754mSf/IjB6j2OOANGYIEF7uWkahzkUiJ5/Hp BqIp90SowH+RB/l362YZP6sj7z5haGc9Yct5mUdRWIgBrRHhIHLP3BtuWRpcZIHYkRtw 1XAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=dtiO2StxVLZ7CH4SujCiWj+jsq79qsCKuUbi7aeBiCY=; b=SCgJS7WtMavo0XzMUhXhZK9L7MZfqaUr5C1Lgfewa1NR09caRcyA/7OcC1wdxHFUEu CEiBOIyqOZ91sxFiVdi5bNcwG7pdTXZUWAPsCXQK3yS1YQ9KIYdiVP9YlEISkt2V+uzc iju36zF+1KkbMxU7JAEbwZibrtPmycLIfFL6MkBhUkOlhKDaXP9JbsSHPKp8bmTim0yV PLRhSCMqNCaQ4kbAGTnioiPj25QapCaSRlkaGlLhR6KlsSlhm1w02ytykv61ohJI9IEb j+OTrEdHMOSNqKE9IHm9HAwwnVPy7RQG/6j3VZYfXXrEDsdzBXIPCUIsEzwEB/ydAPNL t5MA== X-Gm-Message-State: AFqh2kqyqxP1IzkEeDP6/M7HcCnk2wJYg9+7AQ1/p5J1juu2j3eoxRyf iJK9GDb4E9FUN5l8hntsI2fcXA== X-Google-Smtp-Source: AMrXdXt7zlZswT3fCszIMqRA0oW4LMc15LBDXmMZLDgPeRdD/TgaUiuBRMVwsbLftvl9tq70Fk6Rlw== X-Received: by 2002:a62:5bc1:0:b0:58d:ac19:8950 with SMTP id p184-20020a625bc1000000b0058dac198950mr37347907pfb.33.1674685668329; Wed, 25 Jan 2023 14:27:48 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a238:3cb1:2156:ef87:8af5]) by smtp.gmail.com with ESMTPSA id u26-20020a62d45a000000b0058bb0b8750csm4134647pfl.88.2023.01.25.14.27.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 25 Jan 2023 14:27:48 -0800 (PST) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich , fatorangecat@189.cn Cc: u-boot@lists.denx.de, Jagan Teki Subject: [RFC PATCH 00/16] arm: Add Rockchip RK3588 support Date: Thu, 26 Jan 2023 03:57:25 +0530 Message-Id: <20230125222741.303259-1-jagan@edgeble.ai> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean This series support Rockchip RK3588. All the device tree files are synced from linux-next with the proper SHA1 mentioned in the commit messages. Unfortunately, the BL31 from rkbin is not compatible with U-Boot so it is failing to load ATF entry from SPL and hang. Verified below BL31 versions, bl31-v1.15 bl31-v1.21 bl31-v1.22 bl31-v1.23 bl31-v1.24 bl31-v1.25 bl31-v1.26 Rever-engineered with respect to rockchip u-boot by using the same FIT_GENERATOR being used in Mainline, rockchip u-boot is booting but mainline showing the same issue. Log: LPDDR4X, 2112MHz01-00642-g6bdfd31756-dirty (Jan 26 2023 ���3:44:34 +0530) channel[0] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=8 Size=4096MB channel[1] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=8 Size=4096MB channel[2] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=8 Size=4096MB channel[3] BW=16 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=8 Size=4096MB change to F1: 528MHz change to F2: 1068MHz change to F3: 1560MHz change to F0: 2112MHz out U-Boot SPL 2023.01-00642-g6bdfd31756-dirty (Jan 26 2023 - 03:44:34 +0530) Trying to boot from MMC1 bl31_entry: atf_entry start << hang >> Any information on BL31 for RK3588 please share. Any inputs? Jagan. Jagan Teki (16): rockchip: mkimage: Add rk3588 support arm: rockchip: Add cru header for rk3588 arm: rockchip: Add grf header for rk3588 dt-bindings: clk: Add dt-binding header for RK3588 clk: rockchip: Add rk3588 clk support clk: rockchip: pll: Add pll_rk3588 type for rk3588 ram: rockchip: Add rk3588 ddr driver support dt-bindings: power: Add power-domain header for rk3588 dt-bindings: reset: add rk3588 reset definitions arm: rockchip: Add ioc header for rk3588 arm64: dts: rockchip: Add base DT for rk3588 SoC arm64: dts: rockchip: rk3588: Add Edgeble Neu6 Model A SoM arm64: dts: rockchip: rk3588: Add Edgeble Neu6 Model A IO arm: rockchip: Add RK3588 arch core support ARM: dts: rockchip: Add rk3588-u-boot.dtsi board: rockchip: Add Edgeble Neural Compute Module 6 arch/arm/dts/Makefile | 3 + .../dts/rk3588-edgeble-neu6a-io-u-boot.dtsi | 23 + arch/arm/dts/rk3588-edgeble-neu6a-io.dts | 27 + arch/arm/dts/rk3588-edgeble-neu6a.dtsi | 32 + arch/arm/dts/rk3588-pinctrl.dtsi | 516 +++ arch/arm/dts/rk3588-u-boot.dtsi | 101 + arch/arm/dts/rk3588.dtsi | 58 + arch/arm/dts/rk3588s-pinctrl.dtsi | 3403 +++++++++++++++++ arch/arm/dts/rk3588s.dtsi | 1703 +++++++++ arch/arm/include/asm/arch-rk3588/boot0.h | 11 + arch/arm/include/asm/arch-rk3588/gpio.h | 11 + arch/arm/include/asm/arch-rockchip/clock.h | 24 + .../include/asm/arch-rockchip/cru_rk3588.h | 451 +++ .../include/asm/arch-rockchip/grf_rk3588.h | 35 + .../include/asm/arch-rockchip/ioc_rk3588.h | 102 + arch/arm/mach-rockchip/Kconfig | 20 + arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/rk3588/Kconfig | 30 + arch/arm/mach-rockchip/rk3588/Makefile | 9 + arch/arm/mach-rockchip/rk3588/clk_rk3588.c | 33 + arch/arm/mach-rockchip/rk3588/rk3588.c | 162 + arch/arm/mach-rockchip/rk3588/syscon_rk3588.c | 32 + board/edgeble/neural-compute-module-6/Kconfig | 15 + .../neural-compute-module-6/MAINTAINERS | 6 + .../edgeble/neural-compute-module-6/Makefile | 7 + board/edgeble/neural-compute-module-6/neu6.c | 4 + configs/neu6a-io-rk3588_defconfig | 68 + doc/board/rockchip/rockchip.rst | 2 + drivers/clk/rockchip/Makefile | 1 + drivers/clk/rockchip/clk_pll.c | 267 +- drivers/clk/rockchip/clk_rk3588.c | 2019 ++++++++++ drivers/ram/rockchip/Makefile | 1 + drivers/ram/rockchip/sdram_rk3588.c | 56 + include/configs/neural-compute-module-6.h | 15 + include/configs/rk3588_common.h | 32 + .../dt-bindings/clock/rockchip,rk3588-cru.h | 766 ++++ include/dt-bindings/power/rk3588-power.h | 69 + .../dt-bindings/reset/rockchip,rk3588-cru.h | 754 ++++ tools/rkcommon.c | 1 + 39 files changed, 10867 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi create mode 100644 arch/arm/dts/rk3588-edgeble-neu6a-io.dts create mode 100644 arch/arm/dts/rk3588-edgeble-neu6a.dtsi create mode 100644 arch/arm/dts/rk3588-pinctrl.dtsi create mode 100644 arch/arm/dts/rk3588-u-boot.dtsi create mode 100644 arch/arm/dts/rk3588.dtsi create mode 100644 arch/arm/dts/rk3588s-pinctrl.dtsi create mode 100644 arch/arm/dts/rk3588s.dtsi create mode 100644 arch/arm/include/asm/arch-rk3588/boot0.h create mode 100644 arch/arm/include/asm/arch-rk3588/gpio.h create mode 100644 arch/arm/include/asm/arch-rockchip/cru_rk3588.h create mode 100644 arch/arm/include/asm/arch-rockchip/grf_rk3588.h create mode 100644 arch/arm/include/asm/arch-rockchip/ioc_rk3588.h create mode 100644 arch/arm/mach-rockchip/rk3588/Kconfig create mode 100644 arch/arm/mach-rockchip/rk3588/Makefile create mode 100644 arch/arm/mach-rockchip/rk3588/clk_rk3588.c create mode 100644 arch/arm/mach-rockchip/rk3588/rk3588.c create mode 100644 arch/arm/mach-rockchip/rk3588/syscon_rk3588.c create mode 100644 board/edgeble/neural-compute-module-6/Kconfig create mode 100644 board/edgeble/neural-compute-module-6/MAINTAINERS create mode 100644 board/edgeble/neural-compute-module-6/Makefile create mode 100644 board/edgeble/neural-compute-module-6/neu6.c create mode 100644 configs/neu6a-io-rk3588_defconfig create mode 100644 drivers/clk/rockchip/clk_rk3588.c create mode 100644 drivers/ram/rockchip/sdram_rk3588.c create mode 100644 include/configs/neural-compute-module-6.h create mode 100644 include/configs/rk3588_common.h create mode 100644 include/dt-bindings/clock/rockchip,rk3588-cru.h create mode 100644 include/dt-bindings/power/rk3588-power.h create mode 100644 include/dt-bindings/reset/rockchip,rk3588-cru.h -- 2.25.1