[PATCH 0/7] soc: qcom: add UCSI function to PMIC GLINK

[PATCH 0/7] soc: qcom: add UCSI function to PMIC GLINK

[Neil Armstrong]

The PMIC GLINK interface offers an UCSI endpoint for newer
SoCs, the UCSI exchange is necessary to configure the USB-C
port USB role and altmode on the SM8450 HDK and SM8550 MTP
boards.

This patchset focuses on USB and disables altmode support
on those 2 SoCs until DP altmode over the combo phy is
supported.

Depends on PMIC Glink patchset at [1].

[1] https://lore.kernel.org/all/20230130042003.577063-1-quic_bjorande@quicinc.com/

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
Neil Armstrong (7):
      usb: typec: ucsi: add PMIC Glink UCSI driver
      dt-bindings: soc: qcom: qcom,pmic-glink: document SM8450 compatible
      dt-bindings: soc: qcom: qcom,pmic-glink: document SM8550 compatible
      soc: qcom: pmic_glink: register ucsi aux device
      arm64: dts: qcom: sm8450-hdk: add pmic glink node
      arm64: dts: qcom: sm8550-mtp: add pmic glink node
      arm64: defconfig: add PMIC GLINK modules

 .../bindings/soc/qcom/qcom,pmic-glink.yaml         |   2 +
 arch/arm64/boot/dts/qcom/sm8450-hdk.dts            |  34 ++-
 arch/arm64/boot/dts/qcom/sm8550-mtp.dts            |  34 ++-
 arch/arm64/configs/defconfig                       |   4 +
 drivers/soc/qcom/pmic_glink.c                      |  67 ++++-
 drivers/usb/typec/ucsi/Kconfig                     |   7 +
 drivers/usb/typec/ucsi/Makefile                    |   1 +
 drivers/usb/typec/ucsi/ucsi_glink.c                | 321 +++++++++++++++++++++
 8 files changed, 458 insertions(+), 12 deletions(-)
---
base-commit: 56779300f3ce6229a3d02e41e4ce36047d8891ac
change-id: 20230130-topic-sm8450-upstream-pmic-glink-3b3a0b7bcd33

Best regards,
-- 
Neil Armstrong <neil.armstrong@linaro.org>

[PATCH 0/7] soc: qcom: add UCSI function to PMIC GLINK

[Neil Armstrong]

The PMIC GLINK interface offers an UCSI endpoint for newer
SoCs, the UCSI exchange is necessary to configure the USB-C
port USB role and altmode on the SM8450 HDK and SM8550 MTP
boards.

This patchset focuses on USB and disables altmode support
on those 2 SoCs until DP altmode over the combo phy is
supported.

Depends on PMIC Glink patchset at [1].

[1] https://lore.kernel.org/all/20230130042003.577063-1-quic_bjorande@quicinc.com/

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
Neil Armstrong (7):
      usb: typec: ucsi: add PMIC Glink UCSI driver
      dt-bindings: soc: qcom: qcom,pmic-glink: document SM8450 compatible
      dt-bindings: soc: qcom: qcom,pmic-glink: document SM8550 compatible
      soc: qcom: pmic_glink: register ucsi aux device
      arm64: dts: qcom: sm8450-hdk: add pmic glink node
      arm64: dts: qcom: sm8550-mtp: add pmic glink node
      arm64: defconfig: add PMIC GLINK modules

 .../bindings/soc/qcom/qcom,pmic-glink.yaml         |   2 +
 arch/arm64/boot/dts/qcom/sm8450-hdk.dts            |  34 ++-
 arch/arm64/boot/dts/qcom/sm8550-mtp.dts            |  34 ++-
 arch/arm64/configs/defconfig                       |   4 +
 drivers/soc/qcom/pmic_glink.c                      |  67 ++++-
 drivers/usb/typec/ucsi/Kconfig                     |   7 +
 drivers/usb/typec/ucsi/Makefile                    |   1 +
 drivers/usb/typec/ucsi/ucsi_glink.c                | 321 +++++++++++++++++++++
 8 files changed, 458 insertions(+), 12 deletions(-)
---
base-commit: 56779300f3ce6229a3d02e41e4ce36047d8891ac
change-id: 20230130-topic-sm8450-upstream-pmic-glink-3b3a0b7bcd33

Best regards,
-- 
Neil Armstrong <neil.armstrong@linaro.org>


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 1/7] usb: typec: ucsi: add PMIC Glink UCSI driver

[Neil Armstrong]

Introduce the UCSI PMIC Glink aux driver that communicates
with the aDSP firmware with the UCSI protocol which handles
the USB-C Port(s) Power Delivery.

The UCSI messaging is necessary on newer Qualcomm SoCs to
provide USB role switch and altmode notifications.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 drivers/usb/typec/ucsi/Kconfig      |   7 +
 drivers/usb/typec/ucsi/Makefile     |   1 +
 drivers/usb/typec/ucsi/ucsi_glink.c | 321 ++++++++++++++++++++++++++++++++++++
 3 files changed, 329 insertions(+)

diff --git a/drivers/usb/typec/ucsi/Kconfig b/drivers/usb/typec/ucsi/Kconfig
index 8f9c4b9f31f7..dee6069e46a2 100644
--- a/drivers/usb/typec/ucsi/Kconfig
+++ b/drivers/usb/typec/ucsi/Kconfig
@@ -58,4 +58,11 @@ config UCSI_STM32G0
 	  To compile the driver as a module, choose M here: the module will be
 	  called ucsi_stm32g0.
 
+config UCSI_PMIC_GLINK
+	tristate "UCSI Qualcomm PMIC GLINK Interface Driver"
+	depends on QCOM_PMIC_GLINK
+	help
+	  This driver enables UCSI support on platforms that expose UCSI
+	  interface as PMIC GLINK device.
+
 endif
diff --git a/drivers/usb/typec/ucsi/Makefile b/drivers/usb/typec/ucsi/Makefile
index 480d533d762f..77f09e136956 100644
--- a/drivers/usb/typec/ucsi/Makefile
+++ b/drivers/usb/typec/ucsi/Makefile
@@ -18,3 +18,4 @@ endif
 obj-$(CONFIG_UCSI_ACPI)			+= ucsi_acpi.o
 obj-$(CONFIG_UCSI_CCG)			+= ucsi_ccg.o
 obj-$(CONFIG_UCSI_STM32G0)		+= ucsi_stm32g0.o
+obj-$(CONFIG_UCSI_PMIC_GLINK)		+= ucsi_glink.o
diff --git a/drivers/usb/typec/ucsi/ucsi_glink.c b/drivers/usb/typec/ucsi/ucsi_glink.c
new file mode 100644
index 000000000000..824ed6620de7
--- /dev/null
+++ b/drivers/usb/typec/ucsi/ucsi_glink.c
@@ -0,0 +1,321 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022-2023, Linaro Ltd
+ */
+#include <linux/auxiliary_bus.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/mutex.h>
+#include <linux/property.h>
+#include <linux/soc/qcom/pdr.h>
+#include <linux/soc/qcom/pmic_glink.h>
+#include "ucsi.h"
+
+#define UCSI_BUF_SIZE                   48
+
+#define MSG_TYPE_REQ_RESP               1
+#define UCSI_BUF_SIZE                   48
+
+#define UC_NOTIFY_RECEIVER_UCSI         0x0
+#define UC_UCSI_READ_BUF_REQ            0x11
+#define UC_UCSI_WRITE_BUF_REQ           0x12
+#define UC_UCSI_USBC_NOTIFY_IND         0x13
+
+struct ucsi_read_buf_req_msg {
+	struct pmic_glink_hdr   hdr;
+};
+
+struct ucsi_read_buf_resp_msg {
+	struct pmic_glink_hdr   hdr;
+	u8                      buf[UCSI_BUF_SIZE];
+	u32                     ret_code;
+};
+
+struct ucsi_write_buf_req_msg {
+	struct pmic_glink_hdr   hdr;
+	u8                      buf[UCSI_BUF_SIZE];
+	u32                     reserved;
+};
+
+struct ucsi_write_buf_resp_msg {
+	struct pmic_glink_hdr   hdr;
+	u32                     ret_code;
+};
+
+struct ucsi_notify_ind_msg {
+	struct pmic_glink_hdr   hdr;
+	u32                     notification;
+	u32                     receiver;
+	u32                     reserved;
+};
+
+struct pmic_glink_ucsi {
+	struct device *dev;
+
+	struct pmic_glink_client *client;
+
+	struct ucsi *ucsi;
+	struct completion read_ack;
+	struct completion write_ack;
+	struct completion sync_ack;
+	bool sync_pending;
+	struct mutex lock;	/* protects concurrent access to PMIC Glink interface */
+
+	int sync_val;
+
+	struct work_struct notify_work;
+	struct work_struct register_work;
+
+	u8 read_buf[UCSI_BUF_SIZE];
+};
+
+static int pmic_glink_ucsi_read(struct ucsi *__ucsi, unsigned int offset,
+				void *val, size_t val_len)
+{
+	struct pmic_glink_ucsi *ucsi = ucsi_get_drvdata(__ucsi);
+	struct ucsi_read_buf_req_msg req = {};
+	unsigned long left;
+	int ret;
+
+	req.hdr.owner = PMIC_GLINK_OWNER_USBC;
+	req.hdr.type = MSG_TYPE_REQ_RESP;
+	req.hdr.opcode = UC_UCSI_READ_BUF_REQ;
+
+	mutex_lock(&ucsi->lock);
+	memset(ucsi->read_buf, 0, sizeof(ucsi->read_buf));
+	reinit_completion(&ucsi->read_ack);
+
+	ret = pmic_glink_send(ucsi->client, &req, sizeof(req));
+	if (ret < 0) {
+		dev_err(ucsi->dev, "failed to send UCSI read request: %d\n", ret);
+		goto out_unlock;
+	}
+
+	left = wait_for_completion_timeout(&ucsi->read_ack, 5 * HZ);
+	if (!left) {
+		dev_err(ucsi->dev, "timeout waiting for UCSI read response\n");
+		ret = -ETIMEDOUT;
+		goto out_unlock;
+	}
+
+	memcpy(val, &ucsi->read_buf[offset], val_len);
+	ret = 0;
+
+out_unlock:
+	mutex_unlock(&ucsi->lock);
+
+	return ret;
+}
+
+static int pmic_glink_ucsi_locked_write(struct pmic_glink_ucsi *ucsi, unsigned int offset,
+					const void *val, size_t val_len)
+{
+	struct ucsi_write_buf_req_msg req = {};
+	unsigned long left;
+	int ret;
+
+	req.hdr.owner = PMIC_GLINK_OWNER_USBC;
+	req.hdr.type = MSG_TYPE_REQ_RESP;
+	req.hdr.opcode = UC_UCSI_WRITE_BUF_REQ;
+	memcpy(&req.buf[offset], val, val_len);
+
+	reinit_completion(&ucsi->write_ack);
+
+	ret = pmic_glink_send(ucsi->client, &req, sizeof(req));
+	if (ret < 0) {
+		dev_err(ucsi->dev, "failed to send UCSI write request: %d\n", ret);
+		return ret;
+	}
+
+	left = wait_for_completion_timeout(&ucsi->write_ack, 5 * HZ);
+	if (!left) {
+		dev_err(ucsi->dev, "timeout waiting for UCSI write response\n");
+		return -ETIMEDOUT;
+	}
+
+	return 0;
+}
+
+static int pmic_glink_ucsi_async_write(struct ucsi *__ucsi, unsigned int offset,
+				       const void *val, size_t val_len)
+{
+	struct pmic_glink_ucsi *ucsi = ucsi_get_drvdata(__ucsi);
+	int ret;
+
+	mutex_lock(&ucsi->lock);
+	ret = pmic_glink_ucsi_locked_write(ucsi, offset, val, val_len);
+	mutex_unlock(&ucsi->lock);
+
+	return ret;
+}
+
+static int pmic_glink_ucsi_sync_write(struct ucsi *__ucsi, unsigned int offset,
+				      const void *val, size_t val_len)
+{
+	struct pmic_glink_ucsi *ucsi = ucsi_get_drvdata(__ucsi);
+	unsigned long left;
+	u64 command;
+	int ret;
+
+	/* TOFIX: Downstream forces recipient to CON when UCSI_GET_ALTERNATE_MODES command */
+
+	mutex_lock(&ucsi->lock);
+	ucsi->sync_val = 0;
+	reinit_completion(&ucsi->sync_ack);
+	ucsi->sync_pending = true;
+	ret = pmic_glink_ucsi_locked_write(ucsi, offset, val, val_len);
+	mutex_unlock(&ucsi->lock);
+
+	left = wait_for_completion_timeout(&ucsi->sync_ack, 5 * HZ);
+	if (!left) {
+		dev_err(ucsi->dev, "timeout waiting for UCSI sync write response\n");
+		ret = -ETIMEDOUT;
+	} else if (ucsi->sync_val) {
+		dev_err(ucsi->dev, "sync write returned: %d\n", ucsi->sync_val);
+	}
+
+	ucsi->sync_pending = false;
+
+	return ret;
+}
+
+static const struct ucsi_operations pmic_glink_ucsi_ops = {
+	.read = pmic_glink_ucsi_read,
+	.sync_write = pmic_glink_ucsi_sync_write,
+	.async_write = pmic_glink_ucsi_async_write
+};
+
+static void pmic_glink_ucsi_read_ack(struct pmic_glink_ucsi *ucsi, const void *data, int len)
+{
+	const struct ucsi_read_buf_resp_msg *resp = data;
+
+	if (resp->ret_code)
+		return;
+
+	memcpy(ucsi->read_buf, resp->buf, UCSI_BUF_SIZE);
+	complete(&ucsi->read_ack);
+}
+
+static void pmic_glink_ucsi_write_ack(struct pmic_glink_ucsi *ucsi, const void *data, int len)
+{
+	const struct ucsi_write_buf_resp_msg *resp = data;
+
+	if (resp->ret_code)
+		return;
+
+	ucsi->sync_val = resp->ret_code;
+	complete(&ucsi->write_ack);
+}
+
+static void pmic_glink_ucsi_notify(struct work_struct *work)
+{
+	struct pmic_glink_ucsi *ucsi = container_of(work, struct pmic_glink_ucsi, notify_work);
+	unsigned int con_num;
+	u32 cci;
+	int ret;
+
+	ret = pmic_glink_ucsi_read(ucsi->ucsi, UCSI_CCI, &cci, sizeof(cci));
+	if (ret) {
+		dev_err(ucsi->dev, "failed to read CCI on notification\n");
+		return;
+	}
+
+	con_num = UCSI_CCI_CONNECTOR(cci);
+	if (con_num)
+		ucsi_connector_change(ucsi->ucsi, con_num);
+
+	if (ucsi->sync_pending && cci & UCSI_CCI_BUSY) {
+		ucsi->sync_val = -EBUSY;
+		complete(&ucsi->sync_ack);
+	} else if (ucsi->sync_pending &&
+		   (cci & (UCSI_CCI_ACK_COMPLETE | UCSI_CCI_COMMAND_COMPLETE))) {
+		complete(&ucsi->sync_ack);
+	}
+}
+
+static void pmic_glink_ucsi_register(struct work_struct *work)
+{
+	struct pmic_glink_ucsi *ucsi = container_of(work, struct pmic_glink_ucsi, register_work);
+
+	ucsi_register(ucsi->ucsi);
+}
+
+static void pmic_glink_ucsi_callback(const void *data, size_t len, void *priv)
+{
+	struct pmic_glink_ucsi *ucsi = priv;
+	const struct pmic_glink_hdr *hdr = data;
+
+	switch (hdr->opcode) {
+	case UC_UCSI_READ_BUF_REQ:
+		pmic_glink_ucsi_read_ack(ucsi, data, len);
+		break;
+	case UC_UCSI_WRITE_BUF_REQ:
+		pmic_glink_ucsi_write_ack(ucsi, data, len);
+		break;
+	case UC_UCSI_USBC_NOTIFY_IND:
+		schedule_work(&ucsi->notify_work);
+		break;
+	};
+}
+
+static void pmic_glink_ucsi_pdr_notify(void *priv, int state)
+{
+	struct pmic_glink_ucsi *ucsi = priv;
+
+	if (state == SERVREG_SERVICE_STATE_UP)
+		schedule_work(&ucsi->register_work);
+	else if (state == SERVREG_SERVICE_STATE_DOWN)
+		ucsi_unregister(ucsi->ucsi);
+}
+
+static int pmic_glink_ucsi_probe(struct auxiliary_device *adev,
+				 const struct auxiliary_device_id *id)
+{
+	struct pmic_glink_ucsi *ucsi;
+	struct device *dev = &adev->dev;
+
+	ucsi = devm_kzalloc(dev, sizeof(*ucsi), GFP_KERNEL);
+	if (!ucsi)
+		return -ENOMEM;
+
+	ucsi->dev = dev;
+	dev_set_drvdata(dev, ucsi);
+
+	INIT_WORK(&ucsi->notify_work, pmic_glink_ucsi_notify);
+	INIT_WORK(&ucsi->register_work, pmic_glink_ucsi_register);
+	init_completion(&ucsi->read_ack);
+	init_completion(&ucsi->write_ack);
+	init_completion(&ucsi->sync_ack);
+	mutex_init(&ucsi->lock);
+
+	ucsi->ucsi = ucsi_create(dev, &pmic_glink_ucsi_ops);
+	if (IS_ERR(ucsi->ucsi))
+		return PTR_ERR(ucsi->ucsi);
+
+	ucsi_set_drvdata(ucsi->ucsi, ucsi);
+
+	ucsi->client = devm_pmic_glink_register_client(dev,
+						       PMIC_GLINK_OWNER_USBC,
+						       pmic_glink_ucsi_callback,
+						       pmic_glink_ucsi_pdr_notify,
+						       ucsi);
+	return PTR_ERR_OR_ZERO(ucsi->client);
+}
+
+static const struct auxiliary_device_id pmic_glink_ucsi_id_table[] = {
+	{ .name = "pmic_glink.ucsi", },
+	{},
+};
+MODULE_DEVICE_TABLE(auxiliary, pmic_glink_ucsi_id_table);
+
+static struct auxiliary_driver pmic_glink_ucsi_driver = {
+	.name = "pmic_glink_ucsi",
+	.probe = pmic_glink_ucsi_probe,
+	.id_table = pmic_glink_ucsi_id_table,
+};
+
+module_auxiliary_driver(pmic_glink_ucsi_driver);
+
+MODULE_DESCRIPTION("Qualcomm PMIC GLINK UCSI driver");
+MODULE_LICENSE("GPL");

-- 
2.34.1

[PATCH 1/7] usb: typec: ucsi: add PMIC Glink UCSI driver

[Neil Armstrong]

Introduce the UCSI PMIC Glink aux driver that communicates
with the aDSP firmware with the UCSI protocol which handles
the USB-C Port(s) Power Delivery.

The UCSI messaging is necessary on newer Qualcomm SoCs to
provide USB role switch and altmode notifications.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 drivers/usb/typec/ucsi/Kconfig      |   7 +
 drivers/usb/typec/ucsi/Makefile     |   1 +
 drivers/usb/typec/ucsi/ucsi_glink.c | 321 ++++++++++++++++++++++++++++++++++++
 3 files changed, 329 insertions(+)

diff --git a/drivers/usb/typec/ucsi/Kconfig b/drivers/usb/typec/ucsi/Kconfig
index 8f9c4b9f31f7..dee6069e46a2 100644
--- a/drivers/usb/typec/ucsi/Kconfig
+++ b/drivers/usb/typec/ucsi/Kconfig
@@ -58,4 +58,11 @@ config UCSI_STM32G0
 	  To compile the driver as a module, choose M here: the module will be
 	  called ucsi_stm32g0.
 
+config UCSI_PMIC_GLINK
+	tristate "UCSI Qualcomm PMIC GLINK Interface Driver"
+	depends on QCOM_PMIC_GLINK
+	help
+	  This driver enables UCSI support on platforms that expose UCSI
+	  interface as PMIC GLINK device.
+
 endif
diff --git a/drivers/usb/typec/ucsi/Makefile b/drivers/usb/typec/ucsi/Makefile
index 480d533d762f..77f09e136956 100644
--- a/drivers/usb/typec/ucsi/Makefile
+++ b/drivers/usb/typec/ucsi/Makefile
@@ -18,3 +18,4 @@ endif
 obj-$(CONFIG_UCSI_ACPI)			+= ucsi_acpi.o
 obj-$(CONFIG_UCSI_CCG)			+= ucsi_ccg.o
 obj-$(CONFIG_UCSI_STM32G0)		+= ucsi_stm32g0.o
+obj-$(CONFIG_UCSI_PMIC_GLINK)		+= ucsi_glink.o
diff --git a/drivers/usb/typec/ucsi/ucsi_glink.c b/drivers/usb/typec/ucsi/ucsi_glink.c
new file mode 100644
index 000000000000..824ed6620de7
--- /dev/null
+++ b/drivers/usb/typec/ucsi/ucsi_glink.c
@@ -0,0 +1,321 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022-2023, Linaro Ltd
+ */
+#include <linux/auxiliary_bus.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/mutex.h>
+#include <linux/property.h>
+#include <linux/soc/qcom/pdr.h>
+#include <linux/soc/qcom/pmic_glink.h>
+#include "ucsi.h"
+
+#define UCSI_BUF_SIZE                   48
+
+#define MSG_TYPE_REQ_RESP               1
+#define UCSI_BUF_SIZE                   48
+
+#define UC_NOTIFY_RECEIVER_UCSI         0x0
+#define UC_UCSI_READ_BUF_REQ            0x11
+#define UC_UCSI_WRITE_BUF_REQ           0x12
+#define UC_UCSI_USBC_NOTIFY_IND         0x13
+
+struct ucsi_read_buf_req_msg {
+	struct pmic_glink_hdr   hdr;
+};
+
+struct ucsi_read_buf_resp_msg {
+	struct pmic_glink_hdr   hdr;
+	u8                      buf[UCSI_BUF_SIZE];
+	u32                     ret_code;
+};
+
+struct ucsi_write_buf_req_msg {
+	struct pmic_glink_hdr   hdr;
+	u8                      buf[UCSI_BUF_SIZE];
+	u32                     reserved;
+};
+
+struct ucsi_write_buf_resp_msg {
+	struct pmic_glink_hdr   hdr;
+	u32                     ret_code;
+};
+
+struct ucsi_notify_ind_msg {
+	struct pmic_glink_hdr   hdr;
+	u32                     notification;
+	u32                     receiver;
+	u32                     reserved;
+};
+
+struct pmic_glink_ucsi {
+	struct device *dev;
+
+	struct pmic_glink_client *client;
+
+	struct ucsi *ucsi;
+	struct completion read_ack;
+	struct completion write_ack;
+	struct completion sync_ack;
+	bool sync_pending;
+	struct mutex lock;	/* protects concurrent access to PMIC Glink interface */
+
+	int sync_val;
+
+	struct work_struct notify_work;
+	struct work_struct register_work;
+
+	u8 read_buf[UCSI_BUF_SIZE];
+};
+
+static int pmic_glink_ucsi_read(struct ucsi *__ucsi, unsigned int offset,
+				void *val, size_t val_len)
+{
+	struct pmic_glink_ucsi *ucsi = ucsi_get_drvdata(__ucsi);
+	struct ucsi_read_buf_req_msg req = {};
+	unsigned long left;
+	int ret;
+
+	req.hdr.owner = PMIC_GLINK_OWNER_USBC;
+	req.hdr.type = MSG_TYPE_REQ_RESP;
+	req.hdr.opcode = UC_UCSI_READ_BUF_REQ;
+
+	mutex_lock(&ucsi->lock);
+	memset(ucsi->read_buf, 0, sizeof(ucsi->read_buf));
+	reinit_completion(&ucsi->read_ack);
+
+	ret = pmic_glink_send(ucsi->client, &req, sizeof(req));
+	if (ret < 0) {
+		dev_err(ucsi->dev, "failed to send UCSI read request: %d\n", ret);
+		goto out_unlock;
+	}
+
+	left = wait_for_completion_timeout(&ucsi->read_ack, 5 * HZ);
+	if (!left) {
+		dev_err(ucsi->dev, "timeout waiting for UCSI read response\n");
+		ret = -ETIMEDOUT;
+		goto out_unlock;
+	}
+
+	memcpy(val, &ucsi->read_buf[offset], val_len);
+	ret = 0;
+
+out_unlock:
+	mutex_unlock(&ucsi->lock);
+
+	return ret;
+}
+
+static int pmic_glink_ucsi_locked_write(struct pmic_glink_ucsi *ucsi, unsigned int offset,
+					const void *val, size_t val_len)
+{
+	struct ucsi_write_buf_req_msg req = {};
+	unsigned long left;
+	int ret;
+
+	req.hdr.owner = PMIC_GLINK_OWNER_USBC;
+	req.hdr.type = MSG_TYPE_REQ_RESP;
+	req.hdr.opcode = UC_UCSI_WRITE_BUF_REQ;
+	memcpy(&req.buf[offset], val, val_len);
+
+	reinit_completion(&ucsi->write_ack);
+
+	ret = pmic_glink_send(ucsi->client, &req, sizeof(req));
+	if (ret < 0) {
+		dev_err(ucsi->dev, "failed to send UCSI write request: %d\n", ret);
+		return ret;
+	}
+
+	left = wait_for_completion_timeout(&ucsi->write_ack, 5 * HZ);
+	if (!left) {
+		dev_err(ucsi->dev, "timeout waiting for UCSI write response\n");
+		return -ETIMEDOUT;
+	}
+
+	return 0;
+}
+
+static int pmic_glink_ucsi_async_write(struct ucsi *__ucsi, unsigned int offset,
+				       const void *val, size_t val_len)
+{
+	struct pmic_glink_ucsi *ucsi = ucsi_get_drvdata(__ucsi);
+	int ret;
+
+	mutex_lock(&ucsi->lock);
+	ret = pmic_glink_ucsi_locked_write(ucsi, offset, val, val_len);
+	mutex_unlock(&ucsi->lock);
+
+	return ret;
+}
+
+static int pmic_glink_ucsi_sync_write(struct ucsi *__ucsi, unsigned int offset,
+				      const void *val, size_t val_len)
+{
+	struct pmic_glink_ucsi *ucsi = ucsi_get_drvdata(__ucsi);
+	unsigned long left;
+	u64 command;
+	int ret;
+
+	/* TOFIX: Downstream forces recipient to CON when UCSI_GET_ALTERNATE_MODES command */
+
+	mutex_lock(&ucsi->lock);
+	ucsi->sync_val = 0;
+	reinit_completion(&ucsi->sync_ack);
+	ucsi->sync_pending = true;
+	ret = pmic_glink_ucsi_locked_write(ucsi, offset, val, val_len);
+	mutex_unlock(&ucsi->lock);
+
+	left = wait_for_completion_timeout(&ucsi->sync_ack, 5 * HZ);
+	if (!left) {
+		dev_err(ucsi->dev, "timeout waiting for UCSI sync write response\n");
+		ret = -ETIMEDOUT;
+	} else if (ucsi->sync_val) {
+		dev_err(ucsi->dev, "sync write returned: %d\n", ucsi->sync_val);
+	}
+
+	ucsi->sync_pending = false;
+
+	return ret;
+}
+
+static const struct ucsi_operations pmic_glink_ucsi_ops = {
+	.read = pmic_glink_ucsi_read,
+	.sync_write = pmic_glink_ucsi_sync_write,
+	.async_write = pmic_glink_ucsi_async_write
+};
+
+static void pmic_glink_ucsi_read_ack(struct pmic_glink_ucsi *ucsi, const void *data, int len)
+{
+	const struct ucsi_read_buf_resp_msg *resp = data;
+
+	if (resp->ret_code)
+		return;
+
+	memcpy(ucsi->read_buf, resp->buf, UCSI_BUF_SIZE);
+	complete(&ucsi->read_ack);
+}
+
+static void pmic_glink_ucsi_write_ack(struct pmic_glink_ucsi *ucsi, const void *data, int len)
+{
+	const struct ucsi_write_buf_resp_msg *resp = data;
+
+	if (resp->ret_code)
+		return;
+
+	ucsi->sync_val = resp->ret_code;
+	complete(&ucsi->write_ack);
+}
+
+static void pmic_glink_ucsi_notify(struct work_struct *work)
+{
+	struct pmic_glink_ucsi *ucsi = container_of(work, struct pmic_glink_ucsi, notify_work);
+	unsigned int con_num;
+	u32 cci;
+	int ret;
+
+	ret = pmic_glink_ucsi_read(ucsi->ucsi, UCSI_CCI, &cci, sizeof(cci));
+	if (ret) {
+		dev_err(ucsi->dev, "failed to read CCI on notification\n");
+		return;
+	}
+
+	con_num = UCSI_CCI_CONNECTOR(cci);
+	if (con_num)
+		ucsi_connector_change(ucsi->ucsi, con_num);
+
+	if (ucsi->sync_pending && cci & UCSI_CCI_BUSY) {
+		ucsi->sync_val = -EBUSY;
+		complete(&ucsi->sync_ack);
+	} else if (ucsi->sync_pending &&
+		   (cci & (UCSI_CCI_ACK_COMPLETE | UCSI_CCI_COMMAND_COMPLETE))) {
+		complete(&ucsi->sync_ack);
+	}
+}
+
+static void pmic_glink_ucsi_register(struct work_struct *work)
+{
+	struct pmic_glink_ucsi *ucsi = container_of(work, struct pmic_glink_ucsi, register_work);
+
+	ucsi_register(ucsi->ucsi);
+}
+
+static void pmic_glink_ucsi_callback(const void *data, size_t len, void *priv)
+{
+	struct pmic_glink_ucsi *ucsi = priv;
+	const struct pmic_glink_hdr *hdr = data;
+
+	switch (hdr->opcode) {
+	case UC_UCSI_READ_BUF_REQ:
+		pmic_glink_ucsi_read_ack(ucsi, data, len);
+		break;
+	case UC_UCSI_WRITE_BUF_REQ:
+		pmic_glink_ucsi_write_ack(ucsi, data, len);
+		break;
+	case UC_UCSI_USBC_NOTIFY_IND:
+		schedule_work(&ucsi->notify_work);
+		break;
+	};
+}
+
+static void pmic_glink_ucsi_pdr_notify(void *priv, int state)
+{
+	struct pmic_glink_ucsi *ucsi = priv;
+
+	if (state == SERVREG_SERVICE_STATE_UP)
+		schedule_work(&ucsi->register_work);
+	else if (state == SERVREG_SERVICE_STATE_DOWN)
+		ucsi_unregister(ucsi->ucsi);
+}
+
+static int pmic_glink_ucsi_probe(struct auxiliary_device *adev,
+				 const struct auxiliary_device_id *id)
+{
+	struct pmic_glink_ucsi *ucsi;
+	struct device *dev = &adev->dev;
+
+	ucsi = devm_kzalloc(dev, sizeof(*ucsi), GFP_KERNEL);
+	if (!ucsi)
+		return -ENOMEM;
+
+	ucsi->dev = dev;
+	dev_set_drvdata(dev, ucsi);
+
+	INIT_WORK(&ucsi->notify_work, pmic_glink_ucsi_notify);
+	INIT_WORK(&ucsi->register_work, pmic_glink_ucsi_register);
+	init_completion(&ucsi->read_ack);
+	init_completion(&ucsi->write_ack);
+	init_completion(&ucsi->sync_ack);
+	mutex_init(&ucsi->lock);
+
+	ucsi->ucsi = ucsi_create(dev, &pmic_glink_ucsi_ops);
+	if (IS_ERR(ucsi->ucsi))
+		return PTR_ERR(ucsi->ucsi);
+
+	ucsi_set_drvdata(ucsi->ucsi, ucsi);
+
+	ucsi->client = devm_pmic_glink_register_client(dev,
+						       PMIC_GLINK_OWNER_USBC,
+						       pmic_glink_ucsi_callback,
+						       pmic_glink_ucsi_pdr_notify,
+						       ucsi);
+	return PTR_ERR_OR_ZERO(ucsi->client);
+}
+
+static const struct auxiliary_device_id pmic_glink_ucsi_id_table[] = {
+	{ .name = "pmic_glink.ucsi", },
+	{},
+};
+MODULE_DEVICE_TABLE(auxiliary, pmic_glink_ucsi_id_table);
+
+static struct auxiliary_driver pmic_glink_ucsi_driver = {
+	.name = "pmic_glink_ucsi",
+	.probe = pmic_glink_ucsi_probe,
+	.id_table = pmic_glink_ucsi_id_table,
+};
+
+module_auxiliary_driver(pmic_glink_ucsi_driver);
+
+MODULE_DESCRIPTION("Qualcomm PMIC GLINK UCSI driver");
+MODULE_LICENSE("GPL");

-- 
2.34.1


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[PATCH 2/7] dt-bindings: soc: qcom: qcom,pmic-glink: document SM8450 compatible

[Neil Armstrong]

Document the SM8450 compatible used to describe the pmic glink
on this platform.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
index a79dd0ed9275..2dc11686c33e 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
@@ -25,6 +25,7 @@ properties:
           - qcom,sc8180x-pmic-glink
           - qcom,sc8280xp-pmic-glink
           - qcom,sm8350-pmic-glink
+          - qcom,sm8450-pmic-glink
       - const: qcom,pmic-glink
 
   '#address-cells':

-- 
2.34.1

[PATCH 2/7] dt-bindings: soc: qcom: qcom,pmic-glink: document SM8450 compatible

[Neil Armstrong]

Document the SM8450 compatible used to describe the pmic glink
on this platform.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
index a79dd0ed9275..2dc11686c33e 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
@@ -25,6 +25,7 @@ properties:
           - qcom,sc8180x-pmic-glink
           - qcom,sc8280xp-pmic-glink
           - qcom,sm8350-pmic-glink
+          - qcom,sm8450-pmic-glink
       - const: qcom,pmic-glink
 
   '#address-cells':

-- 
2.34.1


_______________________________________________
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[PATCH 3/7] dt-bindings: soc: qcom: qcom,pmic-glink: document SM8550 compatible

[Neil Armstrong]

Document the SM8550 compatible used to describe the pmic glink
on this platform.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
index 2dc11686c33e..59ac9db81733 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
@@ -26,6 +26,7 @@ properties:
           - qcom,sc8280xp-pmic-glink
           - qcom,sm8350-pmic-glink
           - qcom,sm8450-pmic-glink
+          - qcom,sm8550-pmic-glink
       - const: qcom,pmic-glink
 
   '#address-cells':

-- 
2.34.1

[PATCH 3/7] dt-bindings: soc: qcom: qcom,pmic-glink: document SM8550 compatible

[Neil Armstrong]

Document the SM8550 compatible used to describe the pmic glink
on this platform.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
index 2dc11686c33e..59ac9db81733 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
@@ -26,6 +26,7 @@ properties:
           - qcom,sc8280xp-pmic-glink
           - qcom,sm8350-pmic-glink
           - qcom,sm8450-pmic-glink
+          - qcom,sm8550-pmic-glink
       - const: qcom,pmic-glink
 
   '#address-cells':

-- 
2.34.1


_______________________________________________
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[PATCH 4/7] soc: qcom: pmic_glink: register ucsi aux device

[Neil Armstrong]

Only register UCSI on know working devices, like on the SM8450
or Sm8550 which requires UCSI to get USB mode switch events.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 drivers/soc/qcom/pmic_glink.c | 67 ++++++++++++++++++++++++++++++++++++-------
 1 file changed, 57 insertions(+), 10 deletions(-)

diff --git a/drivers/soc/qcom/pmic_glink.c b/drivers/soc/qcom/pmic_glink.c
index bb3fb57abcc6..c7f091f4a8c1 100644
--- a/drivers/soc/qcom/pmic_glink.c
+++ b/drivers/soc/qcom/pmic_glink.c
@@ -4,6 +4,7 @@
  * Copyright (c) 2022, Linaro Ltd
  */
 #include <linux/auxiliary_bus.h>
+#include <linux/of_device.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/rpmsg.h>
@@ -11,12 +12,23 @@
 #include <linux/soc/qcom/pdr.h>
 #include <linux/soc/qcom/pmic_glink.h>
 
+enum {
+	PMIC_GLINK_CLIENT_BATT = 0,
+	PMIC_GLINK_CLIENT_ALTMODE,
+	PMIC_GLINK_CLIENT_UCSI,
+};
+
+#define PMIC_GLINK_CLIENT_DEFAULT	(BIT(PMIC_GLINK_CLIENT_BATT) |	\
+					 BIT(PMIC_GLINK_CLIENT_ALTMODE))
+
 struct pmic_glink {
 	struct device *dev;
 	struct pdr_handle *pdr;
 
 	struct rpmsg_endpoint *ept;
 
+	unsigned int client_mask;
+
 	struct auxiliary_device altmode_aux;
 	struct auxiliary_device ps_aux;
 	struct auxiliary_device ucsi_aux;
@@ -231,8 +243,19 @@ static struct rpmsg_driver pmic_glink_rpmsg_driver = {
 	},
 };
 
+/* Do not handle altmode for now on those platforms */
+static const unsigned int pmic_glink_sm8450_client_mask = BIT(PMIC_GLINK_CLIENT_BATT) |
+							  BIT(PMIC_GLINK_CLIENT_UCSI);
+
+static const struct of_device_id pmic_glink_of_client_mask[] = {
+	{ .compatible = "qcom,sm8450-pmic-glink", .data = &pmic_glink_sm8450_client_mask },
+	{ .compatible = "qcom,sm8550-pmic-glink", .data = &pmic_glink_sm8450_client_mask },
+	{}
+};
+
 static int pmic_glink_probe(struct platform_device *pdev)
 {
+	const struct of_device_id *match;
 	struct pdr_service *service;
 	struct pmic_glink *pg;
 	int ret;
@@ -249,12 +272,27 @@ static int pmic_glink_probe(struct platform_device *pdev)
 	mutex_init(&pg->client_lock);
 	mutex_init(&pg->state_lock);
 
-	ret = pmic_glink_add_aux_device(pg, &pg->altmode_aux, "altmode");
-	if (ret)
-		return ret;
-	ret = pmic_glink_add_aux_device(pg, &pg->ps_aux, "power-supply");
-	if (ret)
-		goto out_release_altmode_aux;
+	match = of_match_device(pmic_glink_of_client_mask, &pdev->dev);
+	if (match)
+		pg->client_mask = *(const unsigned int *)match->data;
+	else
+		pg->client_mask = PMIC_GLINK_CLIENT_DEFAULT;
+
+	if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_UCSI)) {
+		ret = pmic_glink_add_aux_device(pg, &pg->ucsi_aux, "ucsi");
+		if (ret)
+			return ret;
+	}
+	if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_ALTMODE)) {
+		ret = pmic_glink_add_aux_device(pg, &pg->altmode_aux, "altmode");
+		if (ret)
+			goto out_release_ucsi_aux;
+	}
+	if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_BATT)) {
+		ret = pmic_glink_add_aux_device(pg, &pg->ps_aux, "power-supply");
+		if (ret)
+			goto out_release_altmode_aux;
+	}
 
 	pg->pdr = pdr_handle_alloc(pmic_glink_pdr_callback, pg);
 	if (IS_ERR(pg->pdr)) {
@@ -278,9 +316,14 @@ static int pmic_glink_probe(struct platform_device *pdev)
 out_release_pdr_handle:
 	pdr_handle_release(pg->pdr);
 out_release_aux_devices:
-	pmic_glink_del_aux_device(pg, &pg->ps_aux);
+	if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_BATT))
+		pmic_glink_del_aux_device(pg, &pg->ps_aux);
 out_release_altmode_aux:
-	pmic_glink_del_aux_device(pg, &pg->altmode_aux);
+	if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_ALTMODE))
+		pmic_glink_del_aux_device(pg, &pg->altmode_aux);
+out_release_ucsi_aux:
+	if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_UCSI))
+		pmic_glink_del_aux_device(pg, &pg->ucsi_aux);
 
 	return ret;
 }
@@ -291,8 +334,12 @@ static int pmic_glink_remove(struct platform_device *pdev)
 
 	pdr_handle_release(pg->pdr);
 
-	pmic_glink_del_aux_device(pg, &pg->ps_aux);
-	pmic_glink_del_aux_device(pg, &pg->altmode_aux);
+	if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_BATT))
+		pmic_glink_del_aux_device(pg, &pg->ps_aux);
+	if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_ALTMODE))
+		pmic_glink_del_aux_device(pg, &pg->altmode_aux);
+	if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_UCSI))
+		pmic_glink_del_aux_device(pg, &pg->ucsi_aux);
 
 	mutex_lock(&__pmic_glink_lock);
 	__pmic_glink = NULL;

-- 
2.34.1

[PATCH 4/7] soc: qcom: pmic_glink: register ucsi aux device

[Neil Armstrong]

Only register UCSI on know working devices, like on the SM8450
or Sm8550 which requires UCSI to get USB mode switch events.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 drivers/soc/qcom/pmic_glink.c | 67 ++++++++++++++++++++++++++++++++++++-------
 1 file changed, 57 insertions(+), 10 deletions(-)

diff --git a/drivers/soc/qcom/pmic_glink.c b/drivers/soc/qcom/pmic_glink.c
index bb3fb57abcc6..c7f091f4a8c1 100644
--- a/drivers/soc/qcom/pmic_glink.c
+++ b/drivers/soc/qcom/pmic_glink.c
@@ -4,6 +4,7 @@
  * Copyright (c) 2022, Linaro Ltd
  */
 #include <linux/auxiliary_bus.h>
+#include <linux/of_device.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/rpmsg.h>
@@ -11,12 +12,23 @@
 #include <linux/soc/qcom/pdr.h>
 #include <linux/soc/qcom/pmic_glink.h>
 
+enum {
+	PMIC_GLINK_CLIENT_BATT = 0,
+	PMIC_GLINK_CLIENT_ALTMODE,
+	PMIC_GLINK_CLIENT_UCSI,
+};
+
+#define PMIC_GLINK_CLIENT_DEFAULT	(BIT(PMIC_GLINK_CLIENT_BATT) |	\
+					 BIT(PMIC_GLINK_CLIENT_ALTMODE))
+
 struct pmic_glink {
 	struct device *dev;
 	struct pdr_handle *pdr;
 
 	struct rpmsg_endpoint *ept;
 
+	unsigned int client_mask;
+
 	struct auxiliary_device altmode_aux;
 	struct auxiliary_device ps_aux;
 	struct auxiliary_device ucsi_aux;
@@ -231,8 +243,19 @@ static struct rpmsg_driver pmic_glink_rpmsg_driver = {
 	},
 };
 
+/* Do not handle altmode for now on those platforms */
+static const unsigned int pmic_glink_sm8450_client_mask = BIT(PMIC_GLINK_CLIENT_BATT) |
+							  BIT(PMIC_GLINK_CLIENT_UCSI);
+
+static const struct of_device_id pmic_glink_of_client_mask[] = {
+	{ .compatible = "qcom,sm8450-pmic-glink", .data = &pmic_glink_sm8450_client_mask },
+	{ .compatible = "qcom,sm8550-pmic-glink", .data = &pmic_glink_sm8450_client_mask },
+	{}
+};
+
 static int pmic_glink_probe(struct platform_device *pdev)
 {
+	const struct of_device_id *match;
 	struct pdr_service *service;
 	struct pmic_glink *pg;
 	int ret;
@@ -249,12 +272,27 @@ static int pmic_glink_probe(struct platform_device *pdev)
 	mutex_init(&pg->client_lock);
 	mutex_init(&pg->state_lock);
 
-	ret = pmic_glink_add_aux_device(pg, &pg->altmode_aux, "altmode");
-	if (ret)
-		return ret;
-	ret = pmic_glink_add_aux_device(pg, &pg->ps_aux, "power-supply");
-	if (ret)
-		goto out_release_altmode_aux;
+	match = of_match_device(pmic_glink_of_client_mask, &pdev->dev);
+	if (match)
+		pg->client_mask = *(const unsigned int *)match->data;
+	else
+		pg->client_mask = PMIC_GLINK_CLIENT_DEFAULT;
+
+	if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_UCSI)) {
+		ret = pmic_glink_add_aux_device(pg, &pg->ucsi_aux, "ucsi");
+		if (ret)
+			return ret;
+	}
+	if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_ALTMODE)) {
+		ret = pmic_glink_add_aux_device(pg, &pg->altmode_aux, "altmode");
+		if (ret)
+			goto out_release_ucsi_aux;
+	}
+	if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_BATT)) {
+		ret = pmic_glink_add_aux_device(pg, &pg->ps_aux, "power-supply");
+		if (ret)
+			goto out_release_altmode_aux;
+	}
 
 	pg->pdr = pdr_handle_alloc(pmic_glink_pdr_callback, pg);
 	if (IS_ERR(pg->pdr)) {
@@ -278,9 +316,14 @@ static int pmic_glink_probe(struct platform_device *pdev)
 out_release_pdr_handle:
 	pdr_handle_release(pg->pdr);
 out_release_aux_devices:
-	pmic_glink_del_aux_device(pg, &pg->ps_aux);
+	if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_BATT))
+		pmic_glink_del_aux_device(pg, &pg->ps_aux);
 out_release_altmode_aux:
-	pmic_glink_del_aux_device(pg, &pg->altmode_aux);
+	if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_ALTMODE))
+		pmic_glink_del_aux_device(pg, &pg->altmode_aux);
+out_release_ucsi_aux:
+	if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_UCSI))
+		pmic_glink_del_aux_device(pg, &pg->ucsi_aux);
 
 	return ret;
 }
@@ -291,8 +334,12 @@ static int pmic_glink_remove(struct platform_device *pdev)
 
 	pdr_handle_release(pg->pdr);
 
-	pmic_glink_del_aux_device(pg, &pg->ps_aux);
-	pmic_glink_del_aux_device(pg, &pg->altmode_aux);
+	if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_BATT))
+		pmic_glink_del_aux_device(pg, &pg->ps_aux);
+	if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_ALTMODE))
+		pmic_glink_del_aux_device(pg, &pg->altmode_aux);
+	if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_UCSI))
+		pmic_glink_del_aux_device(pg, &pg->ucsi_aux);
 
 	mutex_lock(&__pmic_glink_lock);
 	__pmic_glink = NULL;

-- 
2.34.1


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[PATCH 5/7] arm64: dts: qcom: sm8450-hdk: add pmic glink node

[Neil Armstrong]

Add the pmic glink node linked with the DWC3 USB controller
switched to OTG mode and tagged with usb-role-switch.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 34 ++++++++++++++++++++++++++++++++-
 1 file changed, 33 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
index 5bdc2c1159ae..5ab12c911bfe 100644
--- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
@@ -87,6 +87,31 @@ lt9611_3v3: lt9611-3v3-regulator {
 		enable-active-high;
 	};
 
+	pmic-glink {
+		compatible = "qcom,sm8450-pmic-glink", "qcom,pmic-glink";
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		connector@0 {
+			compatible = "usb-c-connector";
+			reg = <0>;
+			power-role = "dual";
+			data-role = "dual";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				port@0 {
+					reg = <0>;
+					pmic_glink_dwc3_in: endpoint {
+						remote-endpoint = <&usb_1_dwc3_out>;
+					};
+				};
+			};
+		};
+	};
+
 	vph_pwr: vph-pwr-regulator {
 		compatible = "regulator-fixed";
 		regulator-name = "vph_pwr";
@@ -724,7 +749,14 @@ &usb_1 {
 };
 
 &usb_1_dwc3 {
-	dr_mode = "peripheral";
+	dr_mode = "otg";
+	usb-role-switch;
+
+	port {
+		usb_1_dwc3_out: endpoint {
+		      remote-endpoint = <&pmic_glink_dwc3_in>;
+	      };
+	};
 };
 
 &usb_1_hsphy {

-- 
2.34.1

[PATCH 5/7] arm64: dts: qcom: sm8450-hdk: add pmic glink node

[Neil Armstrong]

Add the pmic glink node linked with the DWC3 USB controller
switched to OTG mode and tagged with usb-role-switch.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 34 ++++++++++++++++++++++++++++++++-
 1 file changed, 33 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
index 5bdc2c1159ae..5ab12c911bfe 100644
--- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
@@ -87,6 +87,31 @@ lt9611_3v3: lt9611-3v3-regulator {
 		enable-active-high;
 	};
 
+	pmic-glink {
+		compatible = "qcom,sm8450-pmic-glink", "qcom,pmic-glink";
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		connector@0 {
+			compatible = "usb-c-connector";
+			reg = <0>;
+			power-role = "dual";
+			data-role = "dual";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				port@0 {
+					reg = <0>;
+					pmic_glink_dwc3_in: endpoint {
+						remote-endpoint = <&usb_1_dwc3_out>;
+					};
+				};
+			};
+		};
+	};
+
 	vph_pwr: vph-pwr-regulator {
 		compatible = "regulator-fixed";
 		regulator-name = "vph_pwr";
@@ -724,7 +749,14 @@ &usb_1 {
 };
 
 &usb_1_dwc3 {
-	dr_mode = "peripheral";
+	dr_mode = "otg";
+	usb-role-switch;
+
+	port {
+		usb_1_dwc3_out: endpoint {
+		      remote-endpoint = <&pmic_glink_dwc3_in>;
+	      };
+	};
 };
 
 &usb_1_hsphy {

-- 
2.34.1


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[PATCH 6/7] arm64: dts: qcom: sm8550-mtp: add pmic glink node

[Neil Armstrong]

Add the pmic glink node linked with the DWC3 USB controller
switched to OTG mode and tagged with usb-role-switch.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 34 ++++++++++++++++++++++++++++++++-
 1 file changed, 33 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
index 725d3bc3ee72..f054c11fe1f6 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
@@ -27,6 +27,31 @@ chosen {
 		stdout-path = "serial0:115200n8";
 	};
 
+	pmic-glink {
+		compatible = "qcom,sm8450-pmic-glink", "qcom,pmic-glink";
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		connector@0 {
+			compatible = "usb-c-connector";
+			reg = <0>;
+			power-role = "dual";
+			data-role = "dual";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				port@0 {
+					reg = <0>;
+					pmic_glink_dwc3_in: endpoint {
+						remote-endpoint = <&usb_1_dwc3_out>;
+					};
+				};
+			};
+		};
+	};
+
 	vph_pwr: vph-pwr-regulator {
 		compatible = "regulator-fixed";
 		regulator-name = "vph_pwr";
@@ -546,7 +571,14 @@ &usb_1 {
 };
 
 &usb_1_dwc3 {
-	dr_mode = "peripheral";
+	dr_mode = "otg";
+	usb-role-switch;
+
+	port {
+		usb_1_dwc3_out: endpoint {
+		      remote-endpoint = <&pmic_glink_dwc3_in>;
+	      };
+	};
 };
 
 &usb_1_hsphy {

-- 
2.34.1

[PATCH 6/7] arm64: dts: qcom: sm8550-mtp: add pmic glink node

[Neil Armstrong]

Add the pmic glink node linked with the DWC3 USB controller
switched to OTG mode and tagged with usb-role-switch.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 34 ++++++++++++++++++++++++++++++++-
 1 file changed, 33 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
index 725d3bc3ee72..f054c11fe1f6 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
@@ -27,6 +27,31 @@ chosen {
 		stdout-path = "serial0:115200n8";
 	};
 
+	pmic-glink {
+		compatible = "qcom,sm8450-pmic-glink", "qcom,pmic-glink";
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		connector@0 {
+			compatible = "usb-c-connector";
+			reg = <0>;
+			power-role = "dual";
+			data-role = "dual";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				port@0 {
+					reg = <0>;
+					pmic_glink_dwc3_in: endpoint {
+						remote-endpoint = <&usb_1_dwc3_out>;
+					};
+				};
+			};
+		};
+	};
+
 	vph_pwr: vph-pwr-regulator {
 		compatible = "regulator-fixed";
 		regulator-name = "vph_pwr";
@@ -546,7 +571,14 @@ &usb_1 {
 };
 
 &usb_1_dwc3 {
-	dr_mode = "peripheral";
+	dr_mode = "otg";
+	usb-role-switch;
+
+	port {
+		usb_1_dwc3_out: endpoint {
+		      remote-endpoint = <&pmic_glink_dwc3_in>;
+	      };
+	};
 };
 
 &usb_1_hsphy {

-- 
2.34.1


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[PATCH 7/7] arm64: defconfig: add PMIC GLINK modules

[Neil Armstrong]

Enable the PMIC GLINK core, altmode, battery and UCSI
aux drivers as module.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 arch/arm64/configs/defconfig | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 984553d55e17..918ccab4678d 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -285,6 +285,10 @@ CONFIG_VIRTIO_BLK=y
 CONFIG_BLK_DEV_NVME=m
 CONFIG_QCOM_COINCELL=m
 CONFIG_QCOM_FASTRPC=m
+CONFIG_BATTERY_QCOM_BATTMGR=m
+CONFIG_QCOM_PMIC_GLINK=m
+CONFIG_TYPEC_UCSI=m
+CONFIG_UCSI_PMIC_GLINK=m
 CONFIG_SRAM=y
 CONFIG_PCI_ENDPOINT_TEST=m
 CONFIG_EEPROM_AT24=m

-- 
2.34.1

[PATCH 7/7] arm64: defconfig: add PMIC GLINK modules

[Neil Armstrong]

Enable the PMIC GLINK core, altmode, battery and UCSI
aux drivers as module.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 arch/arm64/configs/defconfig | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 984553d55e17..918ccab4678d 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -285,6 +285,10 @@ CONFIG_VIRTIO_BLK=y
 CONFIG_BLK_DEV_NVME=m
 CONFIG_QCOM_COINCELL=m
 CONFIG_QCOM_FASTRPC=m
+CONFIG_BATTERY_QCOM_BATTMGR=m
+CONFIG_QCOM_PMIC_GLINK=m
+CONFIG_TYPEC_UCSI=m
+CONFIG_UCSI_PMIC_GLINK=m
 CONFIG_SRAM=y
 CONFIG_PCI_ENDPOINT_TEST=m
 CONFIG_EEPROM_AT24=m

-- 
2.34.1


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Re: [PATCH 5/7] arm64: dts: qcom: sm8450-hdk: add pmic glink node

[Konrad Dybcio]

On 30.01.2023 10:54, Neil Armstrong wrote:
> Add the pmic glink node linked with the DWC3 USB controller
> switched to OTG mode and tagged with usb-role-switch.
> 
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Missing commit message

> ---
>  arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 34 ++++++++++++++++++++++++++++++++-
>  1 file changed, 33 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
> index 5bdc2c1159ae..5ab12c911bfe 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
> @@ -87,6 +87,31 @@ lt9611_3v3: lt9611-3v3-regulator {
>  		enable-active-high;
>  	};
>  
> +	pmic-glink {
> +		compatible = "qcom,sm8450-pmic-glink", "qcom,pmic-glink";
> +
You could remove this newline
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		connector@0 {
> +			compatible = "usb-c-connector";
> +			reg = <0>;
> +			power-role = "dual";
> +			data-role = "dual";
> +
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
And add one here

> +				port@0 {
> +					reg = <0>;
And here

> +					pmic_glink_dwc3_in: endpoint {
> +						remote-endpoint = <&usb_1_dwc3_out>;
> +					};
> +				};
> +			};
> +		};
> +	};
> +
>  	vph_pwr: vph-pwr-regulator {
>  		compatible = "regulator-fixed";
>  		regulator-name = "vph_pwr";
> @@ -724,7 +749,14 @@ &usb_1 {
>  };
>  
>  &usb_1_dwc3 {
> -	dr_mode = "peripheral";
> +	dr_mode = "otg";
> +	usb-role-switch;
> +
> +	port {
Hm, maybe this could be moved to 8450 dtsi?

Konrad
> +		usb_1_dwc3_out: endpoint {
> +		      remote-endpoint = <&pmic_glink_dwc3_in>;
> +	      };
> +	};
>  };
>  
>  &usb_1_hsphy {
> 

Re: [PATCH 5/7] arm64: dts: qcom: sm8450-hdk: add pmic glink node

[Konrad Dybcio]

On 30.01.2023 10:54, Neil Armstrong wrote:
> Add the pmic glink node linked with the DWC3 USB controller
> switched to OTG mode and tagged with usb-role-switch.
> 
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Missing commit message

> ---
>  arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 34 ++++++++++++++++++++++++++++++++-
>  1 file changed, 33 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
> index 5bdc2c1159ae..5ab12c911bfe 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
> @@ -87,6 +87,31 @@ lt9611_3v3: lt9611-3v3-regulator {
>  		enable-active-high;
>  	};
>  
> +	pmic-glink {
> +		compatible = "qcom,sm8450-pmic-glink", "qcom,pmic-glink";
> +
You could remove this newline
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		connector@0 {
> +			compatible = "usb-c-connector";
> +			reg = <0>;
> +			power-role = "dual";
> +			data-role = "dual";
> +
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
And add one here

> +				port@0 {
> +					reg = <0>;
And here

> +					pmic_glink_dwc3_in: endpoint {
> +						remote-endpoint = <&usb_1_dwc3_out>;
> +					};
> +				};
> +			};
> +		};
> +	};
> +
>  	vph_pwr: vph-pwr-regulator {
>  		compatible = "regulator-fixed";
>  		regulator-name = "vph_pwr";
> @@ -724,7 +749,14 @@ &usb_1 {
>  };
>  
>  &usb_1_dwc3 {
> -	dr_mode = "peripheral";
> +	dr_mode = "otg";
> +	usb-role-switch;
> +
> +	port {
Hm, maybe this could be moved to 8450 dtsi?

Konrad
> +		usb_1_dwc3_out: endpoint {
> +		      remote-endpoint = <&pmic_glink_dwc3_in>;
> +	      };
> +	};
>  };
>  
>  &usb_1_hsphy {
> 

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Re: [PATCH 6/7] arm64: dts: qcom: sm8550-mtp: add pmic glink node

[Konrad Dybcio]

On 30.01.2023 10:54, Neil Armstrong wrote:
> Add the pmic glink node linked with the DWC3 USB controller
> switched to OTG mode and tagged with usb-role-switch.
> 
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 34 ++++++++++++++++++++++++++++++++-
>  1 file changed, 33 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
> index 725d3bc3ee72..f054c11fe1f6 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
> @@ -27,6 +27,31 @@ chosen {
>  		stdout-path = "serial0:115200n8";
>  	};
>  
> +	pmic-glink {
> +		compatible = "qcom,sm8450-pmic-glink",
8550?

Otherwise same comments as for the previous patch

Konrad
"qcom,pmic-glink";
> +
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		connector@0 {
> +			compatible = "usb-c-connector";
> +			reg = <0>;
> +			power-role = "dual";
> +			data-role = "dual";
> +
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				port@0 {
> +					reg = <0>;
> +					pmic_glink_dwc3_in: endpoint {
> +						remote-endpoint = <&usb_1_dwc3_out>;
> +					};
> +				};
> +			};
> +		};
> +	};
> +
>  	vph_pwr: vph-pwr-regulator {
>  		compatible = "regulator-fixed";
>  		regulator-name = "vph_pwr";
> @@ -546,7 +571,14 @@ &usb_1 {
>  };
>  
>  &usb_1_dwc3 {
> -	dr_mode = "peripheral";
> +	dr_mode = "otg";
> +	usb-role-switch;
> +
> +	port {
> +		usb_1_dwc3_out: endpoint {
> +		      remote-endpoint = <&pmic_glink_dwc3_in>;
> +	      };
> +	};
>  };
>  
>  &usb_1_hsphy {
> 

Re: [PATCH 6/7] arm64: dts: qcom: sm8550-mtp: add pmic glink node

[Konrad Dybcio]

On 30.01.2023 10:54, Neil Armstrong wrote:
> Add the pmic glink node linked with the DWC3 USB controller
> switched to OTG mode and tagged with usb-role-switch.
> 
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 34 ++++++++++++++++++++++++++++++++-
>  1 file changed, 33 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
> index 725d3bc3ee72..f054c11fe1f6 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
> @@ -27,6 +27,31 @@ chosen {
>  		stdout-path = "serial0:115200n8";
>  	};
>  
> +	pmic-glink {
> +		compatible = "qcom,sm8450-pmic-glink",
8550?

Otherwise same comments as for the previous patch

Konrad
"qcom,pmic-glink";
> +
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		connector@0 {
> +			compatible = "usb-c-connector";
> +			reg = <0>;
> +			power-role = "dual";
> +			data-role = "dual";
> +
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				port@0 {
> +					reg = <0>;
> +					pmic_glink_dwc3_in: endpoint {
> +						remote-endpoint = <&usb_1_dwc3_out>;
> +					};
> +				};
> +			};
> +		};
> +	};
> +
>  	vph_pwr: vph-pwr-regulator {
>  		compatible = "regulator-fixed";
>  		regulator-name = "vph_pwr";
> @@ -546,7 +571,14 @@ &usb_1 {
>  };
>  
>  &usb_1_dwc3 {
> -	dr_mode = "peripheral";
> +	dr_mode = "otg";
> +	usb-role-switch;
> +
> +	port {
> +		usb_1_dwc3_out: endpoint {
> +		      remote-endpoint = <&pmic_glink_dwc3_in>;
> +	      };
> +	};
>  };
>  
>  &usb_1_hsphy {
> 

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Re: [PATCH 5/7] arm64: dts: qcom: sm8450-hdk: add pmic glink node

[Neil Armstrong]

On 30/01/2023 11:40, Konrad Dybcio wrote:
> 
> 
> On 30.01.2023 10:54, Neil Armstrong wrote:
>> Add the pmic glink node linked with the DWC3 USB controller
>> switched to OTG mode and tagged with usb-role-switch.
>>
>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> Missing commit message

??

> 
>> ---
>>   arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 34 ++++++++++++++++++++++++++++++++-
>>   1 file changed, 33 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
>> index 5bdc2c1159ae..5ab12c911bfe 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
>> +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
>> @@ -87,6 +87,31 @@ lt9611_3v3: lt9611-3v3-regulator {
>>   		enable-active-high;
>>   	};
>>   
>> +	pmic-glink {
>> +		compatible = "qcom,sm8450-pmic-glink", "qcom,pmic-glink";
>> +
> You could remove this newline
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
>> +
>> +		connector@0 {
>> +			compatible = "usb-c-connector";
>> +			reg = <0>;
>> +			power-role = "dual";
>> +			data-role = "dual";
>> +
>> +			ports {
>> +				#address-cells = <1>;
>> +				#size-cells = <0>;
> And add one here
> 
>> +				port@0 {
>> +					reg = <0>;
> And here
> 

Ack

>> +					pmic_glink_dwc3_in: endpoint {
>> +						remote-endpoint = <&usb_1_dwc3_out>;
>> +					};
>> +				};
>> +			};
>> +		};
>> +	};
>> +
>>   	vph_pwr: vph-pwr-regulator {
>>   		compatible = "regulator-fixed";
>>   		regulator-name = "vph_pwr";
>> @@ -724,7 +749,14 @@ &usb_1 {
>>   };
>>   
>>   &usb_1_dwc3 {
>> -	dr_mode = "peripheral";
>> +	dr_mode = "otg";
>> +	usb-role-switch;
>> +
>> +	port {
> Hm, maybe this could be moved to 8450 dtsi?

Nop because it depends on the board layout, I think dr_mode
and eventual connector description should really stay in
the board dts.

Thanks,
Neil

> 
> Konrad
>> +		usb_1_dwc3_out: endpoint {
>> +		      remote-endpoint = <&pmic_glink_dwc3_in>;
>> +	      };
>> +	};
>>   };
>>   
>>   &usb_1_hsphy {
>>

Re: [PATCH 5/7] arm64: dts: qcom: sm8450-hdk: add pmic glink node

[Neil Armstrong]

On 30/01/2023 11:40, Konrad Dybcio wrote:
> 
> 
> On 30.01.2023 10:54, Neil Armstrong wrote:
>> Add the pmic glink node linked with the DWC3 USB controller
>> switched to OTG mode and tagged with usb-role-switch.
>>
>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> Missing commit message

??

> 
>> ---
>>   arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 34 ++++++++++++++++++++++++++++++++-
>>   1 file changed, 33 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
>> index 5bdc2c1159ae..5ab12c911bfe 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
>> +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
>> @@ -87,6 +87,31 @@ lt9611_3v3: lt9611-3v3-regulator {
>>   		enable-active-high;
>>   	};
>>   
>> +	pmic-glink {
>> +		compatible = "qcom,sm8450-pmic-glink", "qcom,pmic-glink";
>> +
> You could remove this newline
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
>> +
>> +		connector@0 {
>> +			compatible = "usb-c-connector";
>> +			reg = <0>;
>> +			power-role = "dual";
>> +			data-role = "dual";
>> +
>> +			ports {
>> +				#address-cells = <1>;
>> +				#size-cells = <0>;
> And add one here
> 
>> +				port@0 {
>> +					reg = <0>;
> And here
> 

Ack

>> +					pmic_glink_dwc3_in: endpoint {
>> +						remote-endpoint = <&usb_1_dwc3_out>;
>> +					};
>> +				};
>> +			};
>> +		};
>> +	};
>> +
>>   	vph_pwr: vph-pwr-regulator {
>>   		compatible = "regulator-fixed";
>>   		regulator-name = "vph_pwr";
>> @@ -724,7 +749,14 @@ &usb_1 {
>>   };
>>   
>>   &usb_1_dwc3 {
>> -	dr_mode = "peripheral";
>> +	dr_mode = "otg";
>> +	usb-role-switch;
>> +
>> +	port {
> Hm, maybe this could be moved to 8450 dtsi?

Nop because it depends on the board layout, I think dr_mode
and eventual connector description should really stay in
the board dts.

Thanks,
Neil

> 
> Konrad
>> +		usb_1_dwc3_out: endpoint {
>> +		      remote-endpoint = <&pmic_glink_dwc3_in>;
>> +	      };
>> +	};
>>   };
>>   
>>   &usb_1_hsphy {
>>


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Re: [PATCH 6/7] arm64: dts: qcom: sm8550-mtp: add pmic glink node

[Neil Armstrong]

On 30/01/2023 11:41, Konrad Dybcio wrote:
> 
> 
> On 30.01.2023 10:54, Neil Armstrong wrote:
>> Add the pmic glink node linked with the DWC3 USB controller
>> switched to OTG mode and tagged with usb-role-switch.
>>
>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>> ---
>>   arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 34 ++++++++++++++++++++++++++++++++-
>>   1 file changed, 33 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
>> index 725d3bc3ee72..f054c11fe1f6 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
>> +++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
>> @@ -27,6 +27,31 @@ chosen {
>>   		stdout-path = "serial0:115200n8";
>>   	};
>>   
>> +	pmic-glink {
>> +		compatible = "qcom,sm8450-pmic-glink",
> 8550?
> 
> Otherwise same comments as for the previous patch

Oops bad copy-pasta even if it still works...

Thanks,
Neil

> 
> Konrad
> "qcom,pmic-glink";
>> +
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
>> +
>> +		connector@0 {
>> +			compatible = "usb-c-connector";
>> +			reg = <0>;
>> +			power-role = "dual";
>> +			data-role = "dual";
>> +
>> +			ports {
>> +				#address-cells = <1>;
>> +				#size-cells = <0>;
>> +				port@0 {
>> +					reg = <0>;
>> +					pmic_glink_dwc3_in: endpoint {
>> +						remote-endpoint = <&usb_1_dwc3_out>;
>> +					};
>> +				};
>> +			};
>> +		};
>> +	};
>> +
>>   	vph_pwr: vph-pwr-regulator {
>>   		compatible = "regulator-fixed";
>>   		regulator-name = "vph_pwr";
>> @@ -546,7 +571,14 @@ &usb_1 {
>>   };
>>   
>>   &usb_1_dwc3 {
>> -	dr_mode = "peripheral";
>> +	dr_mode = "otg";
>> +	usb-role-switch;
>> +
>> +	port {
>> +		usb_1_dwc3_out: endpoint {
>> +		      remote-endpoint = <&pmic_glink_dwc3_in>;
>> +	      };
>> +	};
>>   };
>>   
>>   &usb_1_hsphy {
>>

Re: [PATCH 6/7] arm64: dts: qcom: sm8550-mtp: add pmic glink node

[Neil Armstrong]

On 30/01/2023 11:41, Konrad Dybcio wrote:
> 
> 
> On 30.01.2023 10:54, Neil Armstrong wrote:
>> Add the pmic glink node linked with the DWC3 USB controller
>> switched to OTG mode and tagged with usb-role-switch.
>>
>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>> ---
>>   arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 34 ++++++++++++++++++++++++++++++++-
>>   1 file changed, 33 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
>> index 725d3bc3ee72..f054c11fe1f6 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
>> +++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
>> @@ -27,6 +27,31 @@ chosen {
>>   		stdout-path = "serial0:115200n8";
>>   	};
>>   
>> +	pmic-glink {
>> +		compatible = "qcom,sm8450-pmic-glink",
> 8550?
> 
> Otherwise same comments as for the previous patch

Oops bad copy-pasta even if it still works...

Thanks,
Neil

> 
> Konrad
> "qcom,pmic-glink";
>> +
>> +		#address-cells = <1>;
>> +		#size-cells = <0>;
>> +
>> +		connector@0 {
>> +			compatible = "usb-c-connector";
>> +			reg = <0>;
>> +			power-role = "dual";
>> +			data-role = "dual";
>> +
>> +			ports {
>> +				#address-cells = <1>;
>> +				#size-cells = <0>;
>> +				port@0 {
>> +					reg = <0>;
>> +					pmic_glink_dwc3_in: endpoint {
>> +						remote-endpoint = <&usb_1_dwc3_out>;
>> +					};
>> +				};
>> +			};
>> +		};
>> +	};
>> +
>>   	vph_pwr: vph-pwr-regulator {
>>   		compatible = "regulator-fixed";
>>   		regulator-name = "vph_pwr";
>> @@ -546,7 +571,14 @@ &usb_1 {
>>   };
>>   
>>   &usb_1_dwc3 {
>> -	dr_mode = "peripheral";
>> +	dr_mode = "otg";
>> +	usb-role-switch;
>> +
>> +	port {
>> +		usb_1_dwc3_out: endpoint {
>> +		      remote-endpoint = <&pmic_glink_dwc3_in>;
>> +	      };
>> +	};
>>   };
>>   
>>   &usb_1_hsphy {
>>


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Re: [PATCH 5/7] arm64: dts: qcom: sm8450-hdk: add pmic glink node

[Konrad Dybcio]

On 30.01.2023 11:58, Neil Armstrong wrote:
> On 30/01/2023 11:40, Konrad Dybcio wrote:
>>
>>
>> On 30.01.2023 10:54, Neil Armstrong wrote:
>>> Add the pmic glink node linked with the DWC3 USB controller
>>> switched to OTG mode and tagged with usb-role-switch.
>>>
>>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>> Missing commit message
> 
> ??
> 
>>
>>> ---
>>>   arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 34 ++++++++++++++++++++++++++++++++-
>>>   1 file changed, 33 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
>>> index 5bdc2c1159ae..5ab12c911bfe 100644
>>> --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
>>> +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
>>> @@ -87,6 +87,31 @@ lt9611_3v3: lt9611-3v3-regulator {
>>>           enable-active-high;
>>>       };
>>>   +    pmic-glink {
>>> +        compatible = "qcom,sm8450-pmic-glink", "qcom,pmic-glink";
>>> +
>> You could remove this newline
>>> +        #address-cells = <1>;
>>> +        #size-cells = <0>;
>>> +
>>> +        connector@0 {
>>> +            compatible = "usb-c-connector";
>>> +            reg = <0>;
>>> +            power-role = "dual";
>>> +            data-role = "dual";
>>> +
>>> +            ports {
>>> +                #address-cells = <1>;
>>> +                #size-cells = <0>;
>> And add one here
>>
>>> +                port@0 {
>>> +                    reg = <0>;
>> And here
>>
> 
> Ack
> 
>>> +                    pmic_glink_dwc3_in: endpoint {
>>> +                        remote-endpoint = <&usb_1_dwc3_out>;
>>> +                    };
>>> +                };
>>> +            };
>>> +        };
>>> +    };
>>> +
>>>       vph_pwr: vph-pwr-regulator {
>>>           compatible = "regulator-fixed";
>>>           regulator-name = "vph_pwr";
>>> @@ -724,7 +749,14 @@ &usb_1 {
>>>   };
>>>     &usb_1_dwc3 {
>>> -    dr_mode = "peripheral";
>>> +    dr_mode = "otg";
>>> +    usb-role-switch;
>>> +
>>> +    port {
>> Hm, maybe this could be moved to 8450 dtsi?
> 
> Nop because it depends on the board layout, I think dr_mode
> and eventual connector description should really stay in
> the board dts.
I just meant the port definition, would it cause any side
effects to have it there?

Konrad
> 
> Thanks,
> Neil
> 
>>
>> Konrad
>>> +        usb_1_dwc3_out: endpoint {
>>> +              remote-endpoint = <&pmic_glink_dwc3_in>;
>>> +          };
>>> +    };
>>>   };
>>>     &usb_1_hsphy {
>>>
> 

Re: [PATCH 5/7] arm64: dts: qcom: sm8450-hdk: add pmic glink node

[Konrad Dybcio]

On 30.01.2023 11:58, Neil Armstrong wrote:
> On 30/01/2023 11:40, Konrad Dybcio wrote:
>>
>>
>> On 30.01.2023 10:54, Neil Armstrong wrote:
>>> Add the pmic glink node linked with the DWC3 USB controller
>>> switched to OTG mode and tagged with usb-role-switch.
>>>
>>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>> Missing commit message
> 
> ??
> 
>>
>>> ---
>>>   arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 34 ++++++++++++++++++++++++++++++++-
>>>   1 file changed, 33 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
>>> index 5bdc2c1159ae..5ab12c911bfe 100644
>>> --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
>>> +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
>>> @@ -87,6 +87,31 @@ lt9611_3v3: lt9611-3v3-regulator {
>>>           enable-active-high;
>>>       };
>>>   +    pmic-glink {
>>> +        compatible = "qcom,sm8450-pmic-glink", "qcom,pmic-glink";
>>> +
>> You could remove this newline
>>> +        #address-cells = <1>;
>>> +        #size-cells = <0>;
>>> +
>>> +        connector@0 {
>>> +            compatible = "usb-c-connector";
>>> +            reg = <0>;
>>> +            power-role = "dual";
>>> +            data-role = "dual";
>>> +
>>> +            ports {
>>> +                #address-cells = <1>;
>>> +                #size-cells = <0>;
>> And add one here
>>
>>> +                port@0 {
>>> +                    reg = <0>;
>> And here
>>
> 
> Ack
> 
>>> +                    pmic_glink_dwc3_in: endpoint {
>>> +                        remote-endpoint = <&usb_1_dwc3_out>;
>>> +                    };
>>> +                };
>>> +            };
>>> +        };
>>> +    };
>>> +
>>>       vph_pwr: vph-pwr-regulator {
>>>           compatible = "regulator-fixed";
>>>           regulator-name = "vph_pwr";
>>> @@ -724,7 +749,14 @@ &usb_1 {
>>>   };
>>>     &usb_1_dwc3 {
>>> -    dr_mode = "peripheral";
>>> +    dr_mode = "otg";
>>> +    usb-role-switch;
>>> +
>>> +    port {
>> Hm, maybe this could be moved to 8450 dtsi?
> 
> Nop because it depends on the board layout, I think dr_mode
> and eventual connector description should really stay in
> the board dts.
I just meant the port definition, would it cause any side
effects to have it there?

Konrad
> 
> Thanks,
> Neil
> 
>>
>> Konrad
>>> +        usb_1_dwc3_out: endpoint {
>>> +              remote-endpoint = <&pmic_glink_dwc3_in>;
>>> +          };
>>> +    };
>>>   };
>>>     &usb_1_hsphy {
>>>
> 

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Re: [PATCH 5/7] arm64: dts: qcom: sm8450-hdk: add pmic glink node

[neil.armstrong]

On 30/01/2023 11:59, Konrad Dybcio wrote:
> 
> 
> On 30.01.2023 11:58, Neil Armstrong wrote:
>> On 30/01/2023 11:40, Konrad Dybcio wrote:
>>>
>>>
>>> On 30.01.2023 10:54, Neil Armstrong wrote:
>>>> Add the pmic glink node linked with the DWC3 USB controller
>>>> switched to OTG mode and tagged with usb-role-switch.
>>>>
>>>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>>> Missing commit message
>>
>> ??
>>
>>>
>>>> ---
>>>>    arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 34 ++++++++++++++++++++++++++++++++-
>>>>    1 file changed, 33 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
>>>> index 5bdc2c1159ae..5ab12c911bfe 100644
>>>> --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
>>>> +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
>>>> @@ -87,6 +87,31 @@ lt9611_3v3: lt9611-3v3-regulator {
>>>>            enable-active-high;
>>>>        };
>>>>    +    pmic-glink {
>>>> +        compatible = "qcom,sm8450-pmic-glink", "qcom,pmic-glink";
>>>> +
>>> You could remove this newline
>>>> +        #address-cells = <1>;
>>>> +        #size-cells = <0>;
>>>> +
>>>> +        connector@0 {
>>>> +            compatible = "usb-c-connector";
>>>> +            reg = <0>;
>>>> +            power-role = "dual";
>>>> +            data-role = "dual";
>>>> +
>>>> +            ports {
>>>> +                #address-cells = <1>;
>>>> +                #size-cells = <0>;
>>> And add one here
>>>
>>>> +                port@0 {
>>>> +                    reg = <0>;
>>> And here
>>>
>>
>> Ack
>>
>>>> +                    pmic_glink_dwc3_in: endpoint {
>>>> +                        remote-endpoint = <&usb_1_dwc3_out>;
>>>> +                    };
>>>> +                };
>>>> +            };
>>>> +        };
>>>> +    };
>>>> +
>>>>        vph_pwr: vph-pwr-regulator {
>>>>            compatible = "regulator-fixed";
>>>>            regulator-name = "vph_pwr";
>>>> @@ -724,7 +749,14 @@ &usb_1 {
>>>>    };
>>>>      &usb_1_dwc3 {
>>>> -    dr_mode = "peripheral";
>>>> +    dr_mode = "otg";
>>>> +    usb-role-switch;
>>>> +
>>>> +    port {
>>> Hm, maybe this could be moved to 8450 dtsi?
>>
>> Nop because it depends on the board layout, I think dr_mode
>> and eventual connector description should really stay in
>> the board dts.
> I just meant the port definition, would it cause any side
> effects to have it there?

Right, I don't think so, I don't have an opinion on that so whatever

Neil

> 
> Konrad
>>
>> Thanks,
>> Neil
>>
>>>
>>> Konrad
>>>> +        usb_1_dwc3_out: endpoint {
>>>> +              remote-endpoint = <&pmic_glink_dwc3_in>;
>>>> +          };
>>>> +    };
>>>>    };
>>>>      &usb_1_hsphy {
>>>>
>>

Re: [PATCH 5/7] arm64: dts: qcom: sm8450-hdk: add pmic glink node

[neil.armstrong]

On 30/01/2023 11:59, Konrad Dybcio wrote:
> 
> 
> On 30.01.2023 11:58, Neil Armstrong wrote:
>> On 30/01/2023 11:40, Konrad Dybcio wrote:
>>>
>>>
>>> On 30.01.2023 10:54, Neil Armstrong wrote:
>>>> Add the pmic glink node linked with the DWC3 USB controller
>>>> switched to OTG mode and tagged with usb-role-switch.
>>>>
>>>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>>> Missing commit message
>>
>> ??
>>
>>>
>>>> ---
>>>>    arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 34 ++++++++++++++++++++++++++++++++-
>>>>    1 file changed, 33 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
>>>> index 5bdc2c1159ae..5ab12c911bfe 100644
>>>> --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
>>>> +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
>>>> @@ -87,6 +87,31 @@ lt9611_3v3: lt9611-3v3-regulator {
>>>>            enable-active-high;
>>>>        };
>>>>    +    pmic-glink {
>>>> +        compatible = "qcom,sm8450-pmic-glink", "qcom,pmic-glink";
>>>> +
>>> You could remove this newline
>>>> +        #address-cells = <1>;
>>>> +        #size-cells = <0>;
>>>> +
>>>> +        connector@0 {
>>>> +            compatible = "usb-c-connector";
>>>> +            reg = <0>;
>>>> +            power-role = "dual";
>>>> +            data-role = "dual";
>>>> +
>>>> +            ports {
>>>> +                #address-cells = <1>;
>>>> +                #size-cells = <0>;
>>> And add one here
>>>
>>>> +                port@0 {
>>>> +                    reg = <0>;
>>> And here
>>>
>>
>> Ack
>>
>>>> +                    pmic_glink_dwc3_in: endpoint {
>>>> +                        remote-endpoint = <&usb_1_dwc3_out>;
>>>> +                    };
>>>> +                };
>>>> +            };
>>>> +        };
>>>> +    };
>>>> +
>>>>        vph_pwr: vph-pwr-regulator {
>>>>            compatible = "regulator-fixed";
>>>>            regulator-name = "vph_pwr";
>>>> @@ -724,7 +749,14 @@ &usb_1 {
>>>>    };
>>>>      &usb_1_dwc3 {
>>>> -    dr_mode = "peripheral";
>>>> +    dr_mode = "otg";
>>>> +    usb-role-switch;
>>>> +
>>>> +    port {
>>> Hm, maybe this could be moved to 8450 dtsi?
>>
>> Nop because it depends on the board layout, I think dr_mode
>> and eventual connector description should really stay in
>> the board dts.
> I just meant the port definition, would it cause any side
> effects to have it there?

Right, I don't think so, I don't have an opinion on that so whatever

Neil

> 
> Konrad
>>
>> Thanks,
>> Neil
>>
>>>
>>> Konrad
>>>> +        usb_1_dwc3_out: endpoint {
>>>> +              remote-endpoint = <&pmic_glink_dwc3_in>;
>>>> +          };
>>>> +    };
>>>>    };
>>>>      &usb_1_hsphy {
>>>>
>>


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Re: [PATCH 2/7] dt-bindings: soc: qcom: qcom,pmic-glink: document SM8450 compatible

[Rob Herring]

On Mon, 30 Jan 2023 10:54:33 +0100, Neil Armstrong wrote:
> Document the SM8450 compatible used to describe the pmic glink
> on this platform.
> 
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
>  Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring <robh@kernel.org>

Re: [PATCH 2/7] dt-bindings: soc: qcom: qcom,pmic-glink: document SM8450 compatible

[Rob Herring]

On Mon, 30 Jan 2023 10:54:33 +0100, Neil Armstrong wrote:
> Document the SM8450 compatible used to describe the pmic glink
> on this platform.
> 
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
>  Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring <robh@kernel.org>

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Re: [PATCH 3/7] dt-bindings: soc: qcom: qcom,pmic-glink: document SM8550 compatible

[Rob Herring]

On Mon, 30 Jan 2023 10:54:34 +0100, Neil Armstrong wrote:
> Document the SM8550 compatible used to describe the pmic glink
> on this platform.
> 
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
>  Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring <robh@kernel.org>

Re: [PATCH 3/7] dt-bindings: soc: qcom: qcom,pmic-glink: document SM8550 compatible

[Rob Herring]

On Mon, 30 Jan 2023 10:54:34 +0100, Neil Armstrong wrote:
> Document the SM8550 compatible used to describe the pmic glink
> on this platform.
> 
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
>  Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring <robh@kernel.org>

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Re: [PATCH 1/7] usb: typec: ucsi: add PMIC Glink UCSI driver

[Greg Kroah-Hartman]

On Mon, Jan 30, 2023 at 10:54:32AM +0100, Neil Armstrong wrote:
> Introduce the UCSI PMIC Glink aux driver that communicates
> with the aDSP firmware with the UCSI protocol which handles
> the USB-C Port(s) Power Delivery.
> 
> The UCSI messaging is necessary on newer Qualcomm SoCs to
> provide USB role switch and altmode notifications.
> 
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
>  drivers/usb/typec/ucsi/Kconfig      |   7 +
>  drivers/usb/typec/ucsi/Makefile     |   1 +
>  drivers/usb/typec/ucsi/ucsi_glink.c | 321 ++++++++++++++++++++++++++++++++++++
>  3 files changed, 329 insertions(+)
> 
> diff --git a/drivers/usb/typec/ucsi/Kconfig b/drivers/usb/typec/ucsi/Kconfig
> index 8f9c4b9f31f7..dee6069e46a2 100644
> --- a/drivers/usb/typec/ucsi/Kconfig
> +++ b/drivers/usb/typec/ucsi/Kconfig
> @@ -58,4 +58,11 @@ config UCSI_STM32G0
>  	  To compile the driver as a module, choose M here: the module will be
>  	  called ucsi_stm32g0.
>  
> +config UCSI_PMIC_GLINK
> +	tristate "UCSI Qualcomm PMIC GLINK Interface Driver"
> +	depends on QCOM_PMIC_GLINK

No way to test build this code without this option?

> +	help
> +	  This driver enables UCSI support on platforms that expose UCSI
> +	  interface as PMIC GLINK device.

Module name when built?

A follow-on patch can be sent, this is minor.

thanks,

greg k-h

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Re: [PATCH 1/7] usb: typec: ucsi: add PMIC Glink UCSI driver

[Greg Kroah-Hartman]

On Mon, Jan 30, 2023 at 10:54:32AM +0100, Neil Armstrong wrote:
> Introduce the UCSI PMIC Glink aux driver that communicates
> with the aDSP firmware with the UCSI protocol which handles
> the USB-C Port(s) Power Delivery.
> 
> The UCSI messaging is necessary on newer Qualcomm SoCs to
> provide USB role switch and altmode notifications.
> 
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
>  drivers/usb/typec/ucsi/Kconfig      |   7 +
>  drivers/usb/typec/ucsi/Makefile     |   1 +
>  drivers/usb/typec/ucsi/ucsi_glink.c | 321 ++++++++++++++++++++++++++++++++++++
>  3 files changed, 329 insertions(+)
> 
> diff --git a/drivers/usb/typec/ucsi/Kconfig b/drivers/usb/typec/ucsi/Kconfig
> index 8f9c4b9f31f7..dee6069e46a2 100644
> --- a/drivers/usb/typec/ucsi/Kconfig
> +++ b/drivers/usb/typec/ucsi/Kconfig
> @@ -58,4 +58,11 @@ config UCSI_STM32G0
>  	  To compile the driver as a module, choose M here: the module will be
>  	  called ucsi_stm32g0.
>  
> +config UCSI_PMIC_GLINK
> +	tristate "UCSI Qualcomm PMIC GLINK Interface Driver"
> +	depends on QCOM_PMIC_GLINK

No way to test build this code without this option?

> +	help
> +	  This driver enables UCSI support on platforms that expose UCSI
> +	  interface as PMIC GLINK device.

Module name when built?

A follow-on patch can be sent, this is minor.

thanks,

greg k-h

Re: [PATCH 7/7] arm64: defconfig: add PMIC GLINK modules

[Krzysztof Kozlowski]

On 30/01/2023 10:54, Neil Armstrong wrote:
> Enable the PMIC GLINK core, altmode, battery and UCSI
> aux drivers as module.

Please add short "why", e.g. because they are used on Foobar board with
Qualcomm XYZ.

Best regards,
Krzysztof

Re: [PATCH 7/7] arm64: defconfig: add PMIC GLINK modules

[Krzysztof Kozlowski]

On 30/01/2023 10:54, Neil Armstrong wrote:
> Enable the PMIC GLINK core, altmode, battery and UCSI
> aux drivers as module.

Please add short "why", e.g. because they are used on Foobar board with
Qualcomm XYZ.

Best regards,
Krzysztof


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Re: [PATCH 1/7] usb: typec: ucsi: add PMIC Glink UCSI driver

[Neil Armstrong]

On 31/01/2023 10:16, Greg Kroah-Hartman wrote:
> On Mon, Jan 30, 2023 at 10:54:32AM +0100, Neil Armstrong wrote:
>> Introduce the UCSI PMIC Glink aux driver that communicates
>> with the aDSP firmware with the UCSI protocol which handles
>> the USB-C Port(s) Power Delivery.
>>
>> The UCSI messaging is necessary on newer Qualcomm SoCs to
>> provide USB role switch and altmode notifications.
>>
>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>> ---
>>   drivers/usb/typec/ucsi/Kconfig      |   7 +
>>   drivers/usb/typec/ucsi/Makefile     |   1 +
>>   drivers/usb/typec/ucsi/ucsi_glink.c | 321 ++++++++++++++++++++++++++++++++++++
>>   3 files changed, 329 insertions(+)
>>
>> diff --git a/drivers/usb/typec/ucsi/Kconfig b/drivers/usb/typec/ucsi/Kconfig
>> index 8f9c4b9f31f7..dee6069e46a2 100644
>> --- a/drivers/usb/typec/ucsi/Kconfig
>> +++ b/drivers/usb/typec/ucsi/Kconfig
>> @@ -58,4 +58,11 @@ config UCSI_STM32G0
>>   	  To compile the driver as a module, choose M here: the module will be
>>   	  called ucsi_stm32g0.
>>   
>> +config UCSI_PMIC_GLINK
>> +	tristate "UCSI Qualcomm PMIC GLINK Interface Driver"
>> +	depends on QCOM_PMIC_GLINK
> 
> No way to test build this code without this option?

Nop, the QCOM_PMIC_GLINK is a build dependency, this can't be removed

> 
>> +	help
>> +	  This driver enables UCSI support on platforms that expose UCSI
>> +	  interface as PMIC GLINK device.
> 
> Module name when built?

OK will add a follow-patch if needed

Thanks,
Neil

> 
> A follow-on patch can be sent, this is minor.
> 
> thanks,
> 
> greg k-h

Re: [PATCH 1/7] usb: typec: ucsi: add PMIC Glink UCSI driver

[Neil Armstrong]

On 31/01/2023 10:16, Greg Kroah-Hartman wrote:
> On Mon, Jan 30, 2023 at 10:54:32AM +0100, Neil Armstrong wrote:
>> Introduce the UCSI PMIC Glink aux driver that communicates
>> with the aDSP firmware with the UCSI protocol which handles
>> the USB-C Port(s) Power Delivery.
>>
>> The UCSI messaging is necessary on newer Qualcomm SoCs to
>> provide USB role switch and altmode notifications.
>>
>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>> ---
>>   drivers/usb/typec/ucsi/Kconfig      |   7 +
>>   drivers/usb/typec/ucsi/Makefile     |   1 +
>>   drivers/usb/typec/ucsi/ucsi_glink.c | 321 ++++++++++++++++++++++++++++++++++++
>>   3 files changed, 329 insertions(+)
>>
>> diff --git a/drivers/usb/typec/ucsi/Kconfig b/drivers/usb/typec/ucsi/Kconfig
>> index 8f9c4b9f31f7..dee6069e46a2 100644
>> --- a/drivers/usb/typec/ucsi/Kconfig
>> +++ b/drivers/usb/typec/ucsi/Kconfig
>> @@ -58,4 +58,11 @@ config UCSI_STM32G0
>>   	  To compile the driver as a module, choose M here: the module will be
>>   	  called ucsi_stm32g0.
>>   
>> +config UCSI_PMIC_GLINK
>> +	tristate "UCSI Qualcomm PMIC GLINK Interface Driver"
>> +	depends on QCOM_PMIC_GLINK
> 
> No way to test build this code without this option?

Nop, the QCOM_PMIC_GLINK is a build dependency, this can't be removed

> 
>> +	help
>> +	  This driver enables UCSI support on platforms that expose UCSI
>> +	  interface as PMIC GLINK device.
> 
> Module name when built?

OK will add a follow-patch if needed

Thanks,
Neil

> 
> A follow-on patch can be sent, this is minor.
> 
> thanks,
> 
> greg k-h


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Re: [PATCH 1/7] usb: typec: ucsi: add PMIC Glink UCSI driver

[Greg Kroah-Hartman]

On Fri, Feb 10, 2023 at 11:31:08AM +0100, Neil Armstrong wrote:
> On 31/01/2023 10:16, Greg Kroah-Hartman wrote:
> > On Mon, Jan 30, 2023 at 10:54:32AM +0100, Neil Armstrong wrote:
> > > Introduce the UCSI PMIC Glink aux driver that communicates
> > > with the aDSP firmware with the UCSI protocol which handles
> > > the USB-C Port(s) Power Delivery.
> > > 
> > > The UCSI messaging is necessary on newer Qualcomm SoCs to
> > > provide USB role switch and altmode notifications.
> > > 
> > > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> > > ---
> > >   drivers/usb/typec/ucsi/Kconfig      |   7 +
> > >   drivers/usb/typec/ucsi/Makefile     |   1 +
> > >   drivers/usb/typec/ucsi/ucsi_glink.c | 321 ++++++++++++++++++++++++++++++++++++
> > >   3 files changed, 329 insertions(+)
> > > 
> > > diff --git a/drivers/usb/typec/ucsi/Kconfig b/drivers/usb/typec/ucsi/Kconfig
> > > index 8f9c4b9f31f7..dee6069e46a2 100644
> > > --- a/drivers/usb/typec/ucsi/Kconfig
> > > +++ b/drivers/usb/typec/ucsi/Kconfig
> > > @@ -58,4 +58,11 @@ config UCSI_STM32G0
> > >   	  To compile the driver as a module, choose M here: the module will be
> > >   	  called ucsi_stm32g0.
> > > +config UCSI_PMIC_GLINK
> > > +	tristate "UCSI Qualcomm PMIC GLINK Interface Driver"
> > > +	depends on QCOM_PMIC_GLINK
> > 
> > No way to test build this code without this option?
> 
> Nop, the QCOM_PMIC_GLINK is a build dependency, this can't be removed

Then perhaps the QCOM_PMIC_GLINK code needs to be fixed up to allow for
it to be built on all platforms properly?  Otherwise you are
guaranteeing you will not get much, if any, build coverage and api
changes will cause this code to stagnate over time :(

thanks,

greg k-h

Re: [PATCH 1/7] usb: typec: ucsi: add PMIC Glink UCSI driver

[Greg Kroah-Hartman]

On Fri, Feb 10, 2023 at 11:31:08AM +0100, Neil Armstrong wrote:
> On 31/01/2023 10:16, Greg Kroah-Hartman wrote:
> > On Mon, Jan 30, 2023 at 10:54:32AM +0100, Neil Armstrong wrote:
> > > Introduce the UCSI PMIC Glink aux driver that communicates
> > > with the aDSP firmware with the UCSI protocol which handles
> > > the USB-C Port(s) Power Delivery.
> > > 
> > > The UCSI messaging is necessary on newer Qualcomm SoCs to
> > > provide USB role switch and altmode notifications.
> > > 
> > > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> > > ---
> > >   drivers/usb/typec/ucsi/Kconfig      |   7 +
> > >   drivers/usb/typec/ucsi/Makefile     |   1 +
> > >   drivers/usb/typec/ucsi/ucsi_glink.c | 321 ++++++++++++++++++++++++++++++++++++
> > >   3 files changed, 329 insertions(+)
> > > 
> > > diff --git a/drivers/usb/typec/ucsi/Kconfig b/drivers/usb/typec/ucsi/Kconfig
> > > index 8f9c4b9f31f7..dee6069e46a2 100644
> > > --- a/drivers/usb/typec/ucsi/Kconfig
> > > +++ b/drivers/usb/typec/ucsi/Kconfig
> > > @@ -58,4 +58,11 @@ config UCSI_STM32G0
> > >   	  To compile the driver as a module, choose M here: the module will be
> > >   	  called ucsi_stm32g0.
> > > +config UCSI_PMIC_GLINK
> > > +	tristate "UCSI Qualcomm PMIC GLINK Interface Driver"
> > > +	depends on QCOM_PMIC_GLINK
> > 
> > No way to test build this code without this option?
> 
> Nop, the QCOM_PMIC_GLINK is a build dependency, this can't be removed

Then perhaps the QCOM_PMIC_GLINK code needs to be fixed up to allow for
it to be built on all platforms properly?  Otherwise you are
guaranteeing you will not get much, if any, build coverage and api
changes will cause this code to stagnate over time :(

thanks,

greg k-h

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Re: [PATCH 1/7] usb: typec: ucsi: add PMIC Glink UCSI driver

[Neil Armstrong]

On 10/02/2023 11:38, Greg Kroah-Hartman wrote:
> On Fri, Feb 10, 2023 at 11:31:08AM +0100, Neil Armstrong wrote:
>> On 31/01/2023 10:16, Greg Kroah-Hartman wrote:
>>> On Mon, Jan 30, 2023 at 10:54:32AM +0100, Neil Armstrong wrote:
>>>> Introduce the UCSI PMIC Glink aux driver that communicates
>>>> with the aDSP firmware with the UCSI protocol which handles
>>>> the USB-C Port(s) Power Delivery.
>>>>
>>>> The UCSI messaging is necessary on newer Qualcomm SoCs to
>>>> provide USB role switch and altmode notifications.
>>>>
>>>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>>>> ---
>>>>    drivers/usb/typec/ucsi/Kconfig      |   7 +
>>>>    drivers/usb/typec/ucsi/Makefile     |   1 +
>>>>    drivers/usb/typec/ucsi/ucsi_glink.c | 321 ++++++++++++++++++++++++++++++++++++
>>>>    3 files changed, 329 insertions(+)
>>>>
>>>> diff --git a/drivers/usb/typec/ucsi/Kconfig b/drivers/usb/typec/ucsi/Kconfig
>>>> index 8f9c4b9f31f7..dee6069e46a2 100644
>>>> --- a/drivers/usb/typec/ucsi/Kconfig
>>>> +++ b/drivers/usb/typec/ucsi/Kconfig
>>>> @@ -58,4 +58,11 @@ config UCSI_STM32G0
>>>>    	  To compile the driver as a module, choose M here: the module will be
>>>>    	  called ucsi_stm32g0.
>>>> +config UCSI_PMIC_GLINK
>>>> +	tristate "UCSI Qualcomm PMIC GLINK Interface Driver"
>>>> +	depends on QCOM_PMIC_GLINK
>>>
>>> No way to test build this code without this option?
>>
>> Nop, the QCOM_PMIC_GLINK is a build dependency, this can't be removed
> 
> Then perhaps the QCOM_PMIC_GLINK code needs to be fixed up to allow for
> it to be built on all platforms properly?  Otherwise you are
> guaranteeing you will not get much, if any, build coverage and api
> changes will cause this code to stagnate over time :(

The QCOM_PMIC_GLINK deps are:
         depends on RPMSG
         depends on TYPEC
         depends on DRM
         depends on NET
         depends on OF
         select AUXILIARY_BUS
         select QCOM_PDR_HELPERS

What would be the changes needed here ?

Neil

> 
> thanks,
> 
> greg k-h

Re: [PATCH 1/7] usb: typec: ucsi: add PMIC Glink UCSI driver

[Neil Armstrong]

On 10/02/2023 11:38, Greg Kroah-Hartman wrote:
> On Fri, Feb 10, 2023 at 11:31:08AM +0100, Neil Armstrong wrote:
>> On 31/01/2023 10:16, Greg Kroah-Hartman wrote:
>>> On Mon, Jan 30, 2023 at 10:54:32AM +0100, Neil Armstrong wrote:
>>>> Introduce the UCSI PMIC Glink aux driver that communicates
>>>> with the aDSP firmware with the UCSI protocol which handles
>>>> the USB-C Port(s) Power Delivery.
>>>>
>>>> The UCSI messaging is necessary on newer Qualcomm SoCs to
>>>> provide USB role switch and altmode notifications.
>>>>
>>>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>>>> ---
>>>>    drivers/usb/typec/ucsi/Kconfig      |   7 +
>>>>    drivers/usb/typec/ucsi/Makefile     |   1 +
>>>>    drivers/usb/typec/ucsi/ucsi_glink.c | 321 ++++++++++++++++++++++++++++++++++++
>>>>    3 files changed, 329 insertions(+)
>>>>
>>>> diff --git a/drivers/usb/typec/ucsi/Kconfig b/drivers/usb/typec/ucsi/Kconfig
>>>> index 8f9c4b9f31f7..dee6069e46a2 100644
>>>> --- a/drivers/usb/typec/ucsi/Kconfig
>>>> +++ b/drivers/usb/typec/ucsi/Kconfig
>>>> @@ -58,4 +58,11 @@ config UCSI_STM32G0
>>>>    	  To compile the driver as a module, choose M here: the module will be
>>>>    	  called ucsi_stm32g0.
>>>> +config UCSI_PMIC_GLINK
>>>> +	tristate "UCSI Qualcomm PMIC GLINK Interface Driver"
>>>> +	depends on QCOM_PMIC_GLINK
>>>
>>> No way to test build this code without this option?
>>
>> Nop, the QCOM_PMIC_GLINK is a build dependency, this can't be removed
> 
> Then perhaps the QCOM_PMIC_GLINK code needs to be fixed up to allow for
> it to be built on all platforms properly?  Otherwise you are
> guaranteeing you will not get much, if any, build coverage and api
> changes will cause this code to stagnate over time :(

The QCOM_PMIC_GLINK deps are:
         depends on RPMSG
         depends on TYPEC
         depends on DRM
         depends on NET
         depends on OF
         select AUXILIARY_BUS
         select QCOM_PDR_HELPERS

What would be the changes needed here ?

Neil

> 
> thanks,
> 
> greg k-h


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Re: [PATCH 1/7] usb: typec: ucsi: add PMIC Glink UCSI driver

[Greg Kroah-Hartman]

On Fri, Feb 10, 2023 at 11:44:22AM +0100, Neil Armstrong wrote:
> On 10/02/2023 11:38, Greg Kroah-Hartman wrote:
> > On Fri, Feb 10, 2023 at 11:31:08AM +0100, Neil Armstrong wrote:
> > > On 31/01/2023 10:16, Greg Kroah-Hartman wrote:
> > > > On Mon, Jan 30, 2023 at 10:54:32AM +0100, Neil Armstrong wrote:
> > > > > Introduce the UCSI PMIC Glink aux driver that communicates
> > > > > with the aDSP firmware with the UCSI protocol which handles
> > > > > the USB-C Port(s) Power Delivery.
> > > > > 
> > > > > The UCSI messaging is necessary on newer Qualcomm SoCs to
> > > > > provide USB role switch and altmode notifications.
> > > > > 
> > > > > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> > > > > ---
> > > > >    drivers/usb/typec/ucsi/Kconfig      |   7 +
> > > > >    drivers/usb/typec/ucsi/Makefile     |   1 +
> > > > >    drivers/usb/typec/ucsi/ucsi_glink.c | 321 ++++++++++++++++++++++++++++++++++++
> > > > >    3 files changed, 329 insertions(+)
> > > > > 
> > > > > diff --git a/drivers/usb/typec/ucsi/Kconfig b/drivers/usb/typec/ucsi/Kconfig
> > > > > index 8f9c4b9f31f7..dee6069e46a2 100644
> > > > > --- a/drivers/usb/typec/ucsi/Kconfig
> > > > > +++ b/drivers/usb/typec/ucsi/Kconfig
> > > > > @@ -58,4 +58,11 @@ config UCSI_STM32G0
> > > > >    	  To compile the driver as a module, choose M here: the module will be
> > > > >    	  called ucsi_stm32g0.
> > > > > +config UCSI_PMIC_GLINK
> > > > > +	tristate "UCSI Qualcomm PMIC GLINK Interface Driver"
> > > > > +	depends on QCOM_PMIC_GLINK
> > > > 
> > > > No way to test build this code without this option?
> > > 
> > > Nop, the QCOM_PMIC_GLINK is a build dependency, this can't be removed
> > 
> > Then perhaps the QCOM_PMIC_GLINK code needs to be fixed up to allow for
> > it to be built on all platforms properly?  Otherwise you are
> > guaranteeing you will not get much, if any, build coverage and api
> > changes will cause this code to stagnate over time :(
> 
> The QCOM_PMIC_GLINK deps are:
>         depends on RPMSG
>         depends on TYPEC
>         depends on DRM
>         depends on NET
>         depends on OF
>         select AUXILIARY_BUS
>         select QCOM_PDR_HELPERS
> 
> What would be the changes needed here ?

I do not know, try unwinding it and maybe just adding a COMPILE_TEST
build option in a few places is all that is needed?

thanks,

greg k-h

Re: [PATCH 1/7] usb: typec: ucsi: add PMIC Glink UCSI driver

[Greg Kroah-Hartman]

On Fri, Feb 10, 2023 at 11:44:22AM +0100, Neil Armstrong wrote:
> On 10/02/2023 11:38, Greg Kroah-Hartman wrote:
> > On Fri, Feb 10, 2023 at 11:31:08AM +0100, Neil Armstrong wrote:
> > > On 31/01/2023 10:16, Greg Kroah-Hartman wrote:
> > > > On Mon, Jan 30, 2023 at 10:54:32AM +0100, Neil Armstrong wrote:
> > > > > Introduce the UCSI PMIC Glink aux driver that communicates
> > > > > with the aDSP firmware with the UCSI protocol which handles
> > > > > the USB-C Port(s) Power Delivery.
> > > > > 
> > > > > The UCSI messaging is necessary on newer Qualcomm SoCs to
> > > > > provide USB role switch and altmode notifications.
> > > > > 
> > > > > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> > > > > ---
> > > > >    drivers/usb/typec/ucsi/Kconfig      |   7 +
> > > > >    drivers/usb/typec/ucsi/Makefile     |   1 +
> > > > >    drivers/usb/typec/ucsi/ucsi_glink.c | 321 ++++++++++++++++++++++++++++++++++++
> > > > >    3 files changed, 329 insertions(+)
> > > > > 
> > > > > diff --git a/drivers/usb/typec/ucsi/Kconfig b/drivers/usb/typec/ucsi/Kconfig
> > > > > index 8f9c4b9f31f7..dee6069e46a2 100644
> > > > > --- a/drivers/usb/typec/ucsi/Kconfig
> > > > > +++ b/drivers/usb/typec/ucsi/Kconfig
> > > > > @@ -58,4 +58,11 @@ config UCSI_STM32G0
> > > > >    	  To compile the driver as a module, choose M here: the module will be
> > > > >    	  called ucsi_stm32g0.
> > > > > +config UCSI_PMIC_GLINK
> > > > > +	tristate "UCSI Qualcomm PMIC GLINK Interface Driver"
> > > > > +	depends on QCOM_PMIC_GLINK
> > > > 
> > > > No way to test build this code without this option?
> > > 
> > > Nop, the QCOM_PMIC_GLINK is a build dependency, this can't be removed
> > 
> > Then perhaps the QCOM_PMIC_GLINK code needs to be fixed up to allow for
> > it to be built on all platforms properly?  Otherwise you are
> > guaranteeing you will not get much, if any, build coverage and api
> > changes will cause this code to stagnate over time :(
> 
> The QCOM_PMIC_GLINK deps are:
>         depends on RPMSG
>         depends on TYPEC
>         depends on DRM
>         depends on NET
>         depends on OF
>         select AUXILIARY_BUS
>         select QCOM_PDR_HELPERS
> 
> What would be the changes needed here ?

I do not know, try unwinding it and maybe just adding a COMPILE_TEST
build option in a few places is all that is needed?

thanks,

greg k-h

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Re: [PATCH 1/7] usb: typec: ucsi: add PMIC Glink UCSI driver

[Neil Armstrong]

On 10/02/2023 12:01, Greg Kroah-Hartman wrote:
> On Fri, Feb 10, 2023 at 11:44:22AM +0100, Neil Armstrong wrote:
>> On 10/02/2023 11:38, Greg Kroah-Hartman wrote:
>>> On Fri, Feb 10, 2023 at 11:31:08AM +0100, Neil Armstrong wrote:
>>>> On 31/01/2023 10:16, Greg Kroah-Hartman wrote:
>>>>> On Mon, Jan 30, 2023 at 10:54:32AM +0100, Neil Armstrong wrote:
>>>>>> Introduce the UCSI PMIC Glink aux driver that communicates
>>>>>> with the aDSP firmware with the UCSI protocol which handles
>>>>>> the USB-C Port(s) Power Delivery.
>>>>>>
>>>>>> The UCSI messaging is necessary on newer Qualcomm SoCs to
>>>>>> provide USB role switch and altmode notifications.
>>>>>>
>>>>>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>>>>>> ---
>>>>>>     drivers/usb/typec/ucsi/Kconfig      |   7 +
>>>>>>     drivers/usb/typec/ucsi/Makefile     |   1 +
>>>>>>     drivers/usb/typec/ucsi/ucsi_glink.c | 321 ++++++++++++++++++++++++++++++++++++
>>>>>>     3 files changed, 329 insertions(+)
>>>>>>
>>>>>> diff --git a/drivers/usb/typec/ucsi/Kconfig b/drivers/usb/typec/ucsi/Kconfig
>>>>>> index 8f9c4b9f31f7..dee6069e46a2 100644
>>>>>> --- a/drivers/usb/typec/ucsi/Kconfig
>>>>>> +++ b/drivers/usb/typec/ucsi/Kconfig
>>>>>> @@ -58,4 +58,11 @@ config UCSI_STM32G0
>>>>>>     	  To compile the driver as a module, choose M here: the module will be
>>>>>>     	  called ucsi_stm32g0.
>>>>>> +config UCSI_PMIC_GLINK
>>>>>> +	tristate "UCSI Qualcomm PMIC GLINK Interface Driver"
>>>>>> +	depends on QCOM_PMIC_GLINK
>>>>>
>>>>> No way to test build this code without this option?
>>>>
>>>> Nop, the QCOM_PMIC_GLINK is a build dependency, this can't be removed
>>>
>>> Then perhaps the QCOM_PMIC_GLINK code needs to be fixed up to allow for
>>> it to be built on all platforms properly?  Otherwise you are
>>> guaranteeing you will not get much, if any, build coverage and api
>>> changes will cause this code to stagnate over time :(
>>
>> The QCOM_PMIC_GLINK deps are:
>>          depends on RPMSG
>>          depends on TYPEC
>>          depends on DRM
>>          depends on NET
>>          depends on OF
>>          select AUXILIARY_BUS
>>          select QCOM_PDR_HELPERS
>>
>> What would be the changes needed here ?
> 
> I do not know, try unwinding it and maybe just adding a COMPILE_TEST
> build option in a few places is all that is needed?

Sure, I'll investigate and send a separate patch for that.

Thanks,
Neil

> 
> thanks,
> 
> greg k-h

Re: [PATCH 1/7] usb: typec: ucsi: add PMIC Glink UCSI driver

[Neil Armstrong]

On 10/02/2023 12:01, Greg Kroah-Hartman wrote:
> On Fri, Feb 10, 2023 at 11:44:22AM +0100, Neil Armstrong wrote:
>> On 10/02/2023 11:38, Greg Kroah-Hartman wrote:
>>> On Fri, Feb 10, 2023 at 11:31:08AM +0100, Neil Armstrong wrote:
>>>> On 31/01/2023 10:16, Greg Kroah-Hartman wrote:
>>>>> On Mon, Jan 30, 2023 at 10:54:32AM +0100, Neil Armstrong wrote:
>>>>>> Introduce the UCSI PMIC Glink aux driver that communicates
>>>>>> with the aDSP firmware with the UCSI protocol which handles
>>>>>> the USB-C Port(s) Power Delivery.
>>>>>>
>>>>>> The UCSI messaging is necessary on newer Qualcomm SoCs to
>>>>>> provide USB role switch and altmode notifications.
>>>>>>
>>>>>> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>>>>>> ---
>>>>>>     drivers/usb/typec/ucsi/Kconfig      |   7 +
>>>>>>     drivers/usb/typec/ucsi/Makefile     |   1 +
>>>>>>     drivers/usb/typec/ucsi/ucsi_glink.c | 321 ++++++++++++++++++++++++++++++++++++
>>>>>>     3 files changed, 329 insertions(+)
>>>>>>
>>>>>> diff --git a/drivers/usb/typec/ucsi/Kconfig b/drivers/usb/typec/ucsi/Kconfig
>>>>>> index 8f9c4b9f31f7..dee6069e46a2 100644
>>>>>> --- a/drivers/usb/typec/ucsi/Kconfig
>>>>>> +++ b/drivers/usb/typec/ucsi/Kconfig
>>>>>> @@ -58,4 +58,11 @@ config UCSI_STM32G0
>>>>>>     	  To compile the driver as a module, choose M here: the module will be
>>>>>>     	  called ucsi_stm32g0.
>>>>>> +config UCSI_PMIC_GLINK
>>>>>> +	tristate "UCSI Qualcomm PMIC GLINK Interface Driver"
>>>>>> +	depends on QCOM_PMIC_GLINK
>>>>>
>>>>> No way to test build this code without this option?
>>>>
>>>> Nop, the QCOM_PMIC_GLINK is a build dependency, this can't be removed
>>>
>>> Then perhaps the QCOM_PMIC_GLINK code needs to be fixed up to allow for
>>> it to be built on all platforms properly?  Otherwise you are
>>> guaranteeing you will not get much, if any, build coverage and api
>>> changes will cause this code to stagnate over time :(
>>
>> The QCOM_PMIC_GLINK deps are:
>>          depends on RPMSG
>>          depends on TYPEC
>>          depends on DRM
>>          depends on NET
>>          depends on OF
>>          select AUXILIARY_BUS
>>          select QCOM_PDR_HELPERS
>>
>> What would be the changes needed here ?
> 
> I do not know, try unwinding it and maybe just adding a COMPILE_TEST
> build option in a few places is all that is needed?

Sure, I'll investigate and send a separate patch for that.

Thanks,
Neil

> 
> thanks,
> 
> greg k-h


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