From: Sascha Hauer <s.hauer@pengutronix.de>
To: linux-pm@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
Heiko Stuebner <heiko@sntech.de>,
Kyungmin Park <kyungmin.park@samsung.com>,
MyungJoo Ham <myungjoo.ham@samsung.com>,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
kernel@pegutronix.de,
Michael Riesch <michael.riesch@wolfvision.net>,
Sascha Hauer <s.hauer@pengutronix.de>
Subject: [PATCH 06/18] PM / devfreq: rockchip-dfi: Use free running counter
Date: Fri, 3 Feb 2023 13:50:00 +0100 [thread overview]
Message-ID: <20230203125012.3804008-7-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20230203125012.3804008-1-s.hauer@pengutronix.de>
The DDR_MON counters are free running counters. These are resetted to 0
when starting them over like currently done when reading the current
counter values.
Resetting the counters becomes a problem with perf support we want to
add later, because perf needs a monotonicly increasing counter.
This patch removes resetting the counters and keeps them running
instead. Counter overflows are handled with modular arithmetics. Not
stopping the counters also has the impact that they are running while
we are reading them. We cannot read multiple timers atomically, so
the values do not exactly fit together. The effect should be negligible
though as the time between two measurements is some orders of magnitude
bigger than the time we need to read multiple registers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/devfreq/event/rockchip-dfi.c | 53 ++++++++++++++++------------
1 file changed, 31 insertions(+), 22 deletions(-)
diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c
index 383fe8a17a512..25d64d9166a9a 100644
--- a/drivers/devfreq/event/rockchip-dfi.c
+++ b/drivers/devfreq/event/rockchip-dfi.c
@@ -38,11 +38,15 @@
#define DDRMON_CH1_COUNT_NUM 0x3c
#define DDRMON_CH1_DFI_ACCESS_NUM 0x40
-struct dmc_usage {
+struct dmc_count_channel {
u32 access;
u32 total;
};
+struct dmc_count {
+ struct dmc_count_channel c[RK3399_DMC_NUM_CH];
+};
+
/*
* The dfi controller can monitor DDR load. It has an upper and lower threshold
* for the operating points. Whenever the usage leaves these bounds an event is
@@ -51,7 +55,8 @@ struct dmc_usage {
struct rockchip_dfi {
struct devfreq_event_dev *edev;
struct devfreq_event_desc desc;
- struct dmc_usage ch_usage[RK3399_DMC_NUM_CH];
+ struct dmc_count count;
+ struct dmc_count last_event_count;
struct device *dev;
void __iomem *regs;
struct regmap *regmap_pmu;
@@ -85,30 +90,18 @@ static void rockchip_dfi_stop_hardware_counter(struct devfreq_event_dev *edev)
writel_relaxed(SOFTWARE_DIS, dfi_regs + DDRMON_CTRL);
}
-static int rockchip_dfi_get_busier_ch(struct devfreq_event_dev *edev)
+static void rockchip_dfi_read_counters(struct devfreq_event_dev *edev, struct dmc_count *count)
{
struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev);
- u32 tmp, max = 0;
- u32 i, busier_ch = 0;
+ u32 i;
void __iomem *dfi_regs = dfi->regs;
- rockchip_dfi_stop_hardware_counter(edev);
-
- /* Find out which channel is busier */
for (i = 0; i < RK3399_DMC_NUM_CH; i++) {
- dfi->ch_usage[i].access = readl_relaxed(dfi_regs +
+ count->c[i].access = readl_relaxed(dfi_regs +
DDRMON_CH0_DFI_ACCESS_NUM + i * 20);
- dfi->ch_usage[i].total = readl_relaxed(dfi_regs +
+ count->c[i].total = readl_relaxed(dfi_regs +
DDRMON_CH0_COUNT_NUM + i * 20);
- tmp = dfi->ch_usage[i].access;
- if (tmp > max) {
- busier_ch = i;
- max = tmp;
- }
}
- rockchip_dfi_start_hardware_counter(edev);
-
- return busier_ch;
}
static int rockchip_dfi_disable(struct devfreq_event_dev *edev)
@@ -145,12 +138,28 @@ static int rockchip_dfi_get_event(struct devfreq_event_dev *edev,
struct devfreq_event_data *edata)
{
struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev);
- int busier_ch;
+ struct dmc_count count;
+ struct dmc_count *last = &dfi->last_event_count;
+ u32 access = 0, total = 0;
+ int i;
+
+ rockchip_dfi_read_counters(edev, &count);
+
+ /* We can only report one channel, so find the busiest one */
+ for (i = 0; i < RK3399_DMC_NUM_CH; i++) {
+ u32 a = count.c[i].access - last->c[i].access;
+ u32 t = count.c[i].total - last->c[i].total;
+
+ if (a > access) {
+ access = a;
+ total = t;
+ }
+ }
- busier_ch = rockchip_dfi_get_busier_ch(edev);
+ edata->load_count = access * 4;
+ edata->total_count = total;
- edata->load_count = dfi->ch_usage[busier_ch].access * 4;
- edata->total_count = dfi->ch_usage[busier_ch].total;
+ dfi->last_event_count = count;
return 0;
}
--
2.30.2
WARNING: multiple messages have this Message-ID (diff)
From: Sascha Hauer <s.hauer@pengutronix.de>
To: linux-pm@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
Heiko Stuebner <heiko@sntech.de>,
Kyungmin Park <kyungmin.park@samsung.com>,
MyungJoo Ham <myungjoo.ham@samsung.com>,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
kernel@pegutronix.de,
Michael Riesch <michael.riesch@wolfvision.net>,
Sascha Hauer <s.hauer@pengutronix.de>
Subject: [PATCH 06/18] PM / devfreq: rockchip-dfi: Use free running counter
Date: Fri, 3 Feb 2023 13:50:00 +0100 [thread overview]
Message-ID: <20230203125012.3804008-7-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20230203125012.3804008-1-s.hauer@pengutronix.de>
The DDR_MON counters are free running counters. These are resetted to 0
when starting them over like currently done when reading the current
counter values.
Resetting the counters becomes a problem with perf support we want to
add later, because perf needs a monotonicly increasing counter.
This patch removes resetting the counters and keeps them running
instead. Counter overflows are handled with modular arithmetics. Not
stopping the counters also has the impact that they are running while
we are reading them. We cannot read multiple timers atomically, so
the values do not exactly fit together. The effect should be negligible
though as the time between two measurements is some orders of magnitude
bigger than the time we need to read multiple registers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/devfreq/event/rockchip-dfi.c | 53 ++++++++++++++++------------
1 file changed, 31 insertions(+), 22 deletions(-)
diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c
index 383fe8a17a512..25d64d9166a9a 100644
--- a/drivers/devfreq/event/rockchip-dfi.c
+++ b/drivers/devfreq/event/rockchip-dfi.c
@@ -38,11 +38,15 @@
#define DDRMON_CH1_COUNT_NUM 0x3c
#define DDRMON_CH1_DFI_ACCESS_NUM 0x40
-struct dmc_usage {
+struct dmc_count_channel {
u32 access;
u32 total;
};
+struct dmc_count {
+ struct dmc_count_channel c[RK3399_DMC_NUM_CH];
+};
+
/*
* The dfi controller can monitor DDR load. It has an upper and lower threshold
* for the operating points. Whenever the usage leaves these bounds an event is
@@ -51,7 +55,8 @@ struct dmc_usage {
struct rockchip_dfi {
struct devfreq_event_dev *edev;
struct devfreq_event_desc desc;
- struct dmc_usage ch_usage[RK3399_DMC_NUM_CH];
+ struct dmc_count count;
+ struct dmc_count last_event_count;
struct device *dev;
void __iomem *regs;
struct regmap *regmap_pmu;
@@ -85,30 +90,18 @@ static void rockchip_dfi_stop_hardware_counter(struct devfreq_event_dev *edev)
writel_relaxed(SOFTWARE_DIS, dfi_regs + DDRMON_CTRL);
}
-static int rockchip_dfi_get_busier_ch(struct devfreq_event_dev *edev)
+static void rockchip_dfi_read_counters(struct devfreq_event_dev *edev, struct dmc_count *count)
{
struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev);
- u32 tmp, max = 0;
- u32 i, busier_ch = 0;
+ u32 i;
void __iomem *dfi_regs = dfi->regs;
- rockchip_dfi_stop_hardware_counter(edev);
-
- /* Find out which channel is busier */
for (i = 0; i < RK3399_DMC_NUM_CH; i++) {
- dfi->ch_usage[i].access = readl_relaxed(dfi_regs +
+ count->c[i].access = readl_relaxed(dfi_regs +
DDRMON_CH0_DFI_ACCESS_NUM + i * 20);
- dfi->ch_usage[i].total = readl_relaxed(dfi_regs +
+ count->c[i].total = readl_relaxed(dfi_regs +
DDRMON_CH0_COUNT_NUM + i * 20);
- tmp = dfi->ch_usage[i].access;
- if (tmp > max) {
- busier_ch = i;
- max = tmp;
- }
}
- rockchip_dfi_start_hardware_counter(edev);
-
- return busier_ch;
}
static int rockchip_dfi_disable(struct devfreq_event_dev *edev)
@@ -145,12 +138,28 @@ static int rockchip_dfi_get_event(struct devfreq_event_dev *edev,
struct devfreq_event_data *edata)
{
struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev);
- int busier_ch;
+ struct dmc_count count;
+ struct dmc_count *last = &dfi->last_event_count;
+ u32 access = 0, total = 0;
+ int i;
+
+ rockchip_dfi_read_counters(edev, &count);
+
+ /* We can only report one channel, so find the busiest one */
+ for (i = 0; i < RK3399_DMC_NUM_CH; i++) {
+ u32 a = count.c[i].access - last->c[i].access;
+ u32 t = count.c[i].total - last->c[i].total;
+
+ if (a > access) {
+ access = a;
+ total = t;
+ }
+ }
- busier_ch = rockchip_dfi_get_busier_ch(edev);
+ edata->load_count = access * 4;
+ edata->total_count = total;
- edata->load_count = dfi->ch_usage[busier_ch].access * 4;
- edata->total_count = dfi->ch_usage[busier_ch].total;
+ dfi->last_event_count = count;
return 0;
}
--
2.30.2
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Sascha Hauer <s.hauer@pengutronix.de>
To: linux-pm@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
Heiko Stuebner <heiko@sntech.de>,
Kyungmin Park <kyungmin.park@samsung.com>,
MyungJoo Ham <myungjoo.ham@samsung.com>,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
kernel@pegutronix.de,
Michael Riesch <michael.riesch@wolfvision.net>,
Sascha Hauer <s.hauer@pengutronix.de>
Subject: [PATCH 06/18] PM / devfreq: rockchip-dfi: Use free running counter
Date: Fri, 3 Feb 2023 13:50:00 +0100 [thread overview]
Message-ID: <20230203125012.3804008-7-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20230203125012.3804008-1-s.hauer@pengutronix.de>
The DDR_MON counters are free running counters. These are resetted to 0
when starting them over like currently done when reading the current
counter values.
Resetting the counters becomes a problem with perf support we want to
add later, because perf needs a monotonicly increasing counter.
This patch removes resetting the counters and keeps them running
instead. Counter overflows are handled with modular arithmetics. Not
stopping the counters also has the impact that they are running while
we are reading them. We cannot read multiple timers atomically, so
the values do not exactly fit together. The effect should be negligible
though as the time between two measurements is some orders of magnitude
bigger than the time we need to read multiple registers.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
drivers/devfreq/event/rockchip-dfi.c | 53 ++++++++++++++++------------
1 file changed, 31 insertions(+), 22 deletions(-)
diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c
index 383fe8a17a512..25d64d9166a9a 100644
--- a/drivers/devfreq/event/rockchip-dfi.c
+++ b/drivers/devfreq/event/rockchip-dfi.c
@@ -38,11 +38,15 @@
#define DDRMON_CH1_COUNT_NUM 0x3c
#define DDRMON_CH1_DFI_ACCESS_NUM 0x40
-struct dmc_usage {
+struct dmc_count_channel {
u32 access;
u32 total;
};
+struct dmc_count {
+ struct dmc_count_channel c[RK3399_DMC_NUM_CH];
+};
+
/*
* The dfi controller can monitor DDR load. It has an upper and lower threshold
* for the operating points. Whenever the usage leaves these bounds an event is
@@ -51,7 +55,8 @@ struct dmc_usage {
struct rockchip_dfi {
struct devfreq_event_dev *edev;
struct devfreq_event_desc desc;
- struct dmc_usage ch_usage[RK3399_DMC_NUM_CH];
+ struct dmc_count count;
+ struct dmc_count last_event_count;
struct device *dev;
void __iomem *regs;
struct regmap *regmap_pmu;
@@ -85,30 +90,18 @@ static void rockchip_dfi_stop_hardware_counter(struct devfreq_event_dev *edev)
writel_relaxed(SOFTWARE_DIS, dfi_regs + DDRMON_CTRL);
}
-static int rockchip_dfi_get_busier_ch(struct devfreq_event_dev *edev)
+static void rockchip_dfi_read_counters(struct devfreq_event_dev *edev, struct dmc_count *count)
{
struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev);
- u32 tmp, max = 0;
- u32 i, busier_ch = 0;
+ u32 i;
void __iomem *dfi_regs = dfi->regs;
- rockchip_dfi_stop_hardware_counter(edev);
-
- /* Find out which channel is busier */
for (i = 0; i < RK3399_DMC_NUM_CH; i++) {
- dfi->ch_usage[i].access = readl_relaxed(dfi_regs +
+ count->c[i].access = readl_relaxed(dfi_regs +
DDRMON_CH0_DFI_ACCESS_NUM + i * 20);
- dfi->ch_usage[i].total = readl_relaxed(dfi_regs +
+ count->c[i].total = readl_relaxed(dfi_regs +
DDRMON_CH0_COUNT_NUM + i * 20);
- tmp = dfi->ch_usage[i].access;
- if (tmp > max) {
- busier_ch = i;
- max = tmp;
- }
}
- rockchip_dfi_start_hardware_counter(edev);
-
- return busier_ch;
}
static int rockchip_dfi_disable(struct devfreq_event_dev *edev)
@@ -145,12 +138,28 @@ static int rockchip_dfi_get_event(struct devfreq_event_dev *edev,
struct devfreq_event_data *edata)
{
struct rockchip_dfi *dfi = devfreq_event_get_drvdata(edev);
- int busier_ch;
+ struct dmc_count count;
+ struct dmc_count *last = &dfi->last_event_count;
+ u32 access = 0, total = 0;
+ int i;
+
+ rockchip_dfi_read_counters(edev, &count);
+
+ /* We can only report one channel, so find the busiest one */
+ for (i = 0; i < RK3399_DMC_NUM_CH; i++) {
+ u32 a = count.c[i].access - last->c[i].access;
+ u32 t = count.c[i].total - last->c[i].total;
+
+ if (a > access) {
+ access = a;
+ total = t;
+ }
+ }
- busier_ch = rockchip_dfi_get_busier_ch(edev);
+ edata->load_count = access * 4;
+ edata->total_count = total;
- edata->load_count = dfi->ch_usage[busier_ch].access * 4;
- edata->total_count = dfi->ch_usage[busier_ch].total;
+ dfi->last_event_count = count;
return 0;
}
--
2.30.2
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-02-03 12:50 UTC|newest]
Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-03 12:49 [PATCH 00/18] Add perf support to the rockchip-dfi driver Sascha Hauer
2023-02-03 12:49 ` Sascha Hauer
2023-02-03 12:49 ` Sascha Hauer
2023-02-03 12:49 ` [PATCH 01/18] PM / devfreq: rockchip-dfi: Embed desc into private data struct Sascha Hauer
2023-02-03 12:49 ` Sascha Hauer
2023-02-03 12:49 ` Sascha Hauer
2023-02-03 12:49 ` [PATCH 02/18] PM / devfreq: rockchip-dfi: use consistent name for " Sascha Hauer
2023-02-03 12:49 ` Sascha Hauer
2023-02-03 12:49 ` Sascha Hauer
2023-02-03 12:49 ` [PATCH 03/18] PM / devfreq: rockchip-dfi: Make pmu regmap mandatory Sascha Hauer
2023-02-03 12:49 ` Sascha Hauer
2023-02-03 12:49 ` Sascha Hauer
2023-02-03 12:49 ` [PATCH 04/18] PM / devfreq: rockchip-dfi: Add SoC specific init function Sascha Hauer
2023-02-03 12:49 ` Sascha Hauer
2023-02-03 12:49 ` Sascha Hauer
2023-02-03 12:49 ` [PATCH 05/18] PM / devfreq: rockchip-dfi: dfi store raw values in counter struct Sascha Hauer
2023-02-03 12:49 ` Sascha Hauer
2023-02-03 12:49 ` Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer [this message]
2023-02-03 12:50 ` [PATCH 06/18] PM / devfreq: rockchip-dfi: Use free running counter Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` [PATCH 07/18] PM / devfreq: rockchip-dfi: introduce channel mask Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` [PATCH 08/18] PM / devfreq: rk3399_dmc,dfi: generalize DDRTYPE defines Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` [PATCH 09/18] PM / devfreq: rockchip-dfi: Clean up DDR type register defines Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` [PATCH 10/18] PM / devfreq: rockchip-dfi: Add RK3568 support Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` [PATCH 11/18] PM / devfreq: rockchip-dfi: Handle LPDDR2 correctly Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` [PATCH 12/18] PM / devfreq: rockchip-dfi: Handle LPDDR4X Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` [PATCH 13/18] PM / devfreq: rockchip-dfi: Pass private data struct to internal functions Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` [PATCH 14/18] PM / devfreq: rockchip-dfi: Prepare for multiple users Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` [PATCH 15/18] PM / devfreq: rockchip-dfi: Add perf support Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` [PATCH 16/18] arm64: dts: rockchip: rk3399: Enable DFI Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` [PATCH 17/18] arm64: dts: rockchip: rk356x: Add DFI Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` [PATCH 18/18] dt-bindings: devfreq: event: convert Rockchip DFI binding to yaml Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 12:50 ` Sascha Hauer
2023-02-03 15:14 ` Krzysztof Kozlowski
2023-02-03 15:14 ` Krzysztof Kozlowski
2023-02-03 15:14 ` Krzysztof Kozlowski
2023-02-03 15:19 ` Krzysztof Kozlowski
2023-02-03 15:19 ` Krzysztof Kozlowski
2023-02-03 15:19 ` Krzysztof Kozlowski
2023-02-03 16:02 ` Sascha Hauer
2023-02-03 16:02 ` Sascha Hauer
2023-02-03 16:02 ` Sascha Hauer
2023-02-03 18:09 ` Krzysztof Kozlowski
2023-02-03 18:09 ` Krzysztof Kozlowski
2023-02-03 18:09 ` Krzysztof Kozlowski
2023-02-03 20:18 ` Rob Herring
2023-02-03 20:18 ` Rob Herring
2023-02-03 20:18 ` Rob Herring
2023-02-04 4:49 ` kernel test robot
2023-02-04 4:49 ` kernel test robot
2023-02-04 4:49 ` kernel test robot
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