From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64579C636D3 for ; Wed, 8 Feb 2023 18:54:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230150AbjBHSyi (ORCPT ); Wed, 8 Feb 2023 13:54:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49236 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229479AbjBHSyh (ORCPT ); Wed, 8 Feb 2023 13:54:37 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7A7ED18A95; Wed, 8 Feb 2023 10:54:36 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 1C5BEB81F4D; Wed, 8 Feb 2023 18:54:35 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0CB21C433D2; Wed, 8 Feb 2023 18:54:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1675882473; bh=xTtM9WlSf7bwExmahb6XOjPHbEjpNPb+C9ZLErT3mV8=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=kJN28UveNEt23ZFALxkKRAduymcXqKXXhl5ZE6krYfbalb6HMbzHo9qeVzvcHI7Wm H7S6jcL16vD7PqCbUM676t6Ujn2JFJPW6F8SYQEY0t+JColJ5tdmzL8HnmWP59Mv+N h1XG21jruiC7Pqu0lZhIHvhdf8KfE3r2XiOfPuEIw7UtbGW+1gt8cYhRh3sZd6iQB0 OKQT0joBdQfoYqU3AXs0x+0ro+BNaKQvYiFcCdFS93pX8FTqdLs62iSLZQceti8ikH 8vqlPouh7hbFMq94LAL+5Wj+RTZZwiFzYMUZ+IE2R0duumYDsHSZLH3uCg57RDgxC5 5i80rfFHy/R9Q== Date: Wed, 8 Feb 2023 19:08:33 +0000 From: Jonathan Cameron To: Gatien CHEVALLIER Cc: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Loic PALLARDY Subject: Re: [PATCH v3 4/6] bus: stm32_sys_bus: add support for STM32MP15 and STM32MP13 system bus Message-ID: <20230208190833.532cd60c@jic23-huawei> In-Reply-To: References: <20230127164040.1047583-1-gatien.chevallier@foss.st.com> <20230127164040.1047583-5-gatien.chevallier@foss.st.com> <20230128161217.0e79436e@jic23-huawei> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.36; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org On Tue, 7 Feb 2023 15:12:23 +0100 Gatien CHEVALLIER wrote: > Hi Jonathan, > > On 1/28/23 17:12, Jonathan Cameron wrote: > > On Fri, 27 Jan 2023 17:40:38 +0100 > > Gatien Chevallier wrote: > > > >> This driver is checking the access rights of the different > >> peripherals connected to the system bus. If access is denied, > >> the associated device tree node is skipped so the platform bus > >> does not probe it. > >> > >> Signed-off-by: Gatien Chevallier > >> Signed-off-by: Loic PALLARDY > > > > Hi Gatien, > > > > A few comments inline, > > > > Thanks, > > > > Jonathan > > > >> diff --git a/drivers/bus/stm32_sys_bus.c b/drivers/bus/stm32_sys_bus.c > >> new file mode 100644 > >> index 000000000000..c12926466bae > >> --- /dev/null > >> +++ b/drivers/bus/stm32_sys_bus.c > >> @@ -0,0 +1,168 @@ > >> +// SPDX-License-Identifier: GPL-2.0 > >> +/* > >> + * Copyright (C) 2023, STMicroelectronics - All Rights Reserved > >> + */ > >> + > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> + > >> +/* ETZPC peripheral as firewall bus */ > >> +/* ETZPC registers */ > >> +#define ETZPC_DECPROT 0x10 > >> + > >> +/* ETZPC miscellaneous */ > >> +#define ETZPC_PROT_MASK GENMASK(1, 0) > >> +#define ETZPC_PROT_A7NS 0x3 > >> +#define ETZPC_DECPROT_SHIFT 1 > > > > This define makes the code harder to read. What we care about is > > the number of bits in the register divided by number of entries. > > (which is 2) hence the shift by 1. See below for more on this. > > > > > >> + > >> +#define IDS_PER_DECPROT_REGS 16 > > > >> +#define STM32MP15_ETZPC_ENTRIES 96 > >> +#define STM32MP13_ETZPC_ENTRIES 64 > > > > These defines just make the code harder to check. > > They aren't magic numbers, but rather just telling us how many > > entries there are, so I would just put them in the structures directly. > > Their use make it clear what they are without needing to give them a name. > > > > Honestly, I'd rather read the hardware configuration registers to get > this information instead of differentiating MP13/15. Would you agree on > that? Sure, if they are discoverable even better. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A41C5C636D3 for ; Wed, 8 Feb 2023 18:55:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=2ExexMIi8LeJQLBltCXDwgxKSvcg2RQY0sQ21n2X0W0=; b=qfwU+2eTdnhPyP +OMePJks7DC5icQOEi7SqC+A1VQ1REGLTmAzh3GlWLpaIRrIWiIi4F2wopiRukdwbWVKAvfm0hHqA 0ccDbO0/qFZgUPU52OuseoMucem7DZGplDZSlQ4F6N7OilR1+JCwDOGBKOTz9D1pFfhcdwnB8kxEp aOZ47PZsJwufvgFAI/YL/MYJMFKgBvrRmtL1XP5+StBaWH4qWpao2GMOk0pjAuujZpxzyJWXMBepU HgnVNRlcVkuXnS6UupSOQKC7p6024qqVW4jjxtlBOsXw0OrySJ8LjWPLbMujH1DWGJdRtg5jwuhAk PNlsw51jGXU3g9i+gSgw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pPpad-00GgC7-1Y; Wed, 08 Feb 2023 18:54:43 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pPpaZ-00Gg9u-EH; Wed, 08 Feb 2023 18:54:40 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 4DC2A617B8; Wed, 8 Feb 2023 18:54:34 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0CB21C433D2; Wed, 8 Feb 2023 18:54:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1675882473; bh=xTtM9WlSf7bwExmahb6XOjPHbEjpNPb+C9ZLErT3mV8=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=kJN28UveNEt23ZFALxkKRAduymcXqKXXhl5ZE6krYfbalb6HMbzHo9qeVzvcHI7Wm H7S6jcL16vD7PqCbUM676t6Ujn2JFJPW6F8SYQEY0t+JColJ5tdmzL8HnmWP59Mv+N h1XG21jruiC7Pqu0lZhIHvhdf8KfE3r2XiOfPuEIw7UtbGW+1gt8cYhRh3sZd6iQB0 OKQT0joBdQfoYqU3AXs0x+0ro+BNaKQvYiFcCdFS93pX8FTqdLs62iSLZQceti8ikH 8vqlPouh7hbFMq94LAL+5Wj+RTZZwiFzYMUZ+IE2R0duumYDsHSZLH3uCg57RDgxC5 5i80rfFHy/R9Q== Date: Wed, 8 Feb 2023 19:08:33 +0000 From: Jonathan Cameron To: Gatien CHEVALLIER Cc: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Loic PALLARDY Subject: Re: [PATCH v3 4/6] bus: stm32_sys_bus: add support for STM32MP15 and STM32MP13 system bus Message-ID: <20230208190833.532cd60c@jic23-huawei> In-Reply-To: References: <20230127164040.1047583-1-gatien.chevallier@foss.st.com> <20230127164040.1047583-5-gatien.chevallier@foss.st.com> <20230128161217.0e79436e@jic23-huawei> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.36; x86_64-pc-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230208_105439_614660_21AB1724 X-CRM114-Status: GOOD ( 27.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 7 Feb 2023 15:12:23 +0100 Gatien CHEVALLIER wrote: > Hi Jonathan, > > On 1/28/23 17:12, Jonathan Cameron wrote: > > On Fri, 27 Jan 2023 17:40:38 +0100 > > Gatien Chevallier wrote: > > > >> This driver is checking the access rights of the different > >> peripherals connected to the system bus. If access is denied, > >> the associated device tree node is skipped so the platform bus > >> does not probe it. > >> > >> Signed-off-by: Gatien Chevallier > >> Signed-off-by: Loic PALLARDY > > > > Hi Gatien, > > > > A few comments inline, > > > > Thanks, > > > > Jonathan > > > >> diff --git a/drivers/bus/stm32_sys_bus.c b/drivers/bus/stm32_sys_bus.c > >> new file mode 100644 > >> index 000000000000..c12926466bae > >> --- /dev/null > >> +++ b/drivers/bus/stm32_sys_bus.c > >> @@ -0,0 +1,168 @@ > >> +// SPDX-License-Identifier: GPL-2.0 > >> +/* > >> + * Copyright (C) 2023, STMicroelectronics - All Rights Reserved > >> + */ > >> + > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> + > >> +/* ETZPC peripheral as firewall bus */ > >> +/* ETZPC registers */ > >> +#define ETZPC_DECPROT 0x10 > >> + > >> +/* ETZPC miscellaneous */ > >> +#define ETZPC_PROT_MASK GENMASK(1, 0) > >> +#define ETZPC_PROT_A7NS 0x3 > >> +#define ETZPC_DECPROT_SHIFT 1 > > > > This define makes the code harder to read. What we care about is > > the number of bits in the register divided by number of entries. > > (which is 2) hence the shift by 1. See below for more on this. > > > > > >> + > >> +#define IDS_PER_DECPROT_REGS 16 > > > >> +#define STM32MP15_ETZPC_ENTRIES 96 > >> +#define STM32MP13_ETZPC_ENTRIES 64 > > > > These defines just make the code harder to check. > > They aren't magic numbers, but rather just telling us how many > > entries there are, so I would just put them in the structures directly. > > Their use make it clear what they are without needing to give them a name. > > > > Honestly, I'd rather read the hardware configuration registers to get > this information instead of differentiating MP13/15. Would you agree on > that? Sure, if they are discoverable even better. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C92E6C636D3 for ; Wed, 8 Feb 2023 18:54:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=UEM0q07k7wt6RWp2gMN7DPIusAwtdmnoSRIqPKJ8MVE=; b=PYp70fB7bTQ8cP P1LDijzOobUxhMc/ea9uk3P4nr+2e2KZJI8jAIH6w+FWNAZjj3H8azc0QUJmgxFgPtNPIZnY6eWSO QGrOXEdv0H1Dbbe98GmpEpoTSusXaJQ6+ZCvDKmD6scDAkGndaotSZ0yC7xlJt2SmWmjgKIVN7/nG WITWFnW/CwPwxtD39AyAN6YnGJ3LpwSbJzNvacsZKVwIEMDt0OmcPa+aefzu7vKGAhjUJTe5PHjaB SRVhsFBAMvBq6pBXOZeyjDyVvXq1O9AfoihtU4rj6wMtL/gro/m33xPBOIox7XDBTG8WfPCQPPxnx GYp34fAn+P720vLBYW9A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pPpak-00GgDw-7b; Wed, 08 Feb 2023 18:54:50 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pPpaZ-00Gg9u-EH; Wed, 08 Feb 2023 18:54:40 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 4DC2A617B8; Wed, 8 Feb 2023 18:54:34 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0CB21C433D2; Wed, 8 Feb 2023 18:54:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1675882473; bh=xTtM9WlSf7bwExmahb6XOjPHbEjpNPb+C9ZLErT3mV8=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=kJN28UveNEt23ZFALxkKRAduymcXqKXXhl5ZE6krYfbalb6HMbzHo9qeVzvcHI7Wm H7S6jcL16vD7PqCbUM676t6Ujn2JFJPW6F8SYQEY0t+JColJ5tdmzL8HnmWP59Mv+N h1XG21jruiC7Pqu0lZhIHvhdf8KfE3r2XiOfPuEIw7UtbGW+1gt8cYhRh3sZd6iQB0 OKQT0joBdQfoYqU3AXs0x+0ro+BNaKQvYiFcCdFS93pX8FTqdLs62iSLZQceti8ikH 8vqlPouh7hbFMq94LAL+5Wj+RTZZwiFzYMUZ+IE2R0duumYDsHSZLH3uCg57RDgxC5 5i80rfFHy/R9Q== Date: Wed, 8 Feb 2023 19:08:33 +0000 From: Jonathan Cameron To: Gatien CHEVALLIER Cc: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Loic PALLARDY Subject: Re: [PATCH v3 4/6] bus: stm32_sys_bus: add support for STM32MP15 and STM32MP13 system bus Message-ID: <20230208190833.532cd60c@jic23-huawei> In-Reply-To: References: <20230127164040.1047583-1-gatien.chevallier@foss.st.com> <20230127164040.1047583-5-gatien.chevallier@foss.st.com> <20230128161217.0e79436e@jic23-huawei> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.36; x86_64-pc-linux-gnu) MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230208_105439_614660_21AB1724 X-CRM114-Status: GOOD ( 27.29 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On Tue, 7 Feb 2023 15:12:23 +0100 Gatien CHEVALLIER wrote: > Hi Jonathan, > > On 1/28/23 17:12, Jonathan Cameron wrote: > > On Fri, 27 Jan 2023 17:40:38 +0100 > > Gatien Chevallier wrote: > > > >> This driver is checking the access rights of the different > >> peripherals connected to the system bus. If access is denied, > >> the associated device tree node is skipped so the platform bus > >> does not probe it. > >> > >> Signed-off-by: Gatien Chevallier > >> Signed-off-by: Loic PALLARDY > > > > Hi Gatien, > > > > A few comments inline, > > > > Thanks, > > > > Jonathan > > > >> diff --git a/drivers/bus/stm32_sys_bus.c b/drivers/bus/stm32_sys_bus.c > >> new file mode 100644 > >> index 000000000000..c12926466bae > >> --- /dev/null > >> +++ b/drivers/bus/stm32_sys_bus.c > >> @@ -0,0 +1,168 @@ > >> +// SPDX-License-Identifier: GPL-2.0 > >> +/* > >> + * Copyright (C) 2023, STMicroelectronics - All Rights Reserved > >> + */ > >> + > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> + > >> +/* ETZPC peripheral as firewall bus */ > >> +/* ETZPC registers */ > >> +#define ETZPC_DECPROT 0x10 > >> + > >> +/* ETZPC miscellaneous */ > >> +#define ETZPC_PROT_MASK GENMASK(1, 0) > >> +#define ETZPC_PROT_A7NS 0x3 > >> +#define ETZPC_DECPROT_SHIFT 1 > > > > This define makes the code harder to read. What we care about is > > the number of bits in the register divided by number of entries. > > (which is 2) hence the shift by 1. See below for more on this. > > > > > >> + > >> +#define IDS_PER_DECPROT_REGS 16 > > > >> +#define STM32MP15_ETZPC_ENTRIES 96 > >> +#define STM32MP13_ETZPC_ENTRIES 64 > > > > These defines just make the code harder to check. > > They aren't magic numbers, but rather just telling us how many > > entries there are, so I would just put them in the structures directly. > > Their use make it clear what they are without needing to give them a name. > > > > Honestly, I'd rather read the hardware configuration registers to get > this information instead of differentiating MP13/15. Would you agree on > that? Sure, if they are discoverable even better. -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 04325C05027 for ; Wed, 8 Feb 2023 18:56:07 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id AE38183E; Wed, 8 Feb 2023 19:55:14 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz AE38183E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1675882564; bh=xTtM9WlSf7bwExmahb6XOjPHbEjpNPb+C9ZLErT3mV8=; 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dkim=pass (2048-bit key, unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=kJN28Uve Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 4DC2A617B8; Wed, 8 Feb 2023 18:54:34 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0CB21C433D2; Wed, 8 Feb 2023 18:54:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1675882473; bh=xTtM9WlSf7bwExmahb6XOjPHbEjpNPb+C9ZLErT3mV8=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=kJN28UveNEt23ZFALxkKRAduymcXqKXXhl5ZE6krYfbalb6HMbzHo9qeVzvcHI7Wm H7S6jcL16vD7PqCbUM676t6Ujn2JFJPW6F8SYQEY0t+JColJ5tdmzL8HnmWP59Mv+N h1XG21jruiC7Pqu0lZhIHvhdf8KfE3r2XiOfPuEIw7UtbGW+1gt8cYhRh3sZd6iQB0 OKQT0joBdQfoYqU3AXs0x+0ro+BNaKQvYiFcCdFS93pX8FTqdLs62iSLZQceti8ikH 8vqlPouh7hbFMq94LAL+5Wj+RTZZwiFzYMUZ+IE2R0duumYDsHSZLH3uCg57RDgxC5 5i80rfFHy/R9Q== Date: Wed, 8 Feb 2023 19:08:33 +0000 From: Jonathan Cameron To: Gatien CHEVALLIER Subject: Re: [PATCH v3 4/6] bus: stm32_sys_bus: add support for STM32MP15 and STM32MP13 system bus Message-ID: <20230208190833.532cd60c@jic23-huawei> In-Reply-To: References: <20230127164040.1047583-1-gatien.chevallier@foss.st.com> <20230127164040.1047583-5-gatien.chevallier@foss.st.com> <20230128161217.0e79436e@jic23-huawei> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.36; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Message-ID-Hash: FDJJXAC3MMCNJJUN7J7GVFN7GO5JJH2F X-Message-ID-Hash: FDJJXAC3MMCNJJUN7J7GVFN7GO5JJH2F X-MailFrom: jic23@kernel.org X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-alsa-devel.alsa-project.org-0; header-match-alsa-devel.alsa-project.org-1; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: Oleksii_Moisieiev@epam.com, gregkh@linuxfoundation.org, herbert@gondor.apana.org.au, davem@davemloft.net, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, alexandre.torgue@foss.st.com, vkoul@kernel.org, olivier.moysan@foss.st.com, arnaud.pouliquen@foss.st.com, mchehab@kernel.org, fabrice.gasnier@foss.st.com, ulf.hansson@linaro.org, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, linux-i2c@vger.kernel.org, linux-iio@vger.kernel.org, alsa-devel@alsa-project.org, linux-media@vger.kernel.org, linux-mmc@vger.kernel.org, netdev@vger.kernel.org, linux-phy@lists.infradead.org, linux-serial@vger.kernel.org, linux-spi@vger.kernel.org, linux-usb@vger.kernel.org, Loic PALLARDY X-Mailman-Version: 3.3.8 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: On Tue, 7 Feb 2023 15:12:23 +0100 Gatien CHEVALLIER wrote: > Hi Jonathan, > > On 1/28/23 17:12, Jonathan Cameron wrote: > > On Fri, 27 Jan 2023 17:40:38 +0100 > > Gatien Chevallier wrote: > > > >> This driver is checking the access rights of the different > >> peripherals connected to the system bus. If access is denied, > >> the associated device tree node is skipped so the platform bus > >> does not probe it. > >> > >> Signed-off-by: Gatien Chevallier > >> Signed-off-by: Loic PALLARDY > > > > Hi Gatien, > > > > A few comments inline, > > > > Thanks, > > > > Jonathan > > > >> diff --git a/drivers/bus/stm32_sys_bus.c b/drivers/bus/stm32_sys_bus.c > >> new file mode 100644 > >> index 000000000000..c12926466bae > >> --- /dev/null > >> +++ b/drivers/bus/stm32_sys_bus.c > >> @@ -0,0 +1,168 @@ > >> +// SPDX-License-Identifier: GPL-2.0 > >> +/* > >> + * Copyright (C) 2023, STMicroelectronics - All Rights Reserved > >> + */ > >> + > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> +#include > >> + > >> +/* ETZPC peripheral as firewall bus */ > >> +/* ETZPC registers */ > >> +#define ETZPC_DECPROT 0x10 > >> + > >> +/* ETZPC miscellaneous */ > >> +#define ETZPC_PROT_MASK GENMASK(1, 0) > >> +#define ETZPC_PROT_A7NS 0x3 > >> +#define ETZPC_DECPROT_SHIFT 1 > > > > This define makes the code harder to read. What we care about is > > the number of bits in the register divided by number of entries. > > (which is 2) hence the shift by 1. See below for more on this. > > > > > >> + > >> +#define IDS_PER_DECPROT_REGS 16 > > > >> +#define STM32MP15_ETZPC_ENTRIES 96 > >> +#define STM32MP13_ETZPC_ENTRIES 64 > > > > These defines just make the code harder to check. > > They aren't magic numbers, but rather just telling us how many > > entries there are, so I would just put them in the structures directly. > > Their use make it clear what they are without needing to give them a name. > > > > Honestly, I'd rather read the hardware configuration registers to get > this information instead of differentiating MP13/15. Would you agree on > that? Sure, if they are discoverable even better.