From: Jing Zhang <jingzhangos@google.com> To: KVM <kvm@vger.kernel.org>, KVMARM <kvmarm@lists.linux.dev>, ARMLinux <linux-arm-kernel@lists.infradead.org>, Marc Zyngier <maz@kernel.org>, Oliver Upton <oupton@google.com> Cc: Will Deacon <will@kernel.org>, Paolo Bonzini <pbonzini@redhat.com>, James Morse <james.morse@arm.com>, Alexandru Elisei <alexandru.elisei@arm.com>, Suzuki K Poulose <suzuki.poulose@arm.com>, Fuad Tabba <tabba@google.com>, Reiji Watanabe <reijiw@google.com>, Ricardo Koller <ricarkol@google.com>, Raghavendra Rao Ananta <rananta@google.com>, Jing Zhang <jingzhangos@google.com> Subject: [PATCH v2 0/6] Support writable CPU ID registers from userspace Date: Sun, 12 Feb 2023 21:58:24 +0000 [thread overview] Message-ID: <20230212215830.2975485-1-jingzhangos@google.com> (raw) This patchset refactors/adds code to support writable per guest CPU ID feature registers. Part of the code/ideas are from https://lore.kernel.org/all/20220419065544.3616948-1-reijiw@google.com . No functional change is intended in this patchset. With the new CPU ID feature registers infrastructure, only writtings of ID_AA64PFR0_EL1.[CSV2|CSV3], ID_AA64DFR0_EL1.PMUVer and ID_DFR0_ELF.PerfMon are allowed as KVM does before. Writable (Configurable) per guest CPU ID feature registers are useful for creating/migrating guest on ARM CPUs with different kinds of features. --- * v1 -> v2 - Rebase to 7121a2e1d107 (kvmarm/next) Merge branch kvm-arm64/nv-prefix into kvmarm/next - Address writing issue for PMUVer [1] https://lore.kernel.org/all/20230201025048.205820-1-jingzhangos@google.com --- Jing Zhang (5): KVM: arm64: Move CPU ID feature registers emulation into a separate file KVM: arm64: Use per guest ID register for ID_AA64PFR0_EL1.[CSV2|CSV3] KVM: arm64: Use per guest ID register for ID_AA64DFR0_EL1.PMUVer KVM: arm64: Introduce ID register specific descriptor KVM: arm64: Refactor writings for PMUVer/CSV2/CSV3 Reiji Watanabe (1): KVM: arm64: Save ID registers' sanitized value per guest arch/arm64/include/asm/cpufeature.h | 25 + arch/arm64/include/asm/kvm_host.h | 26 +- arch/arm64/kernel/cpufeature.c | 26 +- arch/arm64/kvm/Makefile | 2 +- arch/arm64/kvm/arm.c | 24 +- arch/arm64/kvm/hyp/nvhe/sys_regs.c | 7 +- arch/arm64/kvm/id_regs.c | 773 ++++++++++++++++++++++++++++ arch/arm64/kvm/sys_regs.c | 468 +---------------- arch/arm64/kvm/sys_regs.h | 30 ++ include/kvm/arm_pmu.h | 6 +- 10 files changed, 885 insertions(+), 502 deletions(-) create mode 100644 arch/arm64/kvm/id_regs.c base-commit: 7121a2e1d1070913f692d32806a36b8b3b3f0008 -- 2.39.1.581.gbfd45094c4-goog
WARNING: multiple messages have this Message-ID (diff)
From: Jing Zhang <jingzhangos@google.com> To: KVM <kvm@vger.kernel.org>, KVMARM <kvmarm@lists.linux.dev>, ARMLinux <linux-arm-kernel@lists.infradead.org>, Marc Zyngier <maz@kernel.org>, Oliver Upton <oupton@google.com> Cc: Will Deacon <will@kernel.org>, Paolo Bonzini <pbonzini@redhat.com>, James Morse <james.morse@arm.com>, Alexandru Elisei <alexandru.elisei@arm.com>, Suzuki K Poulose <suzuki.poulose@arm.com>, Fuad Tabba <tabba@google.com>, Reiji Watanabe <reijiw@google.com>, Ricardo Koller <ricarkol@google.com>, Raghavendra Rao Ananta <rananta@google.com>, Jing Zhang <jingzhangos@google.com> Subject: [PATCH v2 0/6] Support writable CPU ID registers from userspace Date: Sun, 12 Feb 2023 21:58:24 +0000 [thread overview] Message-ID: <20230212215830.2975485-1-jingzhangos@google.com> (raw) This patchset refactors/adds code to support writable per guest CPU ID feature registers. Part of the code/ideas are from https://lore.kernel.org/all/20220419065544.3616948-1-reijiw@google.com . No functional change is intended in this patchset. With the new CPU ID feature registers infrastructure, only writtings of ID_AA64PFR0_EL1.[CSV2|CSV3], ID_AA64DFR0_EL1.PMUVer and ID_DFR0_ELF.PerfMon are allowed as KVM does before. Writable (Configurable) per guest CPU ID feature registers are useful for creating/migrating guest on ARM CPUs with different kinds of features. --- * v1 -> v2 - Rebase to 7121a2e1d107 (kvmarm/next) Merge branch kvm-arm64/nv-prefix into kvmarm/next - Address writing issue for PMUVer [1] https://lore.kernel.org/all/20230201025048.205820-1-jingzhangos@google.com --- Jing Zhang (5): KVM: arm64: Move CPU ID feature registers emulation into a separate file KVM: arm64: Use per guest ID register for ID_AA64PFR0_EL1.[CSV2|CSV3] KVM: arm64: Use per guest ID register for ID_AA64DFR0_EL1.PMUVer KVM: arm64: Introduce ID register specific descriptor KVM: arm64: Refactor writings for PMUVer/CSV2/CSV3 Reiji Watanabe (1): KVM: arm64: Save ID registers' sanitized value per guest arch/arm64/include/asm/cpufeature.h | 25 + arch/arm64/include/asm/kvm_host.h | 26 +- arch/arm64/kernel/cpufeature.c | 26 +- arch/arm64/kvm/Makefile | 2 +- arch/arm64/kvm/arm.c | 24 +- arch/arm64/kvm/hyp/nvhe/sys_regs.c | 7 +- arch/arm64/kvm/id_regs.c | 773 ++++++++++++++++++++++++++++ arch/arm64/kvm/sys_regs.c | 468 +---------------- arch/arm64/kvm/sys_regs.h | 30 ++ include/kvm/arm_pmu.h | 6 +- 10 files changed, 885 insertions(+), 502 deletions(-) create mode 100644 arch/arm64/kvm/id_regs.c base-commit: 7121a2e1d1070913f692d32806a36b8b3b3f0008 -- 2.39.1.581.gbfd45094c4-goog _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2023-02-12 21:58 UTC|newest] Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-02-12 21:58 Jing Zhang [this message] 2023-02-12 21:58 ` [PATCH v2 0/6] Support writable CPU ID registers from userspace Jing Zhang 2023-02-12 21:58 ` [PATCH v2 1/6] KVM: arm64: Move CPU ID feature registers emulation into a separate file Jing Zhang 2023-02-12 21:58 ` Jing Zhang 2023-02-24 1:01 ` Reiji Watanabe 2023-02-24 1:01 ` Reiji Watanabe 2023-02-24 11:05 ` Marc Zyngier 2023-02-24 11:05 ` Marc Zyngier 2023-02-27 2:54 ` Jing Zhang 2023-02-27 2:54 ` Jing Zhang 2023-02-12 21:58 ` [PATCH v2 2/6] KVM: arm64: Save ID registers' sanitized value per guest Jing Zhang 2023-02-12 21:58 ` Jing Zhang 2023-02-12 21:58 ` [PATCH v2 3/6] KVM: arm64: Use per guest ID register for ID_AA64PFR0_EL1.[CSV2|CSV3] Jing Zhang 2023-02-12 21:58 ` Jing Zhang 2023-02-12 21:58 ` [PATCH v2 4/6] KVM: arm64: Use per guest ID register for ID_AA64DFR0_EL1.PMUVer Jing Zhang 2023-02-12 21:58 ` Jing Zhang 2023-02-25 2:35 ` Reiji Watanabe 2023-02-25 2:35 ` Reiji Watanabe 2023-02-27 2:57 ` Jing Zhang 2023-02-27 2:57 ` Jing Zhang 2023-02-12 21:58 ` [PATCH v2 5/6] KVM: arm64: Introduce ID register specific descriptor Jing Zhang 2023-02-12 21:58 ` Jing Zhang 2023-02-25 4:00 ` Reiji Watanabe 2023-02-25 4:00 ` Reiji Watanabe 2023-02-27 3:04 ` Jing Zhang 2023-02-27 3:04 ` Jing Zhang 2023-02-27 22:23 ` Reiji Watanabe 2023-02-27 22:23 ` Reiji Watanabe 2023-02-28 1:52 ` Jing Zhang 2023-02-28 1:52 ` Jing Zhang 2023-02-12 21:58 ` [PATCH v2 6/6] KVM: arm64: Refactor writings for PMUVer/CSV2/CSV3 Jing Zhang 2023-02-12 21:58 ` Jing Zhang
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