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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id o10-20020a1c750a000000b003e7c89b3514sm7060640wmc.23.2023.02.22.22.51.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Feb 2023 22:51:56 -0800 (PST) Date: Thu, 23 Feb 2023 07:51:55 +0100 From: Andrew Jones To: Sia Jee Heng Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, leyfoon.tan@starfivetech.com, mason.huo@starfivetech.com Subject: Re: [PATCH v4 2/4] RISC-V: Factor out common code of __cpu_resume_enter() Message-ID: <20230223065155.olemrm7cskwclzt7@orel> References: <20230221023523.1498500-1-jeeheng.sia@starfivetech.com> <20230221023523.1498500-3-jeeheng.sia@starfivetech.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230221023523.1498500-3-jeeheng.sia@starfivetech.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Feb 21, 2023 at 10:35:21AM +0800, Sia Jee Heng wrote: > The cpu_resume() function is very similar for the suspend to disk and > suspend to ram cases. Factor out the common code into restore_csr macro > and restore_reg macro. > > Signed-off-by: Sia Jee Heng > --- > arch/riscv/include/asm/assembler.h | 62 ++++++++++++++++++++++++++++++ > arch/riscv/kernel/suspend_entry.S | 34 ++-------------- > 2 files changed, 65 insertions(+), 31 deletions(-) > create mode 100644 arch/riscv/include/asm/assembler.h > > diff --git a/arch/riscv/include/asm/assembler.h b/arch/riscv/include/asm/assembler.h > new file mode 100644 > index 000000000000..727a97735493 > --- /dev/null > +++ b/arch/riscv/include/asm/assembler.h > @@ -0,0 +1,62 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Copyright (C) 2023 StarFive Technology Co., Ltd. > + * > + * Author: Jee Heng Sia > + */ > + > +#ifndef __ASSEMBLY__ > +#error "Only include this from assembly code" > +#endif > + > +#ifndef __ASM_ASSEMBLER_H > +#define __ASM_ASSEMBLER_H > + > +#include > +#include > +#include > + > +/* > + * restore_csr - restore hart's CSR value > + */ > + .macro restore_csr Since there are more than one, 'restore_csrs' would be more appropriate and s/CSR value/CSRs/ > + REG_L t0, (SUSPEND_CONTEXT_REGS + PT_EPC)(a0) > + csrw CSR_EPC, t0 > + REG_L t0, (SUSPEND_CONTEXT_REGS + PT_STATUS)(a0) > + csrw CSR_STATUS, t0 > + REG_L t0, (SUSPEND_CONTEXT_REGS + PT_BADADDR)(a0) > + csrw CSR_TVAL, t0 > + REG_L t0, (SUSPEND_CONTEXT_REGS + PT_CAUSE)(a0) > + csrw CSR_CAUSE, t0 > + .endm > + > +/* > + * restore_reg - Restore registers (except A0 and T0-T6) > + */ > + .macro restore_reg restore_regs > + REG_L ra, (SUSPEND_CONTEXT_REGS + PT_RA)(a0) > + REG_L sp, (SUSPEND_CONTEXT_REGS + PT_SP)(a0) > + REG_L gp, (SUSPEND_CONTEXT_REGS + PT_GP)(a0) > + REG_L tp, (SUSPEND_CONTEXT_REGS + PT_TP)(a0) > + REG_L s0, (SUSPEND_CONTEXT_REGS + PT_S0)(a0) > + REG_L s1, (SUSPEND_CONTEXT_REGS + PT_S1)(a0) > + REG_L a1, (SUSPEND_CONTEXT_REGS + PT_A1)(a0) > + REG_L a2, (SUSPEND_CONTEXT_REGS + PT_A2)(a0) > + REG_L a3, (SUSPEND_CONTEXT_REGS + PT_A3)(a0) > + REG_L a4, (SUSPEND_CONTEXT_REGS + PT_A4)(a0) > + REG_L a5, (SUSPEND_CONTEXT_REGS + PT_A5)(a0) > + REG_L a6, (SUSPEND_CONTEXT_REGS + PT_A6)(a0) > + REG_L a7, (SUSPEND_CONTEXT_REGS + PT_A7)(a0) > + REG_L s2, (SUSPEND_CONTEXT_REGS + PT_S2)(a0) > + REG_L s3, (SUSPEND_CONTEXT_REGS + PT_S3)(a0) > + REG_L s4, (SUSPEND_CONTEXT_REGS + PT_S4)(a0) > + REG_L s5, (SUSPEND_CONTEXT_REGS + PT_S5)(a0) > + REG_L s6, (SUSPEND_CONTEXT_REGS + PT_S6)(a0) > + REG_L s7, (SUSPEND_CONTEXT_REGS + PT_S7)(a0) > + REG_L s8, (SUSPEND_CONTEXT_REGS + PT_S8)(a0) > + REG_L s9, (SUSPEND_CONTEXT_REGS + PT_S9)(a0) > + REG_L s10, (SUSPEND_CONTEXT_REGS + PT_S10)(a0) > + REG_L s11, (SUSPEND_CONTEXT_REGS + PT_S11)(a0) > + .endm > + > +#endif /* __ASM_ASSEMBLER_H */ > diff --git a/arch/riscv/kernel/suspend_entry.S b/arch/riscv/kernel/suspend_entry.S > index aafcca58c19d..74a8fab8e0f6 100644 > --- a/arch/riscv/kernel/suspend_entry.S > +++ b/arch/riscv/kernel/suspend_entry.S > @@ -7,6 +7,7 @@ > #include > #include > #include > +#include > #include > #include > > @@ -83,39 +84,10 @@ ENTRY(__cpu_resume_enter) > add a0, a1, zero > > /* Restore CSRs */ > - REG_L t0, (SUSPEND_CONTEXT_REGS + PT_EPC)(a0) > - csrw CSR_EPC, t0 > - REG_L t0, (SUSPEND_CONTEXT_REGS + PT_STATUS)(a0) > - csrw CSR_STATUS, t0 > - REG_L t0, (SUSPEND_CONTEXT_REGS + PT_BADADDR)(a0) > - csrw CSR_TVAL, t0 > - REG_L t0, (SUSPEND_CONTEXT_REGS + PT_CAUSE)(a0) > - csrw CSR_CAUSE, t0 > + restore_csr > > /* Restore registers (except A0 and T0-T6) */ > - REG_L ra, (SUSPEND_CONTEXT_REGS + PT_RA)(a0) > - REG_L sp, (SUSPEND_CONTEXT_REGS + PT_SP)(a0) > - REG_L gp, (SUSPEND_CONTEXT_REGS + PT_GP)(a0) > - REG_L tp, (SUSPEND_CONTEXT_REGS + PT_TP)(a0) > - REG_L s0, (SUSPEND_CONTEXT_REGS + PT_S0)(a0) > - REG_L s1, (SUSPEND_CONTEXT_REGS + PT_S1)(a0) > - REG_L a1, (SUSPEND_CONTEXT_REGS + PT_A1)(a0) > - REG_L a2, (SUSPEND_CONTEXT_REGS + PT_A2)(a0) > - REG_L a3, (SUSPEND_CONTEXT_REGS + PT_A3)(a0) > - REG_L a4, (SUSPEND_CONTEXT_REGS + PT_A4)(a0) > - REG_L a5, (SUSPEND_CONTEXT_REGS + PT_A5)(a0) > - REG_L a6, (SUSPEND_CONTEXT_REGS + PT_A6)(a0) > - REG_L a7, (SUSPEND_CONTEXT_REGS + PT_A7)(a0) > - REG_L s2, (SUSPEND_CONTEXT_REGS + PT_S2)(a0) > - REG_L s3, (SUSPEND_CONTEXT_REGS + PT_S3)(a0) > - REG_L s4, (SUSPEND_CONTEXT_REGS + PT_S4)(a0) > - REG_L s5, (SUSPEND_CONTEXT_REGS + PT_S5)(a0) > - REG_L s6, (SUSPEND_CONTEXT_REGS + PT_S6)(a0) > - REG_L s7, (SUSPEND_CONTEXT_REGS + PT_S7)(a0) > - REG_L s8, (SUSPEND_CONTEXT_REGS + PT_S8)(a0) > - REG_L s9, (SUSPEND_CONTEXT_REGS + PT_S9)(a0) > - REG_L s10, (SUSPEND_CONTEXT_REGS + PT_S10)(a0) > - REG_L s11, (SUSPEND_CONTEXT_REGS + PT_S11)(a0) > + restore_reg > > /* Return zero value */ > add a0, zero, zero > -- > 2.34.1 > Otherwise, Reviewed-by: Andrew Jones Thanks, drew From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6FE3BC61DA4 for ; Thu, 23 Feb 2023 06:52:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ZLeeZ7sR6bhmt3XcWKF/sabsWki6TYAf7wZXerSLqOc=; b=1uVZGTiG4lkwwJ t2BjQSu7ajI0r6lSaZ6yooZlo1qTdRLw3iPc8DgDgwhbJyOBITu+P1tGcK0P6rrUWalp/+sJosnBt z7l5JO3cgj8N4+8mqU48JoaUE0npAOa1JiyWIHNNRg4EHPV31E3erycHd0tyFvFJ5ztzxspv3axH3 m0QzkBNAzl9CmDqQI4703DoI1ZfEebsVtsLxRKNgeLC2neMEkyWnkgogREitlqNZ3+faJMWaV/z9c FM0lgOTmCQT6SYDFFrVicjF69/eYKaMMgtOX7px0+9Tizt0ZhbtOqwA82LMrWbY3hRl9z5Yyn216r UMv5De33F6fvl5ku2UdA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pV5SU-00FLFG-I5; Thu, 23 Feb 2023 06:52:02 +0000 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pV5SQ-00FLES-Qp for linux-riscv@lists.infradead.org; Thu, 23 Feb 2023 06:52:00 +0000 Received: by mail-wm1-x332.google.com with SMTP id o4-20020a05600c4fc400b003e1f5f2a29cso8816097wmq.4 for ; Wed, 22 Feb 2023 22:51:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=+oGK8l3h5mbmCerxLjxKkoOYJJK4jmO+pFA71/6qBSk=; b=gZOsJetwwA096bJeZOCLUyT+WhDQQ+7XVqWgFcHzpjnkTk7h+88YGAH9HLSTwaAVd4 ya+hTZLxYf7jT8hqjDKjkkp1my1GNG4ye7+m32krEdZlDiQnvYH96mnhB0jBZA+7OCpM kxdWvVpsPLOfpuBtdb4kbifqMcDeqRU1qfYvpZNwD2Sx8Jc9fqnek29iP1bCBeRyvXEP BBWncW685axavBDZbeookh8b6FsDRFYwYl6EhyWN/fxZpbyfwePSdV+IHKH/OFE3wuql Xk9xZqf5h0pwWlNfKmAAaZwfUq5+lNa77XHH2TRt/JFHyZTwsVqrj4QyQvCYCbMzbjHr oBIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=+oGK8l3h5mbmCerxLjxKkoOYJJK4jmO+pFA71/6qBSk=; b=O69IvLDnCV+kX4vfoHtmFtMJKsv/YzbqCmpQVx+P/FzXSBC4lfCC1AM8wKP6UIV1ty rmbcZgxINKdfMzXvA2G7FSVlWB1+a1g8qLuzDvVv3XREjroPJ1FRPHyvlATIZQjxu2ke y3cMA3k9hc7dhjCs4pOUSOW1zRs0aWYkylCMsypSaDUnDf39T/HPcblPE+50QQWeKPIy navHirS4wN8yWwNK+CUzCgNB3eshdNT/pChKMtetznIhFUhapqm4/yPzEmBZ+izoMaqi GphNuMqVT7wMfQZF1Ka1deVA0q8M1BRSHH3K2UVI2p0KfzUQ3jItGlY9tTBKc8+ZwzKq 85lQ== X-Gm-Message-State: AO0yUKWSSoCKpSleKkQRx7tyNYTJVbldzsW9tAVrCdVKE5DS4VfLpOKN cEdsRWGrg6ZegA6DTeFIEDsdtA== X-Google-Smtp-Source: AK7set9KKXCy1PA87S+/ow8hm3ufzjUPKmQkdOBKUkeyFbbVHOzwi3SZkSL9QiE22z6/B1fPW60iGg== X-Received: by 2002:a05:600c:80f:b0:3de:1d31:1043 with SMTP id k15-20020a05600c080f00b003de1d311043mr7645731wmp.21.1677135116963; Wed, 22 Feb 2023 22:51:56 -0800 (PST) Received: from localhost (2001-1ae9-1c2-4c00-20f-c6b4-1e57-7965.ip6.tmcz.cz. [2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id o10-20020a1c750a000000b003e7c89b3514sm7060640wmc.23.2023.02.22.22.51.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Feb 2023 22:51:56 -0800 (PST) Date: Thu, 23 Feb 2023 07:51:55 +0100 From: Andrew Jones To: Sia Jee Heng Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, leyfoon.tan@starfivetech.com, mason.huo@starfivetech.com Subject: Re: [PATCH v4 2/4] RISC-V: Factor out common code of __cpu_resume_enter() Message-ID: <20230223065155.olemrm7cskwclzt7@orel> References: <20230221023523.1498500-1-jeeheng.sia@starfivetech.com> <20230221023523.1498500-3-jeeheng.sia@starfivetech.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230221023523.1498500-3-jeeheng.sia@starfivetech.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230222_225158_915234_ADFD8EA2 X-CRM114-Status: GOOD ( 17.66 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Tue, Feb 21, 2023 at 10:35:21AM +0800, Sia Jee Heng wrote: > The cpu_resume() function is very similar for the suspend to disk and > suspend to ram cases. Factor out the common code into restore_csr macro > and restore_reg macro. > > Signed-off-by: Sia Jee Heng > --- > arch/riscv/include/asm/assembler.h | 62 ++++++++++++++++++++++++++++++ > arch/riscv/kernel/suspend_entry.S | 34 ++-------------- > 2 files changed, 65 insertions(+), 31 deletions(-) > create mode 100644 arch/riscv/include/asm/assembler.h > > diff --git a/arch/riscv/include/asm/assembler.h b/arch/riscv/include/asm/assembler.h > new file mode 100644 > index 000000000000..727a97735493 > --- /dev/null > +++ b/arch/riscv/include/asm/assembler.h > @@ -0,0 +1,62 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Copyright (C) 2023 StarFive Technology Co., Ltd. > + * > + * Author: Jee Heng Sia > + */ > + > +#ifndef __ASSEMBLY__ > +#error "Only include this from assembly code" > +#endif > + > +#ifndef __ASM_ASSEMBLER_H > +#define __ASM_ASSEMBLER_H > + > +#include > +#include > +#include > + > +/* > + * restore_csr - restore hart's CSR value > + */ > + .macro restore_csr Since there are more than one, 'restore_csrs' would be more appropriate and s/CSR value/CSRs/ > + REG_L t0, (SUSPEND_CONTEXT_REGS + PT_EPC)(a0) > + csrw CSR_EPC, t0 > + REG_L t0, (SUSPEND_CONTEXT_REGS + PT_STATUS)(a0) > + csrw CSR_STATUS, t0 > + REG_L t0, (SUSPEND_CONTEXT_REGS + PT_BADADDR)(a0) > + csrw CSR_TVAL, t0 > + REG_L t0, (SUSPEND_CONTEXT_REGS + PT_CAUSE)(a0) > + csrw CSR_CAUSE, t0 > + .endm > + > +/* > + * restore_reg - Restore registers (except A0 and T0-T6) > + */ > + .macro restore_reg restore_regs > + REG_L ra, (SUSPEND_CONTEXT_REGS + PT_RA)(a0) > + REG_L sp, (SUSPEND_CONTEXT_REGS + PT_SP)(a0) > + REG_L gp, (SUSPEND_CONTEXT_REGS + PT_GP)(a0) > + REG_L tp, (SUSPEND_CONTEXT_REGS + PT_TP)(a0) > + REG_L s0, (SUSPEND_CONTEXT_REGS + PT_S0)(a0) > + REG_L s1, (SUSPEND_CONTEXT_REGS + PT_S1)(a0) > + REG_L a1, (SUSPEND_CONTEXT_REGS + PT_A1)(a0) > + REG_L a2, (SUSPEND_CONTEXT_REGS + PT_A2)(a0) > + REG_L a3, (SUSPEND_CONTEXT_REGS + PT_A3)(a0) > + REG_L a4, (SUSPEND_CONTEXT_REGS + PT_A4)(a0) > + REG_L a5, (SUSPEND_CONTEXT_REGS + PT_A5)(a0) > + REG_L a6, (SUSPEND_CONTEXT_REGS + PT_A6)(a0) > + REG_L a7, (SUSPEND_CONTEXT_REGS + PT_A7)(a0) > + REG_L s2, (SUSPEND_CONTEXT_REGS + PT_S2)(a0) > + REG_L s3, (SUSPEND_CONTEXT_REGS + PT_S3)(a0) > + REG_L s4, (SUSPEND_CONTEXT_REGS + PT_S4)(a0) > + REG_L s5, (SUSPEND_CONTEXT_REGS + PT_S5)(a0) > + REG_L s6, (SUSPEND_CONTEXT_REGS + PT_S6)(a0) > + REG_L s7, (SUSPEND_CONTEXT_REGS + PT_S7)(a0) > + REG_L s8, (SUSPEND_CONTEXT_REGS + PT_S8)(a0) > + REG_L s9, (SUSPEND_CONTEXT_REGS + PT_S9)(a0) > + REG_L s10, (SUSPEND_CONTEXT_REGS + PT_S10)(a0) > + REG_L s11, (SUSPEND_CONTEXT_REGS + PT_S11)(a0) > + .endm > + > +#endif /* __ASM_ASSEMBLER_H */ > diff --git a/arch/riscv/kernel/suspend_entry.S b/arch/riscv/kernel/suspend_entry.S > index aafcca58c19d..74a8fab8e0f6 100644 > --- a/arch/riscv/kernel/suspend_entry.S > +++ b/arch/riscv/kernel/suspend_entry.S > @@ -7,6 +7,7 @@ > #include > #include > #include > +#include > #include > #include > > @@ -83,39 +84,10 @@ ENTRY(__cpu_resume_enter) > add a0, a1, zero > > /* Restore CSRs */ > - REG_L t0, (SUSPEND_CONTEXT_REGS + PT_EPC)(a0) > - csrw CSR_EPC, t0 > - REG_L t0, (SUSPEND_CONTEXT_REGS + PT_STATUS)(a0) > - csrw CSR_STATUS, t0 > - REG_L t0, (SUSPEND_CONTEXT_REGS + PT_BADADDR)(a0) > - csrw CSR_TVAL, t0 > - REG_L t0, (SUSPEND_CONTEXT_REGS + PT_CAUSE)(a0) > - csrw CSR_CAUSE, t0 > + restore_csr > > /* Restore registers (except A0 and T0-T6) */ > - REG_L ra, (SUSPEND_CONTEXT_REGS + PT_RA)(a0) > - REG_L sp, (SUSPEND_CONTEXT_REGS + PT_SP)(a0) > - REG_L gp, (SUSPEND_CONTEXT_REGS + PT_GP)(a0) > - REG_L tp, (SUSPEND_CONTEXT_REGS + PT_TP)(a0) > - REG_L s0, (SUSPEND_CONTEXT_REGS + PT_S0)(a0) > - REG_L s1, (SUSPEND_CONTEXT_REGS + PT_S1)(a0) > - REG_L a1, (SUSPEND_CONTEXT_REGS + PT_A1)(a0) > - REG_L a2, (SUSPEND_CONTEXT_REGS + PT_A2)(a0) > - REG_L a3, (SUSPEND_CONTEXT_REGS + PT_A3)(a0) > - REG_L a4, (SUSPEND_CONTEXT_REGS + PT_A4)(a0) > - REG_L a5, (SUSPEND_CONTEXT_REGS + PT_A5)(a0) > - REG_L a6, (SUSPEND_CONTEXT_REGS + PT_A6)(a0) > - REG_L a7, (SUSPEND_CONTEXT_REGS + PT_A7)(a0) > - REG_L s2, (SUSPEND_CONTEXT_REGS + PT_S2)(a0) > - REG_L s3, (SUSPEND_CONTEXT_REGS + PT_S3)(a0) > - REG_L s4, (SUSPEND_CONTEXT_REGS + PT_S4)(a0) > - REG_L s5, (SUSPEND_CONTEXT_REGS + PT_S5)(a0) > - REG_L s6, (SUSPEND_CONTEXT_REGS + PT_S6)(a0) > - REG_L s7, (SUSPEND_CONTEXT_REGS + PT_S7)(a0) > - REG_L s8, (SUSPEND_CONTEXT_REGS + PT_S8)(a0) > - REG_L s9, (SUSPEND_CONTEXT_REGS + PT_S9)(a0) > - REG_L s10, (SUSPEND_CONTEXT_REGS + PT_S10)(a0) > - REG_L s11, (SUSPEND_CONTEXT_REGS + PT_S11)(a0) > + restore_reg > > /* Return zero value */ > add a0, zero, zero > -- > 2.34.1 > Otherwise, Reviewed-by: Andrew Jones Thanks, drew _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv