[PATCH 0/7] Add PCIe2 support for Rockchip Boards

[Lucas Tanure <lucas.tanure@collabora.com>]

I am assisting with PCIe and networking bring-up for Rock Pi 5B (RK3588).
This chip uses the same GICv3 as RK356X but has fixed the previous
limitation of GIC only supporting 32-bit addresses.

We sent this RFC a few weeks back:
https://lore.kernel.org/all/CAMdYzYrmq1ftBaBj1XHVWWXUQ4Prr1VpTpunyNOQ2ha-DkXMjQ@mail.gmail.com/

The big change from that RFC to this patch series is the change from
ITS quirks to a DMA Non-Coherent flag, as sugested by Robin Murphy.

This is work based on prior work from XiaoDong Huang and
Peter Geis fixing this issue specifically for Rockchip 356x.
Plus comments of Robin Murphy about Non-Coherent properties.

Lucas Tanure (7):
  irqchip/gic-v3: Add a DMA Non-Coherent flag
  PCI: rockchip-dwc: Add rk3588 compatible line
  dt-bindings: phy: rockchip: Add rk3588 compatible line
  phy: rockchip: Add naneng combo phy support for RK3588
  arm64: dts: rockchip: Add ITS GIC600 configuration for rk3588s
  arm64: dts: rockchip: Add PCIE2.0x1 lane @fe190000 for RK3588s
  arm64: dts: rockchip: RK3588s: Enable PCIE2.0x1 @fe190000

 .../phy/phy-rockchip-naneng-combphy.yaml      |   1 +
 .../boot/dts/rockchip/rk3588-rock-5b.dts      |  18 ++
 arch/arm64/boot/dts/rockchip/rk3588s.dtsi     |  97 +++++++++
 drivers/irqchip/irq-gic-v3-its.c              |  22 +++
 drivers/pci/controller/dwc/pcie-dw-rockchip.c |   1 +
 .../rockchip/phy-rockchip-naneng-combphy.c    | 184 ++++++++++++++++++
 6 files changed, 323 insertions(+)

-- 
2.39.2