All of lore.kernel.org
 help / color / mirror / Atom feed
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
To: lpieralisi@kernel.org, robh+dt@kernel.org, kw@linux.com,
	bhelgaas@google.com, jingoohan1@gmail.com,
	gustavo.pimentel@synopsys.com
Cc: Sergey.Semin@baikalelectronics.ru, marek.vasut+renesas@gmail.com,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Subject: [PATCH v11 06/13] PCI: Add PCI_EXP_LNKCAP_MLW macros
Date: Fri, 10 Mar 2023 21:35:03 +0900	[thread overview]
Message-ID: <20230310123510.675685-7-yoshihiro.shimoda.uh@renesas.com> (raw)
In-Reply-To: <20230310123510.675685-1-yoshihiro.shimoda.uh@renesas.com>

Add macros defining Maximum Link Width bits in Link Capabilities
Register.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
---
 include/uapi/linux/pci_regs.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index dc2000e0fe3a..5d48413ac28f 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -538,6 +538,12 @@
 #define  PCI_EXP_LNKCAP_SLS_16_0GB 0x00000004 /* LNKCAP2 SLS Vector bit 3 */
 #define  PCI_EXP_LNKCAP_SLS_32_0GB 0x00000005 /* LNKCAP2 SLS Vector bit 4 */
 #define  PCI_EXP_LNKCAP_SLS_64_0GB 0x00000006 /* LNKCAP2 SLS Vector bit 5 */
+#define  PCI_EXP_LNKCAP_MLW_X1	0x00000010 /* Maximum Link Width x1 */
+#define  PCI_EXP_LNKCAP_MLW_X2	0x00000020 /* Maximum Link Width x2 */
+#define  PCI_EXP_LNKCAP_MLW_X4	0x00000040 /* Maximum Link Width x4 */
+#define  PCI_EXP_LNKCAP_MLW_X8	0x00000080 /* Maximum Link Width x8 */
+#define  PCI_EXP_LNKCAP_MLW_X12	0x000000c0 /* Maximum Link Width x12 */
+#define  PCI_EXP_LNKCAP_MLW_X16	0x00000100 /* Maximum Link Width x16 */
 #define  PCI_EXP_LNKCAP_MLW	0x000003f0 /* Maximum Link Width */
 #define  PCI_EXP_LNKCAP_ASPMS	0x00000c00 /* ASPM Support */
 #define  PCI_EXP_LNKCAP_ASPM_L0S 0x00000400 /* ASPM L0s Support */
-- 
2.25.1


  parent reply	other threads:[~2023-03-10 12:35 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-10 12:34 [PATCH v11 00/13] PCI: rcar-gen4: Add R-Car Gen4 PCIe support Yoshihiro Shimoda
2023-03-10 12:34 ` [PATCH v11 01/13] PCI: dwc: Fix writing wrong value if snps,enable-cdm-check Yoshihiro Shimoda
2023-03-21  9:02   ` Serge Semin
2023-03-21 18:52     ` Bjorn Helgaas
2023-03-21 19:33       ` Serge Semin
2023-03-10 12:34 ` [PATCH v11 02/13] PCI: endpoint: functions/pci-epf-test: Fix dma_chan direction Yoshihiro Shimoda
2023-04-12  4:23   ` Kunihiko Hayashi
2023-04-12  5:22     ` Yoshihiro Shimoda
2023-03-10 12:35 ` [PATCH v11 03/13] dt-bindings: PCI: renesas: Add R-Car Gen4 PCIe Host Yoshihiro Shimoda
2023-03-21 11:36   ` Serge Semin
2023-03-22  0:35     ` Yoshihiro Shimoda
2023-03-22  5:46       ` Serge Semin
2023-03-10 12:35 ` [PATCH v11 04/13] dt-bindings: PCI: renesas: Add R-Car Gen4 PCIe Endpoint Yoshihiro Shimoda
2023-03-21 11:43   ` Serge Semin
2023-03-10 12:35 ` [PATCH v11 05/13] PCI: dwc: Refactor PCIE_PORT_LINK_CONTROL handling Yoshihiro Shimoda
2023-03-10 12:35 ` Yoshihiro Shimoda [this message]
2023-03-10 12:35 ` [PATCH v11 07/13] PCI: designware-ep: Expose dw_pcie_ep_exit() to module Yoshihiro Shimoda
2023-03-10 12:35 ` [PATCH v11 08/13] PCI: dwc: Add dw_pcie_num_lanes_setup() Yoshihiro Shimoda
2023-03-22  6:57   ` Serge Semin
2023-03-23 10:49     ` Yoshihiro Shimoda
2023-03-10 12:35 ` [PATCH v11 09/13] PCI: dwc: Add support for triggering legacy IRQs Yoshihiro Shimoda
2023-03-22 16:17   ` Serge Semin
2023-03-23 10:54     ` Yoshihiro Shimoda
2023-03-10 12:35 ` [PATCH v11 10/13] PCI: rcar-gen4: Add R-Car Gen4 PCIe Host support Yoshihiro Shimoda
2023-03-22 17:16   ` Serge Semin
2023-03-23 11:04     ` Yoshihiro Shimoda
2023-03-10 12:35 ` [PATCH v11 11/13] PCI: rcar-gen4-ep: Add R-Car Gen4 PCIe Endpoint support Yoshihiro Shimoda
2023-03-22 17:57   ` Serge Semin
2023-03-23 11:18     ` Yoshihiro Shimoda
2023-03-10 12:35 ` [PATCH v11 12/13] MAINTAINERS: Update PCI DRIVER FOR RENESAS R-CAR for R-Car Gen4 Yoshihiro Shimoda
2023-03-10 12:35 ` [PATCH v11 13/13] misc: pci_endpoint_test: Add Device ID for R-Car S4-8 PCIe controller Yoshihiro Shimoda

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230310123510.675685-7-yoshihiro.shimoda.uh@renesas.com \
    --to=yoshihiro.shimoda.uh@renesas.com \
    --cc=Sergey.Semin@baikalelectronics.ru \
    --cc=bhelgaas@google.com \
    --cc=devicetree@vger.kernel.org \
    --cc=gustavo.pimentel@synopsys.com \
    --cc=jingoohan1@gmail.com \
    --cc=kw@linux.com \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-renesas-soc@vger.kernel.org \
    --cc=lpieralisi@kernel.org \
    --cc=marek.vasut+renesas@gmail.com \
    --cc=robh+dt@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.