From: Krishna Kurapati <quic_kriskura@quicinc.com>
To: Thinh Nguyen <Thinh.Nguyen@synopsys.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
"Andy Gross" <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
"Konrad Dybcio" <konrad.dybcio@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Felipe Balbi <balbi@kernel.org>
Cc: <linux-usb@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
<quic_pkondeti@quicinc.com>, <quic_ppratap@quicinc.com>,
<quic_wcheng@quicinc.com>, <quic_jackp@quicinc.com>,
<quic_harshq@quicinc.com>, <ahalaney@redhat.com>,
<quic_shazhuss@quicinc.com>,
Krishna Kurapati <quic_kriskura@quicinc.com>
Subject: [PATCH 5/8] usb: dwc3: qcom: Add multiport controller support for qcom wrapper
Date: Fri, 10 Mar 2023 22:04:17 +0530 [thread overview]
Message-ID: <20230310163420.7582-6-quic_kriskura@quicinc.com> (raw)
In-Reply-To: <20230310163420.7582-1-quic_kriskura@quicinc.com>
QCOM SoC SA8295P's teritiary quad port controller supports 2 HS+SS
ports and 2 HS only ports. Add support for configuring PWR_EVENT_IRQ's
for all the ports during suspend/resume.
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
---
drivers/usb/dwc3/dwc3-qcom.c | 28 ++++++++++++++++++++++------
1 file changed, 22 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/dwc3/dwc3-qcom.c b/drivers/usb/dwc3/dwc3-qcom.c
index 959fc925ca7c..0396f3e9bbe9 100644
--- a/drivers/usb/dwc3/dwc3-qcom.c
+++ b/drivers/usb/dwc3/dwc3-qcom.c
@@ -37,7 +37,10 @@
#define PIPE3_PHYSTATUS_SW BIT(3)
#define PIPE_UTMI_CLK_DIS BIT(8)
-#define PWR_EVNT_IRQ_STAT_REG 0x58
+#define PWR_EVNT_IRQ1_STAT_REG 0x58
+#define PWR_EVNT_IRQ2_STAT_REG 0x1dc
+#define PWR_EVNT_IRQ3_STAT_REG 0x228
+#define PWR_EVNT_IRQ4_STAT_REG 0x238
#define PWR_EVNT_LPM_IN_L2_MASK BIT(4)
#define PWR_EVNT_LPM_OUT_L2_MASK BIT(5)
@@ -93,6 +96,13 @@ struct dwc3_qcom {
struct icc_path *icc_path_apps;
};
+static u32 pwr_evnt_irq_stat_reg_offset[4] = {
+ PWR_EVNT_IRQ1_STAT_REG,
+ PWR_EVNT_IRQ2_STAT_REG,
+ PWR_EVNT_IRQ3_STAT_REG,
+ PWR_EVNT_IRQ4_STAT_REG,
+};
+
static inline void dwc3_qcom_setbits(void __iomem *base, u32 offset, u32 val)
{
u32 reg;
@@ -413,13 +423,16 @@ static int dwc3_qcom_suspend(struct dwc3_qcom *qcom, bool wakeup)
{
u32 val;
int i, ret;
+ struct dwc3 *dwc = platform_get_drvdata(qcom->dwc3);
if (qcom->is_suspended)
return 0;
- val = readl(qcom->qscratch_base + PWR_EVNT_IRQ_STAT_REG);
- if (!(val & PWR_EVNT_LPM_IN_L2_MASK))
- dev_err(qcom->dev, "HS-PHY not in L2\n");
+ for (i = 0; i < dwc->num_ports; i++) {
+ val = readl(qcom->qscratch_base + pwr_evnt_irq_stat_reg_offset[i]);
+ if (!(val & PWR_EVNT_LPM_IN_L2_MASK))
+ dev_err(qcom->dev, "HS-PHY%d not in L2\n", i);
+ }
for (i = qcom->num_clocks - 1; i >= 0; i--)
clk_disable_unprepare(qcom->clks[i]);
@@ -446,6 +459,7 @@ static int dwc3_qcom_resume(struct dwc3_qcom *qcom, bool wakeup)
{
int ret;
int i;
+ struct dwc3 *dwc = platform_get_drvdata(qcom->dwc3);
if (!qcom->is_suspended)
return 0;
@@ -467,8 +481,10 @@ static int dwc3_qcom_resume(struct dwc3_qcom *qcom, bool wakeup)
dev_warn(qcom->dev, "failed to enable interconnect: %d\n", ret);
/* Clear existing events from PHY related to L2 in/out */
- dwc3_qcom_setbits(qcom->qscratch_base, PWR_EVNT_IRQ_STAT_REG,
- PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK);
+ for (i = 0; i < dwc->num_ports; i++)
+ dwc3_qcom_setbits(qcom->qscratch_base,
+ pwr_evnt_irq_stat_reg_offset[i],
+ PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK);
qcom->is_suspended = false;
--
2.39.0
next prev parent reply other threads:[~2023-03-10 16:37 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-10 16:34 [PATCH 0/8] Add multiport support for DWC3 controllers Krishna Kurapati
2023-03-10 16:34 ` [PATCH 1/8] dt-bindings: usb: Add bindings for multiport properties on DWC3 controller Krishna Kurapati
2023-03-10 16:41 ` Krzysztof Kozlowski
2023-03-10 16:54 ` Krishna Kurapati PSSNV
2023-03-10 18:09 ` Krzysztof Kozlowski
2023-03-11 3:01 ` Rob Herring
2023-03-10 16:34 ` [PATCH 2/8] usb: dwc3: core: Access XHCI address space temporarily to read port info Krishna Kurapati
2023-03-10 23:55 ` Thinh Nguyen
2023-03-11 2:54 ` Krishna Kurapati PSSNV
2023-03-11 3:04 ` Krishna Kurapati PSSNV
2023-03-13 23:53 ` Thinh Nguyen
2023-03-10 16:34 ` [PATCH 3/8] usb: dwc3: core: Skip setting event buffers for host only controllers Krishna Kurapati
2023-03-12 9:33 ` Sergei Shtylyov
2023-03-13 2:07 ` Dongliang Mu
2023-03-13 2:56 ` Krishna Kurapati PSSNV
2023-03-10 16:34 ` [PATCH 4/8] usb: dwc3: core: Refactor PHY logic to support Multiport Controller Krishna Kurapati
2023-03-10 16:34 ` Krishna Kurapati [this message]
2023-03-10 16:34 ` [PATCH 6/8] arm64: dts: qcom: sc8280xp: Add multiport controller node for SC8280 Krishna Kurapati
2023-03-10 16:34 ` [PATCH 7/8] arm64: dts: qcom: sa8295p: Enable teritiary controller and its 4 USB ports Krishna Kurapati
2023-03-12 9:31 ` Sergey Shtylyov
2023-03-10 16:34 ` [PATCH 8/8] arm64: dts: qcom: sa8540-ride: Enable first port of teritiary usb controller Krishna Kurapati
2023-03-14 20:32 ` [PATCH 0/8] Add multiport support for DWC3 controllers Adrien Thierry
2023-03-15 4:26 ` Krishna Kurapati PSSNV
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