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[87.0.96.89]) by smtp.gmail.com with ESMTPSA id o15-20020a170906600f00b0092b5384d6desm2965366ejj.153.2023.03.15.14.11.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Mar 2023 14:11:02 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski , Amarula patchwork , Vincent Mailhol , Alexandre Torgue , michael@amarulasolutions.com, Rob Herring , Marc Kleine-Budde , Dario Binacchi , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [RESEND PATCH v7 3/5] ARM: dts: stm32: add CAN support on stm32f429 Date: Wed, 15 Mar 2023 22:10:38 +0100 Message-Id: <20230315211040.2455855-4-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230315211040.2455855-1-dario.binacchi@amarulasolutions.com> References: <20230315211040.2455855-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for bxcan (Basic eXtended CAN controller) to STM32F429. The chip contains two CAN peripherals, CAN1 the master and CAN2 the slave, that share some of the required logic like clock and filters. This means that the slave CAN can't be used without the master CAN. Signed-off-by: Dario Binacchi --- (no changes since v6) Changes in v6: - move can1 node before gcan to keep ordering by address. Changes in v4: - Replace the node can@40006400 (compatible "st,stm32f4-bxcan-core") with the gcan@40006600 node ("sysnode" compatible). The gcan node contains clocks and memory addresses shared by the two can nodes of which it's no longer the parent. - Add to can nodes the "st,gcan" property (global can memory) which references the gcan@40006600 node ("sysnode compatibble). Changes in v3: - Remove 'Dario Binacchi ' SOB. - Add "clocks" to can@0 node. arch/arm/boot/dts/stm32f429.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index c31ceb821231..809b2842ded9 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -362,6 +362,35 @@ i2c3: i2c@40005c00 { status = "disabled"; }; + can1: can@40006400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006400 0x200>; + interrupts = <19>, <20>, <21>, <22>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F4_APB1_RESET(CAN1)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; + st,can-master; + st,gcan = <&gcan>; + status = "disabled"; + }; + + gcan: gcan@40006600 { + compatible = "st,stm32f4-gcan", "syscon"; + reg = <0x40006600 0x200>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; + }; + + can2: can@40006800 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006800 0x200>; + interrupts = <63>, <64>, <65>, <66>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F4_APB1_RESET(CAN2)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>; + st,gcan = <&gcan>; + status = "disabled"; + }; + dac: dac@40007400 { compatible = "st,stm32f4-dac-core"; reg = <0x40007400 0x400>; -- 2.32.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EC975C7618A for ; Wed, 15 Mar 2023 21:12:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=dFX93JeJjqJp8aMb0SPJAaRcYsEBy3iB/ANiXMa2fT0=; b=ScJyj90WOPqdm5 OBWM6gDo+F7qQ6nvOvALnAQOWl4t3NDzC1d5LhFuFHEngQUtCJsUpd1YHZHVxw7lUXVEVq+tb97MF zeqfWFT3Um6amG2a0FAq1EDS32nKZ5H0O9E+nqElXQEPCmp07IYtYYJZr4fbNI1Dy0yX+73a8YYyl fqo0QARE26cTd9gWZ9x6EoYyQVTGuxkqRhcyW/8qv95NVfGtD/tvrDi8FPMNckSVRlQUXHN1pCXpG G0Tood//u7vtwamon97wtiI/1+vtkCJ8Pid0jLin7ha5eJlNofZ/6wt/C5/GpDGjSUuRrrfHusSjl MBVQvjeTLjlB28g/CbaA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pcYP6-00EQqI-24; Wed, 15 Mar 2023 21:11:24 +0000 Received: from mail-ed1-x535.google.com ([2a00:1450:4864:20::535]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pcYOo-00EQlC-2q for linux-arm-kernel@lists.infradead.org; Wed, 15 Mar 2023 21:11:08 +0000 Received: by mail-ed1-x535.google.com with SMTP id ek18so49567961edb.6 for ; Wed, 15 Mar 2023 14:11:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1678914663; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=90w47meUN1AAVQio6KlRg3XgdW53vJW4u/H89twTllI=; b=MsegcRcehzpSfT5JL7t9qBs5Z3LzXzq0kKxWEXzGvwAeNH052yuBvC5uly3NyO9c5K GiYXtHo0nZt4qmquwRQ3nhbLkvf74B4x1pnXLKn7ofcjD0MmmSqti2Fujsb12xizNztg rDW2bikIcpwXUxQGPbagyiFzDWd3jpvTtT1ts= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678914663; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=90w47meUN1AAVQio6KlRg3XgdW53vJW4u/H89twTllI=; b=IAwg1houPmJ1ZwxukgsDCZcx01V26PWPyUHJqJAYanQ5w+l3mN7gpV4OQdFghmUiBp WfC89J1dVq11dTI7N3jg90+JexXR/58TSCtGrKzfByJQSE1BiHDN9ww3r0T3sTRRvs7l VeojEkY8bzKv833KFEFLEgNwARJflvblBuCB3qjJypAzSZrWwgP9bi46A550S83YWtgA mkUvoj9ujMWnHBStRvI+yz1/K/DVMLJpLWDR6V7Z/OFiCwq4tLHboZH9St2p0dQ85MvG uIjilrm3TxqLBJ6xvCgQ2xqnvC8p5dAwnJICxQ7qd/O6v/B0cP8O8PVbLAqTsP0Apr0b 1XKw== X-Gm-Message-State: AO0yUKVuoq+RnYTKcCfLqnsailKgzJrJ57OQ9Rfmsb4zVM9FrT0DDhGt jrQgfBNw0JNJ/1B+w2zXPpwHtg== X-Google-Smtp-Source: AK7set/6gZCgZuysHt4eIbR8wps4ZYsDjM2t04rbduqEPsWRQRNIUfAvDR4zTQM9gyudtep7KGqQ1A== X-Received: by 2002:a17:906:fc0a:b0:91f:c56a:4dd2 with SMTP id ov10-20020a170906fc0a00b0091fc56a4dd2mr7906865ejb.62.1678914662947; Wed, 15 Mar 2023 14:11:02 -0700 (PDT) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-87-0-96-89.retail.telecomitalia.it. [87.0.96.89]) by smtp.gmail.com with ESMTPSA id o15-20020a170906600f00b0092b5384d6desm2965366ejj.153.2023.03.15.14.11.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Mar 2023 14:11:02 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski , Amarula patchwork , Vincent Mailhol , Alexandre Torgue , michael@amarulasolutions.com, Rob Herring , Marc Kleine-Budde , Dario Binacchi , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [RESEND PATCH v7 3/5] ARM: dts: stm32: add CAN support on stm32f429 Date: Wed, 15 Mar 2023 22:10:38 +0100 Message-Id: <20230315211040.2455855-4-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20230315211040.2455855-1-dario.binacchi@amarulasolutions.com> References: <20230315211040.2455855-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230315_141106_917297_3E79A113 X-CRM114-Status: GOOD ( 13.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add support for bxcan (Basic eXtended CAN controller) to STM32F429. The chip contains two CAN peripherals, CAN1 the master and CAN2 the slave, that share some of the required logic like clock and filters. This means that the slave CAN can't be used without the master CAN. Signed-off-by: Dario Binacchi --- (no changes since v6) Changes in v6: - move can1 node before gcan to keep ordering by address. Changes in v4: - Replace the node can@40006400 (compatible "st,stm32f4-bxcan-core") with the gcan@40006600 node ("sysnode" compatible). The gcan node contains clocks and memory addresses shared by the two can nodes of which it's no longer the parent. - Add to can nodes the "st,gcan" property (global can memory) which references the gcan@40006600 node ("sysnode compatibble). Changes in v3: - Remove 'Dario Binacchi ' SOB. - Add "clocks" to can@0 node. arch/arm/boot/dts/stm32f429.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index c31ceb821231..809b2842ded9 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -362,6 +362,35 @@ i2c3: i2c@40005c00 { status = "disabled"; }; + can1: can@40006400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006400 0x200>; + interrupts = <19>, <20>, <21>, <22>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F4_APB1_RESET(CAN1)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; + st,can-master; + st,gcan = <&gcan>; + status = "disabled"; + }; + + gcan: gcan@40006600 { + compatible = "st,stm32f4-gcan", "syscon"; + reg = <0x40006600 0x200>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; + }; + + can2: can@40006800 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006800 0x200>; + interrupts = <63>, <64>, <65>, <66>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F4_APB1_RESET(CAN2)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>; + st,gcan = <&gcan>; + status = "disabled"; + }; + dac: dac@40007400 { compatible = "st,stm32f4-dac-core"; reg = <0x40007400 0x400>; -- 2.32.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel