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From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
	bmeng@tinylab.org, liweiwei@iscas.ac.cn,
	zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com,
	Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Subject: [PATCH for-8.1 v4 01/25] target/riscv/cpu.c: add riscv_cpu_validate_v()
Date: Wed, 22 Mar 2023 19:19:40 -0300	[thread overview]
Message-ID: <20230322222004.357013-2-dbarboza@ventanamicro.com> (raw)
In-Reply-To: <20230322222004.357013-1-dbarboza@ventanamicro.com>

The RVV verification will error out if fails and it's being done at the
end of riscv_cpu_validate_set_extensions(). Let's put it in its own
function and do it earlier.

We'll move it out of riscv_cpu_validate_set_extensions() in the near future,
but for now this is enough to clean the code a bit.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
---
 target/riscv/cpu.c | 86 ++++++++++++++++++++++++++--------------------
 1 file changed, 49 insertions(+), 37 deletions(-)

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 1e97473af2..18591aa53a 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -802,6 +802,46 @@ static void riscv_cpu_disas_set_info(CPUState *s, disassemble_info *info)
     }
 }
 
+static void riscv_cpu_validate_v(CPURISCVState *env, RISCVCPUConfig *cfg,
+                                 Error **errp)
+{
+    int vext_version = VEXT_VERSION_1_00_0;
+
+    if (!is_power_of_2(cfg->vlen)) {
+        error_setg(errp, "Vector extension VLEN must be power of 2");
+        return;
+    }
+    if (cfg->vlen > RV_VLEN_MAX || cfg->vlen < 128) {
+        error_setg(errp,
+                   "Vector extension implementation only supports VLEN "
+                   "in the range [128, %d]", RV_VLEN_MAX);
+        return;
+    }
+    if (!is_power_of_2(cfg->elen)) {
+        error_setg(errp, "Vector extension ELEN must be power of 2");
+        return;
+    }
+    if (cfg->elen > 64 || cfg->elen < 8) {
+        error_setg(errp,
+                   "Vector extension implementation only supports ELEN "
+                   "in the range [8, 64]");
+        return;
+    }
+    if (cfg->vext_spec) {
+        if (!g_strcmp0(cfg->vext_spec, "v1.0")) {
+            vext_version = VEXT_VERSION_1_00_0;
+        } else {
+            error_setg(errp, "Unsupported vector spec version '%s'",
+                       cfg->vext_spec);
+            return;
+        }
+    } else {
+        qemu_log("vector version is not specified, "
+                 "use the default value v1.0\n");
+    }
+    set_vext_version(env, vext_version);
+}
+
 /*
  * Check consistency between chosen extensions while setting
  * cpu->cfg accordingly, doing a set_misa() in the end.
@@ -809,6 +849,7 @@ static void riscv_cpu_disas_set_info(CPUState *s, disassemble_info *info)
 static void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp)
 {
     CPURISCVState *env = &cpu->env;
+    Error *local_err = NULL;
     uint32_t ext = 0;
 
     /* Do some ISA extension error checking */
@@ -939,6 +980,14 @@ static void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp)
         }
     }
 
+    if (cpu->cfg.ext_v) {
+        riscv_cpu_validate_v(env, &cpu->cfg, &local_err);
+        if (local_err != NULL) {
+            error_propagate(errp, local_err);
+            return;
+        }
+    }
+
     if (cpu->cfg.ext_zk) {
         cpu->cfg.ext_zkn = true;
         cpu->cfg.ext_zkr = true;
@@ -993,44 +1042,7 @@ static void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp)
         ext |= RVH;
     }
     if (cpu->cfg.ext_v) {
-        int vext_version = VEXT_VERSION_1_00_0;
         ext |= RVV;
-        if (!is_power_of_2(cpu->cfg.vlen)) {
-            error_setg(errp,
-                       "Vector extension VLEN must be power of 2");
-            return;
-        }
-        if (cpu->cfg.vlen > RV_VLEN_MAX || cpu->cfg.vlen < 128) {
-            error_setg(errp,
-                       "Vector extension implementation only supports VLEN "
-                       "in the range [128, %d]", RV_VLEN_MAX);
-            return;
-        }
-        if (!is_power_of_2(cpu->cfg.elen)) {
-            error_setg(errp,
-                       "Vector extension ELEN must be power of 2");
-            return;
-        }
-        if (cpu->cfg.elen > 64 || cpu->cfg.elen < 8) {
-            error_setg(errp,
-                       "Vector extension implementation only supports ELEN "
-                       "in the range [8, 64]");
-            return;
-        }
-        if (cpu->cfg.vext_spec) {
-            if (!g_strcmp0(cpu->cfg.vext_spec, "v1.0")) {
-                vext_version = VEXT_VERSION_1_00_0;
-            } else {
-                error_setg(errp,
-                           "Unsupported vector spec version '%s'",
-                           cpu->cfg.vext_spec);
-                return;
-            }
-        } else {
-            qemu_log("vector version is not specified, "
-                     "use the default value v1.0\n");
-        }
-        set_vext_version(env, vext_version);
     }
     if (cpu->cfg.ext_j) {
         ext |= RVJ;
-- 
2.39.2



  reply	other threads:[~2023-03-22 23:35 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-22 22:19 [PATCH for-8.1 v4 00/25] target/riscv: rework CPU extensions validation Daniel Henrique Barboza
2023-03-22 22:19 ` Daniel Henrique Barboza [this message]
2023-03-22 22:19 ` [PATCH for-8.1 v4 02/25] target/riscv/cpu.c: remove set_vext_version() Daniel Henrique Barboza
2023-03-22 22:19 ` [PATCH for-8.1 v4 03/25] target/riscv/cpu.c: remove set_priv_version() Daniel Henrique Barboza
2023-03-22 22:19 ` [PATCH for-8.1 v4 04/25] target/riscv: add PRIV_VERSION_LATEST Daniel Henrique Barboza
2023-03-22 22:19 ` [PATCH for-8.1 v4 05/25] target/riscv/cpu.c: add priv_spec validate/disable_exts helpers Daniel Henrique Barboza
2023-03-22 22:19 ` [PATCH for-8.1 v4 06/25] target/riscv/cpu.c: add riscv_cpu_validate_misa_mxl() Daniel Henrique Barboza
2023-03-23  1:35   ` LIU Zhiwei
2023-03-22 22:19 ` [PATCH for-8.1 v4 07/25] target/riscv: move pmp and epmp validations to validate_set_extensions() Daniel Henrique Barboza
2023-03-23  1:42   ` LIU Zhiwei
2023-03-22 22:19 ` [PATCH for-8.1 v4 08/25] target/riscv/cpu.c: validate extensions before riscv_timer_init() Daniel Henrique Barboza
2023-03-23  1:52   ` LIU Zhiwei
2023-03-22 22:19 ` [PATCH for-8.1 v4 09/25] target/riscv/cpu.c: remove cfg setup from riscv_cpu_init() Daniel Henrique Barboza
2023-03-23  2:02   ` LIU Zhiwei
2023-03-22 22:19 ` [PATCH for-8.1 v4 10/25] target/riscv/cpu.c: avoid set_misa() in validate_set_extensions() Daniel Henrique Barboza
2023-03-23  2:04   ` LIU Zhiwei
2023-03-22 22:19 ` [PATCH for-8.1 v4 11/25] target/riscv/cpu.c: set cpu config in set_misa() Daniel Henrique Barboza
2023-03-23  2:14   ` LIU Zhiwei
2023-03-23  2:18     ` LIU Zhiwei
2023-03-23 23:23     ` Daniel Henrique Barboza
2023-03-22 22:19 ` [PATCH for-8.1 v4 12/25] target/riscv/cpu.c: redesign register_cpu_props() Daniel Henrique Barboza
2023-03-23  3:22   ` LIU Zhiwei
2023-03-22 22:19 ` [PATCH for-8.1 v4 13/25] target/riscv: put env->misa_ext <-> cpu->cfg code into helpers Daniel Henrique Barboza
2023-03-22 22:19 ` [PATCH for-8.1 v4 14/25] target/riscv: add RVG Daniel Henrique Barboza
2023-03-24 14:43   ` liweiwei
2023-03-22 22:19 ` [PATCH for-8.1 v4 15/25] target/riscv/cpu.c: split RVG code from validate_set_extensions() Daniel Henrique Barboza
2023-03-24 14:47   ` liweiwei
2023-03-22 22:19 ` [PATCH for-8.1 v4 16/25] target/riscv/cpu.c: add riscv_cpu_validate_misa_ext() Daniel Henrique Barboza
2023-03-22 22:19 ` [PATCH for-8.1 v4 17/25] target/riscv: move riscv_cpu_validate_v() to validate_misa_ext() Daniel Henrique Barboza
2023-03-22 22:19 ` [PATCH for-8.1 v4 18/25] target/riscv: error out on priv failure for RVH Daniel Henrique Barboza
2023-03-24 14:56   ` liweiwei
2023-03-28 14:33     ` Daniel Henrique Barboza
2023-03-22 22:19 ` [PATCH for-8.1 v4 19/25] target/riscv: write env->misa_ext* in register_generic_cpu_props() Daniel Henrique Barboza
2023-03-22 22:19 ` [PATCH for-8.1 v4 20/25] target/riscv: make validate_misa_ext() use a misa_ext val Daniel Henrique Barboza
2023-03-22 22:20 ` [PATCH for-8.1 v4 21/25] target/riscv: split riscv_cpu_validate_set_extensions() Daniel Henrique Barboza
2023-03-22 22:20 ` [PATCH for-8.1 v4 22/25] target/riscv: use misa_ext val in riscv_cpu_validate_extensions() Daniel Henrique Barboza
2023-03-24 15:06   ` liweiwei
2023-03-22 22:20 ` [PATCH for-8.1 v4 23/25] target/riscv: rework write_misa() Daniel Henrique Barboza
2023-03-24 15:09   ` liweiwei
2023-03-22 22:20 ` [PATCH for-8.1 v4 24/25] target/riscv: update cpu->cfg misa bits in commit_cpu_cfg() Daniel Henrique Barboza
2023-03-24 15:14   ` liweiwei
2023-03-22 22:20 ` [PATCH for-8.1 v4 25/25] target/riscv: handle RVG updates in write_misa() Daniel Henrique Barboza

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