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Fri, 24 Mar 2023 00:44:58 -0700 (PDT) Received: from mobilestation ([95.79.133.202]) by smtp.gmail.com with ESMTPSA id u15-20020ac243cf000000b004eaf2291dcdsm1235444lfl.102.2023.03.24.00.44.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Mar 2023 00:44:57 -0700 (PDT) Date: Fri, 24 Mar 2023 10:44:55 +0300 From: Serge Semin To: Vinod Koul Cc: Cai Huoqing , Gustavo Pimentel , Jingoo Han , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, linux-pci@vger.kernel.org Subject: Re: [PATCH v9 0/4] dmaengine: dw-edma: Add support for native HDMA Message-ID: <20230324074455.bosmaxwkbo7mlyvj@mobilestation> References: <20230324021420.73401-1-cai.huoqing@linux.dev> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230324021420.73401-1-cai.huoqing@linux.dev> Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org Hi Vinod On Fri, Mar 24, 2023 at 10:14:14AM +0800, Cai Huoqing wrote: > Add support for HDMA NATIVE, as long the IP design has set > the compatible register map parameter-HDMA_NATIVE, > which allows compatibility for native HDMA register configuration. > > The HDMA Hyper-DMA IP is an enhancement of the eDMA embedded-DMA IP. > And the native HDMA registers are different from eDMA, > so this patch add support for HDMA NATIVE mode. > > HDMA write and read channels operate independently to maximize > the performance of the HDMA read and write data transfer over > the link When you configure the HDMA with multiple read channels, > then it uses a round robin (RR) arbitration scheme to select > the next read channel to be serviced.The same applies when > youhave multiple write channels. > > The native HDMA driver also supports a maximum of 16 independent > channels (8 write + 8 read), which can run simultaneously. > Both SAR (Source Address Register) and DAR (Destination Address Register) > are aligned to byte. > > Cai Huoqing (1): > dmaengine: dw-edma: Add support for native HDMA > > Cai huoqing (3): > dmaengine: dw-edma: Rename dw_edma_core_ops structure to > dw_edma_plat_ops > dmaengine: dw-edma: Create a new dw_edma_core_ops structure to > abstract controller operation > dmaengine: dw-edma: Add HDMA DebugFS support > > Tested-by: Serge Semin I finished the patchset review and testing. Could you have a look at the series. If you are ok with what it does please merge in. -Serge(y) > > v8->v9: > [3/4] > 1.Drop an empty line. > [4/4] > 2.Update commit log. > 3.Remove unused macro > > v8 link: > https://lore.kernel.org/lkml/20230323034944.78357-1-cai.huoqing@linux.dev/ > > drivers/dma/dw-edma/Makefile | 8 +- > drivers/dma/dw-edma/dw-edma-core.c | 86 ++---- > drivers/dma/dw-edma/dw-edma-core.h | 58 ++++ > drivers/dma/dw-edma/dw-edma-pcie.c | 4 +- > drivers/dma/dw-edma/dw-edma-v0-core.c | 85 +++++- > drivers/dma/dw-edma/dw-edma-v0-core.h | 14 +- > drivers/dma/dw-edma/dw-hdma-v0-core.c | 296 +++++++++++++++++++ > drivers/dma/dw-edma/dw-hdma-v0-core.h | 17 ++ > drivers/dma/dw-edma/dw-hdma-v0-debugfs.c | 170 +++++++++++ > drivers/dma/dw-edma/dw-hdma-v0-debugfs.h | 22 ++ > drivers/dma/dw-edma/dw-hdma-v0-regs.h | 129 ++++++++ > drivers/pci/controller/dwc/pcie-designware.c | 2 +- > include/linux/dma/edma.h | 7 +- > 13 files changed, 807 insertions(+), 91 deletions(-) > create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-core.c > create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-core.h > create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-debugfs.c > create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-debugfs.h > create mode 100644 drivers/dma/dw-edma/dw-hdma-v0-regs.h > > -- > 2.34.1 >