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[92.145.124.62]) by smtp.gmail.com with ESMTPSA id p5-20020a5d4e05000000b002d75909c76esm11767972wrt.73.2023.03.24.08.54.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Mar 2023 08:54:29 -0700 (PDT) From: Alexandre Ghiti To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Rob Herring , Frank Rowand , Andrew Jones , Anup Patel , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Alexandre Ghiti Subject: [PATCH v9 0/3] riscv: Use PUD/P4D/PGD pages for the linear mapping Date: Fri, 24 Mar 2023 16:54:18 +0100 Message-Id: <20230324155421.271544-1-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patchset intends to improve tlb utilization by using hugepages for the linear mapping. As reported by Anup in v6, when STRICT_KERNEL_RWX is enabled, we must take care of isolating the kernel text and rodata so that they are not mapped with a PUD mapping which would then assign wrong permissions to the whole region: it is achieved the same way as arm64 by using the memblock nomap API which isolates those regions and re-merge them afterwards thus avoiding any issue with the system resources tree creation. base-commit-tag: v6.3-rc1 v9: - Remove new API and arm64 patches as it created more issues than it solved, thanks Anup for reporting those bugs! - Add a patch that moves the linear mapping creation outside of setup_vm_final - Use nomap API like arm64 - Removed RB from Andrew and Anup as the patch changed its logic - Fix kernel rodata size computation v8: - Fix rv32, as reported by Anup - Do not modify memblock_isolate_range and fixes comment, as suggested by Mike - Use the new memblock API for crash kernel too in arm64, as suggested by Andrew - Fix arm64 double mapping (which to me did not work in v7), but ends up not being pretty at all, will wait for comments from arm64 reviewers, but this patch can easily be dropped if they do not want it. v7: - Fix Anup bug report by introducing memblock_isolate_memory which allows us to split the memblock mappings and then avoid to map the the PUD which contains the kernel as read only - Add a patch to arm64 to use this newly introduced API v6: - quiet LLVM warning by casting phys_ram_base into an unsigned long v5: - Fix nommu builds by getting rid of riscv_pfn_base in patch 1, thanks Conor - Add RB from Andrew v4: - Rebase on top of v6.2-rc3, as noted by Conor - Add Acked-by Rob v3: - Change the comment about initrd_start VA conversion so that it fits ARM64 and RISCV64 (and others in the future if needed), as suggested by Rob v2: - Add a comment on why RISCV64 does not need to set initrd_start/end that early in the boot process, as asked by Rob Alexandre Ghiti (3): riscv: Get rid of riscv_pfn_base variable riscv: Move the linear mapping creation in its own function riscv: Use PUD/P4D/PGD pages for the linear mapping arch/riscv/include/asm/page.h | 19 ++++++- arch/riscv/mm/init.c | 102 ++++++++++++++++++++++++++-------- arch/riscv/mm/physaddr.c | 16 ++++++ drivers/of/fdt.c | 11 ++-- 4 files changed, 118 insertions(+), 30 deletions(-) -- 2.37.2 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 30F16C76196 for ; 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[92.145.124.62]) by smtp.gmail.com with ESMTPSA id p5-20020a5d4e05000000b002d75909c76esm11767972wrt.73.2023.03.24.08.54.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 Mar 2023 08:54:29 -0700 (PDT) From: Alexandre Ghiti To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Rob Herring , Frank Rowand , Andrew Jones , Anup Patel , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: Alexandre Ghiti Subject: [PATCH v9 0/3] riscv: Use PUD/P4D/PGD pages for the linear mapping Date: Fri, 24 Mar 2023 16:54:18 +0100 Message-Id: <20230324155421.271544-1-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230324_085432_614267_02B206E2 X-CRM114-Status: GOOD ( 16.06 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org This patchset intends to improve tlb utilization by using hugepages for the linear mapping. As reported by Anup in v6, when STRICT_KERNEL_RWX is enabled, we must take care of isolating the kernel text and rodata so that they are not mapped with a PUD mapping which would then assign wrong permissions to the whole region: it is achieved the same way as arm64 by using the memblock nomap API which isolates those regions and re-merge them afterwards thus avoiding any issue with the system resources tree creation. base-commit-tag: v6.3-rc1 v9: - Remove new API and arm64 patches as it created more issues than it solved, thanks Anup for reporting those bugs! - Add a patch that moves the linear mapping creation outside of setup_vm_final - Use nomap API like arm64 - Removed RB from Andrew and Anup as the patch changed its logic - Fix kernel rodata size computation v8: - Fix rv32, as reported by Anup - Do not modify memblock_isolate_range and fixes comment, as suggested by Mike - Use the new memblock API for crash kernel too in arm64, as suggested by Andrew - Fix arm64 double mapping (which to me did not work in v7), but ends up not being pretty at all, will wait for comments from arm64 reviewers, but this patch can easily be dropped if they do not want it. v7: - Fix Anup bug report by introducing memblock_isolate_memory which allows us to split the memblock mappings and then avoid to map the the PUD which contains the kernel as read only - Add a patch to arm64 to use this newly introduced API v6: - quiet LLVM warning by casting phys_ram_base into an unsigned long v5: - Fix nommu builds by getting rid of riscv_pfn_base in patch 1, thanks Conor - Add RB from Andrew v4: - Rebase on top of v6.2-rc3, as noted by Conor - Add Acked-by Rob v3: - Change the comment about initrd_start VA conversion so that it fits ARM64 and RISCV64 (and others in the future if needed), as suggested by Rob v2: - Add a comment on why RISCV64 does not need to set initrd_start/end that early in the boot process, as asked by Rob Alexandre Ghiti (3): riscv: Get rid of riscv_pfn_base variable riscv: Move the linear mapping creation in its own function riscv: Use PUD/P4D/PGD pages for the linear mapping arch/riscv/include/asm/page.h | 19 ++++++- arch/riscv/mm/init.c | 102 ++++++++++++++++++++++++++-------- arch/riscv/mm/physaddr.c | 16 ++++++ drivers/of/fdt.c | 11 ++-- 4 files changed, 118 insertions(+), 30 deletions(-) -- 2.37.2 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv