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From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: Liang Kan <kan.liang@linux.intel.com>,
	<linux-cxl@vger.kernel.org>, <peterz@infradead.org>,
	<mark.rutland@arm.com>, <will@kernel.org>
Cc: <mingo@redhat.com>, <acme@kernel.org>, <dan.j.williams@intel.com>,
	<linuxarm@huawei.com>, <linux-perf-users@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	Davidlohr Bueso <dave@stgolabs.net>,
	Dave Jiang <dave.jiang@intel.com>
Subject: [PATCH v6 2/5] cxl: Add functions to get an instance of / count regblocks of a given type
Date: Thu, 13 Apr 2023 15:26:14 +0100	[thread overview]
Message-ID: <20230413142617.15995-3-Jonathan.Cameron@huawei.com> (raw)
In-Reply-To: <20230413142617.15995-1-Jonathan.Cameron@huawei.com>

Until the recently release CXL 3.0 specification, there
was only ever one instance of any given register block pointed
to by the Register Block Locator DVSEC. Now, the specification allows
for multiple CXL PMU instances, each with their own register block.

To enable this add cxl_find_regblock_instance() that takes an index
parameter and use that to implement cxl_count_regblock() and
cxl_find_regblock().

Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

---
v6: No change

Dropped RBs as significant refactor for v5.

v5: Thanks to Dan Williams,
 - As there is only one case of repeated regblocks so far keep
   cxl_find_regblock() as finding the first instance but implement
   it using a new cxl_find_regblock_instance() function, also used
   to implement the counting function.
---
 drivers/cxl/core/regs.c | 59 ++++++++++++++++++++++++++++++++++++-----
 drivers/cxl/cxl.h       |  3 +++
 2 files changed, 56 insertions(+), 6 deletions(-)

diff --git a/drivers/cxl/core/regs.c b/drivers/cxl/core/regs.c
index 1476a0299c9b..4b9672db867d 100644
--- a/drivers/cxl/core/regs.c
+++ b/drivers/cxl/core/regs.c
@@ -286,20 +286,23 @@ static bool cxl_decode_regblock(struct pci_dev *pdev, u32 reg_lo, u32 reg_hi,
 }
 
 /**
- * cxl_find_regblock() - Locate register blocks by type
+ * cxl_find_regblock_instance() - Locate a register block by type / index
  * @pdev: The CXL PCI device to enumerate.
  * @type: Register Block Indicator id
  * @map: Enumeration output, clobbered on error
+ * @index: Index into which particular instance of a regblock wanted in the
+ *	   order found in register locator DVSEC.
  *
  * Return: 0 if register block enumerated, negative error code otherwise
  *
  * A CXL DVSEC may point to one or more register blocks, search for them
- * by @type.
+ * by @type and @index.
  */
-int cxl_find_regblock(struct pci_dev *pdev, enum cxl_regloc_type type,
-		      struct cxl_register_map *map)
+int cxl_find_regblock_instance(struct pci_dev *pdev, enum cxl_regloc_type type,
+			       struct cxl_register_map *map, int index)
 {
 	u32 regloc_size, regblocks;
+	int instance = 0;
 	int regloc, i;
 
 	map->resource = CXL_RESOURCE_NONE;
@@ -323,15 +326,59 @@ int cxl_find_regblock(struct pci_dev *pdev, enum cxl_regloc_type type,
 		if (!cxl_decode_regblock(pdev, reg_lo, reg_hi, map))
 			continue;
 
-		if (map->reg_type == type)
-			return 0;
+		if (map->reg_type == type) {
+			if (index == instance)
+				return 0;
+			instance++;
+		}
 	}
 
 	map->resource = CXL_RESOURCE_NONE;
 	return -ENODEV;
 }
+EXPORT_SYMBOL_NS_GPL(cxl_find_regblock_instance, CXL);
+
+/**
+ * cxl_find_regblock() - Locate register blocks by type
+ * @pdev: The CXL PCI device to enumerate.
+ * @type: Register Block Indicator id
+ * @map: Enumeration output, clobbered on error
+ *
+ * Return: 0 if register block enumerated, negative error code otherwise
+ *
+ * A CXL DVSEC may point to one or more register blocks, search for them
+ * by @type.
+ */
+int cxl_find_regblock(struct pci_dev *pdev, enum cxl_regloc_type type,
+		      struct cxl_register_map *map)
+{
+	return cxl_find_regblock_instance(pdev, type, map, 0);
+}
 EXPORT_SYMBOL_NS_GPL(cxl_find_regblock, CXL);
 
+/**
+ * cxl_count_regblock() - Count instances of a given regblock type.
+ * @pdev: The CXL PCI device to enumerate.
+ * @type: Register Block Indicator id
+ *
+ * Some regblocks may be repeated. Count how many instances.
+ *
+ * Return: count of matching regblocks.
+ */
+int cxl_count_regblock(struct pci_dev *pdev, enum cxl_regloc_type type)
+{
+	struct cxl_register_map map;
+	int rc, count = 0;
+
+	while (1) {
+		rc = cxl_find_regblock_instance(pdev, type, &map, count);
+		if (rc)
+			return count;
+		count++;
+	}
+}
+EXPORT_SYMBOL_NS_GPL(cxl_count_regblock, CXL);
+
 resource_size_t cxl_rcrb_to_component(struct device *dev,
 				      resource_size_t rcrb,
 				      enum cxl_rcrb which)
diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index 044a92d9813e..f6e2a9ea5f41 100644
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -260,6 +260,9 @@ int cxl_map_device_regs(struct device *dev, struct cxl_device_regs *regs,
 			struct cxl_register_map *map);
 
 enum cxl_regloc_type;
+int cxl_count_regblock(struct pci_dev *pdev, enum cxl_regloc_type type);
+int cxl_find_regblock_instance(struct pci_dev *pdev, enum cxl_regloc_type type,
+			       struct cxl_register_map *map, int index);
 int cxl_find_regblock(struct pci_dev *pdev, enum cxl_regloc_type type,
 		      struct cxl_register_map *map);
 
-- 
2.37.2


  parent reply	other threads:[~2023-04-13 14:27 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-13 14:26 [PATCH v6 0/5] perf: CXL 3.0 Performance Monitoring Unit support Jonathan Cameron
2023-04-13 14:26 ` [PATCH v6 1/5] perf: Allow a PMU to have a parent Jonathan Cameron
2023-04-14  8:20   ` Peter Zijlstra
2023-04-13 14:26 ` Jonathan Cameron [this message]
2023-04-13 14:26 ` [PATCH v6 3/5] cxl/pci: Find and register CXL PMU devices Jonathan Cameron
2023-04-13 14:26 ` [PATCH v6 4/5] perf: CXL Performance Monitoring Unit driver Jonathan Cameron
2023-04-22 22:31   ` Dan Williams
2023-04-23 13:48     ` Jonathan Cameron
2023-05-19 11:53       ` Will Deacon
2023-05-26  1:06   ` Namhyung Kim
2023-05-26  1:18     ` Stephane Eranian
2023-05-26  9:24       ` Jonathan Cameron
2023-05-27  5:45         ` Namhyung Kim
2023-05-26  9:27     ` Jonathan Cameron
2023-04-13 14:26 ` [PATCH v6 5/5] docs: perf: Minimal introduction the the CXL PMU device and driver Jonathan Cameron

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