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From: Pierre Gondois <pierre.gondois@arm.com>
To: linux-kernel@vger.kernel.org
Cc: Radu Rendec <rrendec@redhat.com>,
	Alexandre Ghiti <alexghiti@rivosinc.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Will Deacon <will@kernel.org>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Pierre Gondois <pierre.gondois@arm.com>,
	Sudeep Holla <sudeep.holla@arm.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	Palmer Dabbelt <palmer@rivosinc.com>,
	Gavin Shan <gshan@redhat.com>
Subject: [PATCH v4 0/4] cacheinfo: Correctly fallback to using clidr_el1's information
Date: Fri, 14 Apr 2023 10:14:48 +0200	[thread overview]
Message-ID: <20230414081453.244787-1-pierre.gondois@arm.com> (raw)

v4:
arch_topology: Remove early cacheinfo error message:
- Only remove the error message if the error code is -ENOENT
cacheinfo: Add use_arch[|_cache]_info field/function:
- Use a static variable instead of a per-leaf 'use_arch_info'
- Reformat the use_arch_cache_info() define

v3:
cacheinfo: Check sib_leaf in cache_leaves_are_shared():
- Reformulate commit message
- Fix rebase issue and move '&&' condition which was in the last patch
  to this patch.
cacheinfo: Add use_arch[|_cache]_info field/function:
- Put the function declaration in one line.
arch_topology: Remove early cacheinfo error message:
- New patch.

v2:
cacheinfo: Check sib_leaf in cache_leaves_are_shared()
- Reformulate commit message
- Add 'Fixes: f16d1becf96f ("cacheinfo: Use cache identifiers [...]'
cacheinfo: Check cache properties are present in DT
- Use of_property_present()
- Add 'Reported-by: Alexandre Ghiti <alexghiti@rivosinc.com>'
cacheinfo: Add use_arch[|_cache]_info field/function:
- Make use_arch_cache_info() a static inline function

The cache information can be extracted from either a Device
Tree (DT), the PPTT ACPI table, or arch registers (clidr_el1
for arm64).

When the DT is used but no cache properties are advertised,
the current code doesn't correctly fallback to using arch information.

Correct this. Also use the assumption that L1 data/instruction caches
are private and L2/higher caches are shared when the cache information
is coming form clidr_el1.

As suggested by Alexandre, this serie should ideally go to 6.3 fixes.

Pierre Gondois (4):
  cacheinfo: Check sib_leaf in cache_leaves_are_shared()
  cacheinfo: Check cache properties are present in DT
  arch_topology: Remove early cacheinfo error message if -ENOENT
  cacheinfo: Add use_arch[|_cache]_info field/function

 drivers/base/arch_topology.c |  7 +++---
 drivers/base/cacheinfo.c     | 49 ++++++++++++++++++++++++++++++++----
 include/linux/cacheinfo.h    |  6 +++++
 3 files changed, 54 insertions(+), 8 deletions(-)

-- 
2.25.1


             reply	other threads:[~2023-04-14  8:15 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-14  8:14 Pierre Gondois [this message]
2023-04-14  8:14 ` [PATCH v4 1/4] cacheinfo: Check sib_leaf in cache_leaves_are_shared() Pierre Gondois
2023-04-14  8:14 ` [PATCH v4 2/4] cacheinfo: Check cache properties are present in DT Pierre Gondois
2023-04-14  8:14 ` [PATCH v4 3/4] arch_topology: Remove early cacheinfo error message if -ENOENT Pierre Gondois
2023-04-14  8:14 ` [PATCH v4 4/4] cacheinfo: Add use_arch[|_cache]_info field/function Pierre Gondois
2023-04-14 22:36 ` [PATCH v4 0/4] cacheinfo: Correctly fallback to using clidr_el1's information Florian Fainelli
2023-04-17 14:07 ` Sudeep Holla

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