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From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, danielhb413@gmail.com,
	peter.maydell@linaro.org,
	"Shivaprasad G Bhat" <sbhat@linux.ibm.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Lucas Mateus Castro" <lucas.araujo@eldorado.org.br>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Cédric Le Goater" <clg@redhat.com>
Subject: [PULL 4/6] tcg: ppc64: Fix mask generation for vextractdm
Date: Fri,  5 May 2023 13:34:42 -0300	[thread overview]
Message-ID: <20230505163444.347006-5-danielhb413@gmail.com> (raw)
In-Reply-To: <20230505163444.347006-1-danielhb413@gmail.com>

From: Shivaprasad G Bhat <sbhat@linux.ibm.com>

In function do_extractm() the mask is calculated as
dup_const(1 << (element_width - 1)). '1' being signed int
works fine for MO_8,16,32. For MO_64, on PPC64 host
this ends up becoming 0 on compilation. The vextractdm
uses MO_64, and it ends up having mask as 0.

Explicitly use 1ULL instead of signed int 1 like its
used everywhere else.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1536
Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Lucas Mateus Castro <lucas.araujo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Message-Id: <168319292809.1159309.5817546227121323288.stgit@ltc-boston1.aus.stglabs.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
 target/ppc/translate/vmx-impl.c.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc
index 112233b541..c8712dd7d8 100644
--- a/target/ppc/translate/vmx-impl.c.inc
+++ b/target/ppc/translate/vmx-impl.c.inc
@@ -2058,7 +2058,7 @@ static bool trans_VEXPANDQM(DisasContext *ctx, arg_VX_tb *a)
 static bool do_vextractm(DisasContext *ctx, arg_VX_tb *a, unsigned vece)
 {
     const uint64_t elem_width = 8 << vece, elem_count_half = 8 >> vece,
-                   mask = dup_const(vece, 1 << (elem_width - 1));
+                   mask = dup_const(vece, 1ULL << (elem_width - 1));
     uint64_t i, j;
     TCGv_i64 lo, hi, t0, t1;
 
-- 
2.40.1



  parent reply	other threads:[~2023-05-05 16:36 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-05 16:34 [PULL 0/6] ppc queue Daniel Henrique Barboza
2023-05-05 16:34 ` [PULL 1/6] hw/display/sm501: Remove unneeded increment from loop Daniel Henrique Barboza
2023-05-05 16:34 ` [PULL 2/6] ppc: spapr: cleanup cr get/set with helpers Daniel Henrique Barboza
2023-05-05 16:34 ` [PULL 3/6] MAINTAINERS: Adding myself in the list for ppc/spapr Daniel Henrique Barboza
2023-05-05 16:34 ` Daniel Henrique Barboza [this message]
2023-05-05 16:34 ` [PULL 5/6] tests: tcg: ppc64: Add tests for Vector Extract Mask Instructions Daniel Henrique Barboza
2023-05-05 16:34 ` [PULL 6/6] hw/ppc/Kconfig: NVDIMM is a hard requirement for the pseries machine Daniel Henrique Barboza
2023-05-06  7:10 ` [PULL 0/6] ppc queue Richard Henderson

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