[PATCH 0/2] Add machanism to limit msi allocation for Loongson

From: Huacai Chen <chenhuacai@loongson.cn>
To: Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-kernel@vger.kernel.org, loongson-kernel@lists.loongnix.cn,
	Xuefeng Li <lixuefeng@loongson.cn>,
	Huacai Chen <chenhuacai@gmail.com>,
	Jiaxun Yang <jiaxun.yang@flygoat.com>,
	Huacai Chen <chenhuacai@loongson.cn>,
	Juxin Gao <gaojuxin@loongson.cn>
Subject: [PATCH 0/2] Add machanism to limit msi allocation for Loongson
Date: Sat, 27 May 2023 13:46:31 +0800	[thread overview]
Message-ID: <20230527054633.704916-1-chenhuacai@loongson.cn> (raw)

Loongson machines can have as many as 256 logical cpus, but the maximum
of msi vectors in one irqchip is also 256 (practically that is less than
256, because pch-pic consumes some of them). Even on a 64-core machine,
256 irqs can be easily exhausted if there are several NICs (NICs usually
allocate msi irqs depending on the number of online cpus). So we want to
limit the msi allocation.

Patch-1 adjusts the return value semanteme of msi_domain_prepare_irqs(),
allowing us to modify the input "nvec" by overriding the msi_domain_ops
::msi_prepare().

Patch-2 adds a machanism to limit msi allocation:
1, Modify input "nvec" by overriding the msi_domain_ops::msi_prepare();
2, The default limit is 256, which is compatible with the old behavior;
3, Add a cmdline parameter "loongson_msi_limit=xxx" to control the limit.

Huacai Chen and Juxin Gao(2):
 PCI: Omit pci_disable_device() in .shutdown().
 PCI: loongson: Improve the MRRS quirk for LS7A.

Signed-off-by: Juxin Gao <gaojuxin@loongson.cn> 
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
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