Re: [PATCH v3 08/14] rtc: pcf2127: add support for PCF2131 interrupts on output INT_A

[Hugo Villeneuve <hugo@hugovil.com>]

On Wed, 21 Jun 2023 21:26:21 +0200
Alexandre Belloni <alexandre.belloni@bootlin.com> wrote:

> On 21/06/2023 21:24:37+0200, Alexandre Belloni wrote:
> > On 11/05/2023 13:19:58-0400, Hugo Villeneuve wrote:
> > > On Mon, 23 Jan 2023 15:52:40 -0500
> > > Hugo Villeneuve <hugo@hugovil.com> wrote:
> > > 
> > > > On Fri, 20 Jan 2023 17:56:39 +0100
> > > > Alexandre Belloni <alexandre.belloni@bootlin.com> wrote:
> > > > 
> > > > > On 15/12/2022 10:02:09-0500, Hugo Villeneuve wrote:
> > > > > > From: Hugo Villeneuve <hvilleneuve@dimonoff.com>
> > > > > > 
> > > > > > The PCF2127 and PCF2129 have one output interrupt pin. The PCF2131 has
> > > > > > two, named INT_A and INT_B. The hardware support that any interrupt
> > > > > > source can be routed to either one or both of them.
> > > > > > 
> > > > > > Force all interrupt sources to go to the INT A pin.
> > > > > > 
> > > > > > Support to route any interrupt source to INT A/B pins is not supported
> > > > > > by this driver at the moment.
> > > > > > 
> > > > > 
> > > > > The main issue with this is that this will created a breaking change
> > > > > once someone needs support for INTB
> > > > 
> > > > We already had a discussion about this a while ago:
> > > > 
> > > >     https://lore.kernel.org/linux-rtc/7be3f9541eaed7e17e334267e49665f442b1b458.camel@dimonoff.com/
> > > > 
> > > > What exactly do you suggest? I personnaly don't have any need for INTB at the moment and I would prefer to avoid the great complexity of supporting any combination of routing interrupts to any A ou  pins.
> > > 
> > > Hi Alexandre,
> > > a few months later, and I am still waiting for your feedback on this (and other questions/interrogations I raised for other patches related to this series) to submit the next version of this patch series.
> > > 
> > > Can you have a look at it and provide some answers?
> > > 
> > 
> > I'm very very sorry this takes so long. For this one, I don't have a
> > precise idea. I guess we could have one property per pin with a mask of
> > the interrupts we are interested in. That would cover all the use cases.
> > For example, a PMIC could take the alarms on INTB and the CPU could have
> > alarms, battery low and UIE on INTA.
> 
> As the mask for INTA and INTB are set to have interrupts on both by
> default, maybe you could keep that in a separate series so we can wait
> for the DT maintainer to give their opinion.

Hi Alexandre,
great, this will allow us to focus on closing this current series, and
I will prepare a new series specifically for handling interrupts A and
B after.

I have finished implementing all the changes requested during V3
review, and will submit V4 soon.

Thank you, Hugo.


> > > > > > Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
> > > > > > ---
> > > > > >  drivers/rtc/rtc-pcf2127.c | 35 +++++++++++++++++++++++++++++++++++
> > > > > >  1 file changed, 35 insertions(+)
> > > > > > 
> > > > > > diff --git a/drivers/rtc/rtc-pcf2127.c b/drivers/rtc/rtc-pcf2127.c
> > > > > > index 4148e135f935..68af4d0438b8 100644
> > > > > > --- a/drivers/rtc/rtc-pcf2127.c
> > > > > > +++ b/drivers/rtc/rtc-pcf2127.c
> > > > > > @@ -191,6 +191,7 @@ struct pcf21xx_config {
> > > > > >  	int max_register;
> > > > > >  	unsigned int has_nvmem:1;
> > > > > >  	unsigned int has_bit_wd_ctl_cd0:1;
> > > > > > +	unsigned int has_int_a_b:1; /* PCF2131 supports two interrupt outputs. */
> > > > > >  	u8 regs_td_base; /* Time/data base registers. */
> > > > > >  	u8 regs_alarm_base; /* Alarm function base registers. */
> > > > > >  	u8 reg_wd_ctl; /* Watchdog control register. */
> > > > > > @@ -879,6 +880,7 @@ static struct pcf21xx_config pcf21xx_cfg[] = {
> > > > > >  		.max_register = 0x1d,
> > > > > >  		.has_nvmem = 1,
> > > > > >  		.has_bit_wd_ctl_cd0 = 1,
> > > > > > +		.has_int_a_b = 0,
> > > > > >  		.regs_td_base = PCF2127_REG_TIME_DATE_BASE,
> > > > > >  		.regs_alarm_base = PCF2127_REG_ALARM_BASE,
> > > > > >  		.reg_wd_ctl = PCF2127_REG_WD_CTL,
> > > > > > @@ -902,6 +904,7 @@ static struct pcf21xx_config pcf21xx_cfg[] = {
> > > > > >  		.max_register = 0x19,
> > > > > >  		.has_nvmem = 0,
> > > > > >  		.has_bit_wd_ctl_cd0 = 0,
> > > > > > +		.has_int_a_b = 0,
> > > > > >  		.regs_td_base = PCF2127_REG_TIME_DATE_BASE,
> > > > > >  		.regs_alarm_base = PCF2127_REG_ALARM_BASE,
> > > > > >  		.reg_wd_ctl = PCF2127_REG_WD_CTL,
> > > > > > @@ -925,6 +928,7 @@ static struct pcf21xx_config pcf21xx_cfg[] = {
> > > > > >  		.max_register = 0x36,
> > > > > >  		.has_nvmem = 0,
> > > > > >  		.has_bit_wd_ctl_cd0 = 0,
> > > > > > +		.has_int_a_b = 1,
> > > > > >  		.regs_td_base = PCF2131_REG_TIME_DATE_BASE,
> > > > > >  		.regs_alarm_base = PCF2131_REG_ALARM_BASE,
> > > > > >  		.reg_wd_ctl = PCF2131_REG_WD_CTL,
> > > > > > @@ -1017,6 +1021,28 @@ static int pcf2127_enable_ts(struct device *dev, int ts_id)
> > > > > >  	return ret;
> > > > > >  }
> > > > > >  
> > > > > > +/* Route all interrupt sources to INT A pin. */
> > > > > > +static int pcf2127_configure_interrupt_pins(struct device *dev)
> > > > > > +{
> > > > > > +	struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
> > > > > > +	int ret;
> > > > > > +
> > > > > > +	/* Mask bits need to be cleared to enable corresponding
> > > > > > +	 * interrupt source.
> > > > > > +	 */
> > > > > > +	ret = regmap_write(pcf2127->regmap,
> > > > > > +			   PCF2131_REG_INT_A_MASK1, 0);
> > > > > > +	if (ret)
> > > > > > +		return ret;
> > > > > > +
> > > > > > +	ret = regmap_write(pcf2127->regmap,
> > > > > > +			   PCF2131_REG_INT_A_MASK2, 0);
> > > > > > +	if (ret)
> > > > > > +		return ret;
> > > > > > +
> > > > > > +	return ret;
> > > > > > +}
> > > > > > +
> > > > > >  static int pcf2127_probe(struct device *dev, struct regmap *regmap,
> > > > > >  			 int alarm_irq, const char *name, const struct pcf21xx_config *config)
> > > > > >  {
> > > > > > @@ -1076,6 +1102,15 @@ static int pcf2127_probe(struct device *dev, struct regmap *regmap,
> > > > > >  		set_bit(RTC_FEATURE_ALARM, pcf2127->rtc->features);
> > > > > >  	}
> > > > > >  
> > > > > > +	if (pcf2127->cfg->has_int_a_b) {
> > > > > > +		/* Configure int A/B pins, independently of alarm_irq. */
> > > > > > +		ret = pcf2127_configure_interrupt_pins(dev);
> > > > > > +		if (ret) {
> > > > > > +			dev_err(dev, "failed to configure interrupt pins\n");
> > > > > > +			return ret;
> > > > > > +		}
> > > > > > +	}
> > > > > > +
> > > > > >  	if (pcf2127->cfg->has_nvmem) {
> > > > > >  		struct nvmem_config nvmem_cfg = {
> > > > > >  			.priv = pcf2127,
> > > > > > -- 
> > > > > > 2.30.2
> > > > > > 
> > > > > 
> > > > > -- 
> > > > > Alexandre Belloni, co-owner and COO, Bootlin
> > > > > Embedded Linux and Kernel engineering
> > > > > https://bootlin.com
> > > > > 
> > > > 
> > > > 
> > > > -- 
> > > > Hugo Villeneuve <hugo@hugovil.com>
> > > 
> > > 
> > > -- 
> > > Hugo Villeneuve
> > 
> > -- 
> > Alexandre Belloni, co-owner and COO, Bootlin
> > Embedded Linux and Kernel engineering
> > https://bootlin.com
> 
> -- 
> Alexandre Belloni, co-owner and COO, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com
>