From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4A7AEB64DD for ; Thu, 6 Jul 2023 15:39:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233804AbjGFPjF (ORCPT ); Thu, 6 Jul 2023 11:39:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41680 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233787AbjGFPit (ORCPT ); Thu, 6 Jul 2023 11:38:49 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 76F7F19B7; Thu, 6 Jul 2023 08:38:47 -0700 (PDT) Received: from notapiano.myfiosgateway.com (zone.collabora.co.uk [167.235.23.81]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id BC1106606FD9; Thu, 6 Jul 2023 16:38:42 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1688657926; bh=aPgoUi/+QUCf96kwnPphxcT4zrPIaJAdJ/Os47P4liE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fs5thJ4JWoekCvvCkvl5zqxEhPHJfQbXAXZmLiVmQ6u8sCtHzWLqE+j/Sj34a2hZ0 G+2Xs1vXGQfoOuTzZZcXKendJ+Alg86ubKoWGvQt3Aul7xcBO4wJIlQqzijCDF9uHb b1/scgVxVcu9qzV/EK8oKPmXh5qRn2B+KZuSuZnZj9EeCxRrS4vX5NKWWn4OVAeIWn K9V5ABdd3b9wFvBsguXgN0vgXms7FsVEbDt9bbyWHC0Cc8lwebPezlyx+UE5silFDi wRfoRffK14OOXaQ1dLOpioedu9XhtT2cJocpw0cYEBtU9CLjwo85lQsZ/ML/cEp1pq UOjqmYrrlPtBQ== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Daniel Lezcano Cc: Alexandre Bailon , Balsam CHIHI , AngeloGioacchino Del Regno , Chen-Yu Tsai , Alexandre Mergnat , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Amit Kucheria , Matthias Brugger , "Rafael J. Wysocki" , Zhang Rui , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH v3 3/6] thermal/drivers/mediatek/lvts_thermal: Use offset threshold for IRQ Date: Thu, 6 Jul 2023 11:37:34 -0400 Message-ID: <20230706153823.201943-4-nfraprado@collabora.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230706153823.201943-1-nfraprado@collabora.com> References: <20230706153823.201943-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org There are two kinds of temperature monitoring interrupts available: * High Offset, Low Offset * Hot, Hot to normal, Cold The code currently uses the hot/h2n/cold interrupts, however in a way that doesn't work: the cold threshold is left uninitialized, which prevents the other thresholds from ever triggering, and the h2n interrupt is used as the lower threshold, which prevents the hot interrupt from triggering again after the thresholds are updated by the thermal framework, since a hot interrupt can only trigger again after the hot to normal interrupt has been triggered. But better yet than addressing those issues, is to use the high/low offset interrupts instead. This way only two thresholds need to be managed, which have a simpler state machine, making them a better match to the thermal framework's high and low thresholds. Fixes: f5f633b18234 ("thermal/drivers/mediatek: Add the Low Voltage Thermal Sensor driver") Signed-off-by: Nícolas F. R. A. Prado --- (no changes since v2) Changes in v2: - Added this commit drivers/thermal/mediatek/lvts_thermal.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c index 8082195f53ae..e7cbfe0426b5 100644 --- a/drivers/thermal/mediatek/lvts_thermal.c +++ b/drivers/thermal/mediatek/lvts_thermal.c @@ -298,9 +298,9 @@ static int lvts_set_trips(struct thermal_zone_device *tz, int low, int high) u32 raw_high = lvts_temp_to_raw(high); /* - * Hot to normal temperature threshold + * Low offset temperature threshold * - * LVTS_H2NTHRE + * LVTS_OFFSETL * * Bits: * @@ -309,13 +309,13 @@ static int lvts_set_trips(struct thermal_zone_device *tz, int low, int high) if (low != -INT_MAX) { pr_debug("%s: Setting low limit temperature interrupt: %d\n", thermal_zone_device_type(tz), low); - writel(raw_low, LVTS_H2NTHRE(base)); + writel(raw_low, LVTS_OFFSETL(base)); } /* - * Hot temperature threshold + * High offset temperature threshold * - * LVTS_HTHRE + * LVTS_OFFSETH * * Bits: * @@ -323,7 +323,7 @@ static int lvts_set_trips(struct thermal_zone_device *tz, int low, int high) */ pr_debug("%s: Setting high limit temperature interrupt: %d\n", thermal_zone_device_type(tz), high); - writel(raw_high, LVTS_HTHRE(base)); + writel(raw_high, LVTS_OFFSETH(base)); return 0; } -- 2.41.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2E70AEB64DC for ; Thu, 6 Jul 2023 15:39:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=T+ld+N3gw43gNo2+z633jWr8iwjs9+IXUbRc3m9AWmk=; b=K+nYrXWJhfUtEU ZIQNZhv5NOQTKc0J+e5e5XoVrayAzVGtOtJlSpvH6pkbNytbfIct1N6cAsRHe0hf6efSnLeu6nLlc U0witRsQh6ZXL4XVyKWoZpekWOuRofHE6s6sy9H/+JYKwKBSTgc7JMykRnanWjTgELs9h/hnSGWJl 0N6QFP4iHZZVmqEEEQx0tmsvITBTmMIkea5Lo6zLzvwyZ428AacQvoc6M8tsxhob31BuTpmV/nuR5 HqxiQvR7vnCin4PfXRYDWpe7WBr8DNEE0+uNrUXwNNHp9ruDPw5nwnIUMlcmVYXtMgnVm3+GcflrR gNp5DbRB2GhupnYrqZ0w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qHR4E-00222C-1J; Thu, 06 Jul 2023 15:38:50 +0000 Received: from madras.collabora.co.uk ([46.235.227.172]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qHR4B-0021z5-1J; Thu, 06 Jul 2023 15:38:48 +0000 Received: from notapiano.myfiosgateway.com (zone.collabora.co.uk [167.235.23.81]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by madras.collabora.co.uk (Postfix) with ESMTPSA id BC1106606FD9; Thu, 6 Jul 2023 16:38:42 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1688657926; bh=aPgoUi/+QUCf96kwnPphxcT4zrPIaJAdJ/Os47P4liE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fs5thJ4JWoekCvvCkvl5zqxEhPHJfQbXAXZmLiVmQ6u8sCtHzWLqE+j/Sj34a2hZ0 G+2Xs1vXGQfoOuTzZZcXKendJ+Alg86ubKoWGvQt3Aul7xcBO4wJIlQqzijCDF9uHb b1/scgVxVcu9qzV/EK8oKPmXh5qRn2B+KZuSuZnZj9EeCxRrS4vX5NKWWn4OVAeIWn K9V5ABdd3b9wFvBsguXgN0vgXms7FsVEbDt9bbyWHC0Cc8lwebPezlyx+UE5silFDi wRfoRffK14OOXaQ1dLOpioedu9XhtT2cJocpw0cYEBtU9CLjwo85lQsZ/ML/cEp1pq UOjqmYrrlPtBQ== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Daniel Lezcano Cc: Alexandre Bailon , Balsam CHIHI , AngeloGioacchino Del Regno , Chen-Yu Tsai , Alexandre Mergnat , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Amit Kucheria , Matthias Brugger , "Rafael J. Wysocki" , Zhang Rui , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH v3 3/6] thermal/drivers/mediatek/lvts_thermal: Use offset threshold for IRQ Date: Thu, 6 Jul 2023 11:37:34 -0400 Message-ID: <20230706153823.201943-4-nfraprado@collabora.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230706153823.201943-1-nfraprado@collabora.com> References: <20230706153823.201943-1-nfraprado@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230706_083847_577436_BF877E18 X-CRM114-Status: GOOD ( 14.05 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org VGhlcmUgYXJlIHR3byBraW5kcyBvZiB0ZW1wZXJhdHVyZSBtb25pdG9yaW5nIGludGVycnVwdHMg YXZhaWxhYmxlOgoqIEhpZ2ggT2Zmc2V0LCBMb3cgT2Zmc2V0CiogSG90LCBIb3QgdG8gbm9ybWFs LCBDb2xkCgpUaGUgY29kZSBjdXJyZW50bHkgdXNlcyB0aGUgaG90L2gybi9jb2xkIGludGVycnVw dHMsIGhvd2V2ZXIgaW4gYSB3YXkKdGhhdCBkb2Vzbid0IHdvcms6IHRoZSBjb2xkIHRocmVzaG9s ZCBpcyBsZWZ0IHVuaW5pdGlhbGl6ZWQsIHdoaWNoCnByZXZlbnRzIHRoZSBvdGhlciB0aHJlc2hv bGRzIGZyb20gZXZlciB0cmlnZ2VyaW5nLCBhbmQgdGhlIGgybgppbnRlcnJ1cHQgaXMgdXNlZCBh cyB0aGUgbG93ZXIgdGhyZXNob2xkLCB3aGljaCBwcmV2ZW50cyB0aGUgaG90CmludGVycnVwdCBm cm9tIHRyaWdnZXJpbmcgYWdhaW4gYWZ0ZXIgdGhlIHRocmVzaG9sZHMgYXJlIHVwZGF0ZWQgYnkg dGhlCnRoZXJtYWwgZnJhbWV3b3JrLCBzaW5jZSBhIGhvdCBpbnRlcnJ1cHQgY2FuIG9ubHkgdHJp Z2dlciBhZ2FpbiBhZnRlcgp0aGUgaG90IHRvIG5vcm1hbCBpbnRlcnJ1cHQgaGFzIGJlZW4gdHJp Z2dlcmVkLgoKQnV0IGJldHRlciB5ZXQgdGhhbiBhZGRyZXNzaW5nIHRob3NlIGlzc3VlcywgaXMg dG8gdXNlIHRoZSBoaWdoL2xvdwpvZmZzZXQgaW50ZXJydXB0cyBpbnN0ZWFkLiBUaGlzIHdheSBv bmx5IHR3byB0aHJlc2hvbGRzIG5lZWQgdG8gYmUKbWFuYWdlZCwgd2hpY2ggaGF2ZSBhIHNpbXBs ZXIgc3RhdGUgbWFjaGluZSwgbWFraW5nIHRoZW0gYSBiZXR0ZXIgbWF0Y2gKdG8gdGhlIHRoZXJt YWwgZnJhbWV3b3JrJ3MgaGlnaCBhbmQgbG93IHRocmVzaG9sZHMuCgpGaXhlczogZjVmNjMzYjE4 MjM0ICgidGhlcm1hbC9kcml2ZXJzL21lZGlhdGVrOiBBZGQgdGhlIExvdyBWb2x0YWdlIFRoZXJt YWwgU2Vuc29yIGRyaXZlciIpClNpZ25lZC1vZmYtYnk6IE7DrWNvbGFzIEYuIFIuIEEuIFByYWRv IDxuZnJhcHJhZG9AY29sbGFib3JhLmNvbT4KCi0tLQoKKG5vIGNoYW5nZXMgc2luY2UgdjIpCgpD aGFuZ2VzIGluIHYyOgotIEFkZGVkIHRoaXMgY29tbWl0CgogZHJpdmVycy90aGVybWFsL21lZGlh dGVrL2x2dHNfdGhlcm1hbC5jIHwgMTIgKysrKysrLS0tLS0tCiAxIGZpbGUgY2hhbmdlZCwgNiBp bnNlcnRpb25zKCspLCA2IGRlbGV0aW9ucygtKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMvdGhlcm1h bC9tZWRpYXRlay9sdnRzX3RoZXJtYWwuYyBiL2RyaXZlcnMvdGhlcm1hbC9tZWRpYXRlay9sdnRz X3RoZXJtYWwuYwppbmRleCA4MDgyMTk1ZjUzYWUuLmU3Y2JmZTA0MjZiNSAxMDA2NDQKLS0tIGEv ZHJpdmVycy90aGVybWFsL21lZGlhdGVrL2x2dHNfdGhlcm1hbC5jCisrKyBiL2RyaXZlcnMvdGhl cm1hbC9tZWRpYXRlay9sdnRzX3RoZXJtYWwuYwpAQCAtMjk4LDkgKzI5OCw5IEBAIHN0YXRpYyBp bnQgbHZ0c19zZXRfdHJpcHMoc3RydWN0IHRoZXJtYWxfem9uZV9kZXZpY2UgKnR6LCBpbnQgbG93 LCBpbnQgaGlnaCkKIAl1MzIgcmF3X2hpZ2ggPSBsdnRzX3RlbXBfdG9fcmF3KGhpZ2gpOwogCiAJ LyoKLQkgKiBIb3QgdG8gbm9ybWFsIHRlbXBlcmF0dXJlIHRocmVzaG9sZAorCSAqIExvdyBvZmZz ZXQgdGVtcGVyYXR1cmUgdGhyZXNob2xkCiAJICoKLQkgKiBMVlRTX0gyTlRIUkUKKwkgKiBMVlRT X09GRlNFVEwKIAkgKgogCSAqIEJpdHM6CiAJICoKQEAgLTMwOSwxMyArMzA5LDEzIEBAIHN0YXRp YyBpbnQgbHZ0c19zZXRfdHJpcHMoc3RydWN0IHRoZXJtYWxfem9uZV9kZXZpY2UgKnR6LCBpbnQg bG93LCBpbnQgaGlnaCkKIAlpZiAobG93ICE9IC1JTlRfTUFYKSB7CiAJCXByX2RlYnVnKCIlczog U2V0dGluZyBsb3cgbGltaXQgdGVtcGVyYXR1cmUgaW50ZXJydXB0OiAlZFxuIiwKIAkJCSB0aGVy bWFsX3pvbmVfZGV2aWNlX3R5cGUodHopLCBsb3cpOwotCQl3cml0ZWwocmF3X2xvdywgTFZUU19I Mk5USFJFKGJhc2UpKTsKKwkJd3JpdGVsKHJhd19sb3csIExWVFNfT0ZGU0VUTChiYXNlKSk7CiAJ fQogCiAJLyoKLQkgKiBIb3QgdGVtcGVyYXR1cmUgdGhyZXNob2xkCisJICogSGlnaCBvZmZzZXQg dGVtcGVyYXR1cmUgdGhyZXNob2xkCiAJICoKLQkgKiBMVlRTX0hUSFJFCisJICogTFZUU19PRkZT RVRICiAJICoKIAkgKiBCaXRzOgogCSAqCkBAIC0zMjMsNyArMzIzLDcgQEAgc3RhdGljIGludCBs dnRzX3NldF90cmlwcyhzdHJ1Y3QgdGhlcm1hbF96b25lX2RldmljZSAqdHosIGludCBsb3csIGlu dCBoaWdoKQogCSAqLwogCXByX2RlYnVnKCIlczogU2V0dGluZyBoaWdoIGxpbWl0IHRlbXBlcmF0 dXJlIGludGVycnVwdDogJWRcbiIsCiAJCSB0aGVybWFsX3pvbmVfZGV2aWNlX3R5cGUodHopLCBo aWdoKTsKLQl3cml0ZWwocmF3X2hpZ2gsIExWVFNfSFRIUkUoYmFzZSkpOworCXdyaXRlbChyYXdf aGlnaCwgTFZUU19PRkZTRVRIKGJhc2UpKTsKIAogCXJldHVybiAwOwogfQotLSAKMi40MS4wCgoK X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KbGludXgtYXJt LWtlcm5lbCBtYWlsaW5nIGxpc3QKbGludXgtYXJtLWtlcm5lbEBsaXN0cy5pbmZyYWRlYWQub3Jn Cmh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtYXJtLWtl cm5lbAo=