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[201.69.66.211]) by smtp.gmail.com with ESMTPSA id i2-20020a4aab02000000b0055975f57993sm582564oon.42.2023.07.20.10.19.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Jul 2023 10:19:40 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, bmeng@tinylab.org, liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, Daniel Henrique Barboza Subject: [PATCH for-8.2 v5 00/11] riscv: add 'max' CPU, deprecate 'any' Date: Thu, 20 Jul 2023 14:19:22 -0300 Message-ID: <20230720171933.404398-1-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2001:4860:4864:20::36; envelope-from=dbarboza@ventanamicro.com; helo=mail-oa1-x36.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi, I'm sending this new version based on another observation I made during another follow-up work (I'll post it shortly). 'mmu' and 'pmp' aren't really extensions in the most tradicional sense, they're more like features. So, in patch 1, I moved both to the new riscv_cpu_options array. This was observed when I was trying to match each existing extension with a priv_spec. I realized that we have 4 missing entries in isa_edata_arr[] that we're considering as extensions: ext_zmmul, epmp, mmu and pmp. The first 2 were sent as bug fixes for 8.1. mmu and pmp were moved to riscv_cpu_options[] to be handled as such. A small cosmetic change was made in patch 9 as well. Patches missing review: 1, 3, 4, 8, 10, 11 Changes from v4: - patch 1: - add 'mmu' and 'pmp' in riscv_cpu_options - patch 9: - changed 'max' cpu 'for' loop to use ARRAY_SIZE() - v4 link: https://lore.kernel.org/qemu-riscv/20230718210329.200404-1-dbarboza@ventanamicro.com/ Daniel Henrique Barboza (11): target/riscv/cpu.c: split CPU options from riscv_cpu_extensions[] target/riscv/cpu.c: skip 'bool' check when filtering KVM props target/riscv/cpu.c: split kvm prop handling to its own helper target/riscv/cpu.c: del DEFINE_PROP_END_OF_LIST() from riscv_cpu_extensions target/riscv/cpu.c: split vendor exts from riscv_cpu_extensions[] target/riscv/cpu.c: split non-ratified exts from riscv_cpu_extensions[] target/riscv/cpu.c: add ADD_CPU_QDEV_PROPERTIES_ARRAY() macro target/riscv/cpu.c: add ADD_UNAVAIL_KVM_PROP_ARRAY() macro target/riscv: add 'max' CPU type avocado, risc-v: add opensbi tests for 'max' CPU target/riscv: deprecate the 'any' CPU type docs/about/deprecated.rst | 12 +++ target/riscv/cpu-qom.h | 1 + target/riscv/cpu.c | 176 +++++++++++++++++++++++++-------- tests/avocado/riscv_opensbi.py | 16 +++ 4 files changed, 164 insertions(+), 41 deletions(-) -- 2.41.0