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From: Drew Fustini <dfustini@baylibre.com>
To: Jisheng Zhang <jszhang@kernel.org>, Guo Ren <guoren@kernel.org>,
	Fu Wei <wefu@redhat.com>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Conor Dooley <conor@kernel.org>,
	Adrian Hunter <adrian.hunter@intel.com>,
	Ulf Hansson <ulf.hansson@linaro.org>
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org,
	Robert Nelson <robertcnelson@beagleboard.org>,
	Jason Kridner <jkridner@beagleboard.org>,
	Drew Fustini <dfustini@baylibre.com>
Subject: [PATCH RFC v2 2/4] riscv: dts: thead: Add TH1520 mmc controller and sdhci clock
Date: Fri, 04 Aug 2023 20:14:46 -0700	[thread overview]
Message-ID: <20230724-th1520-emmc-v2-2-132ed2e2171e@baylibre.com> (raw)
In-Reply-To: <20230724-th1520-emmc-v2-0-132ed2e2171e@baylibre.com>

Add nodes for the SDHCI fixed clock and the first mmc controller which
is typically connected to the eMMC device.

Signed-off-by: Drew Fustini <dfustini@baylibre.com>
---
 arch/riscv/boot/dts/thead/th1520.dtsi | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index 56a73134b49e..b33bfb04c955 100644
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -134,6 +134,13 @@ uart_sclk: uart-sclk-clock {
 		#clock-cells = <0>;
 	};
 
+	sdhci_clk: sdhci-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <198000000>;
+		clock-output-names = "sdhci_clk";
+		#clock-cells = <0>;
+	};
+
 	soc {
 		compatible = "simple-bus";
 		interrupt-parent = <&plic>;
@@ -291,6 +298,16 @@ dmac0: dma-controller@ffefc00000 {
 			status = "disabled";
 		};
 
+		mmc0: mmc@ffe7080000 {
+			compatible = "thead,th1520-dwcmshc";
+			reg = <0xff 0xe7080000 0x0 0x10000
+			       0xff 0xef014060 0x0 0x4>;
+			interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "sdhciirq";
+			clocks = <&sdhci_clk>;
+			clock-names = "core";
+		};
+
 		timer0: timer@ffefc32000 {
 			compatible = "snps,dw-apb-timer";
 			reg = <0xff 0xefc32000 0x0 0x14>;

-- 
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: Drew Fustini <dfustini@baylibre.com>
To: Jisheng Zhang <jszhang@kernel.org>, Guo Ren <guoren@kernel.org>,
	 Fu Wei <wefu@redhat.com>, Rob Herring <robh+dt@kernel.org>,
	 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	 Paul Walmsley <paul.walmsley@sifive.com>,
	 Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	 Conor Dooley <conor@kernel.org>,
	Adrian Hunter <adrian.hunter@intel.com>,
	 Ulf Hansson <ulf.hansson@linaro.org>
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	 linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org,
	 Robert Nelson <robertcnelson@beagleboard.org>,
	 Jason Kridner <jkridner@beagleboard.org>,
	 Drew Fustini <dfustini@baylibre.com>
Subject: [PATCH RFC v2 2/4] riscv: dts: thead: Add TH1520 mmc controller and sdhci clock
Date: Fri, 04 Aug 2023 20:14:46 -0700	[thread overview]
Message-ID: <20230724-th1520-emmc-v2-2-132ed2e2171e@baylibre.com> (raw)
In-Reply-To: <20230724-th1520-emmc-v2-0-132ed2e2171e@baylibre.com>

Add nodes for the SDHCI fixed clock and the first mmc controller which
is typically connected to the eMMC device.

Signed-off-by: Drew Fustini <dfustini@baylibre.com>
---
 arch/riscv/boot/dts/thead/th1520.dtsi | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index 56a73134b49e..b33bfb04c955 100644
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -134,6 +134,13 @@ uart_sclk: uart-sclk-clock {
 		#clock-cells = <0>;
 	};
 
+	sdhci_clk: sdhci-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <198000000>;
+		clock-output-names = "sdhci_clk";
+		#clock-cells = <0>;
+	};
+
 	soc {
 		compatible = "simple-bus";
 		interrupt-parent = <&plic>;
@@ -291,6 +298,16 @@ dmac0: dma-controller@ffefc00000 {
 			status = "disabled";
 		};
 
+		mmc0: mmc@ffe7080000 {
+			compatible = "thead,th1520-dwcmshc";
+			reg = <0xff 0xe7080000 0x0 0x10000
+			       0xff 0xef014060 0x0 0x4>;
+			interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "sdhciirq";
+			clocks = <&sdhci_clk>;
+			clock-names = "core";
+		};
+
 		timer0: timer@ffefc32000 {
 			compatible = "snps,dw-apb-timer";
 			reg = <0xff 0xefc32000 0x0 0x14>;

-- 
2.34.1


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  parent reply	other threads:[~2023-08-05  3:15 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-05  3:14 [PATCH RFC v2 0/4] RISC-V: Add basic eMMC support for BeagleV Ahead Drew Fustini
2023-08-05  3:14 ` Drew Fustini
2023-08-05  3:14 ` [PATCH RFC v2 1/4] dt-bindings: mmc: sdhci-of-dwcmhsc: Add T-Head TH1520 support Drew Fustini
2023-08-05  3:14   ` Drew Fustini
2023-08-07  6:29   ` Krzysztof Kozlowski
2023-08-07  6:29     ` Krzysztof Kozlowski
2023-08-16 22:26     ` Drew Fustini
2023-08-16 22:26       ` Drew Fustini
2023-08-19 13:06       ` Krzysztof Kozlowski
2023-08-19 13:06         ` Krzysztof Kozlowski
2023-08-05  3:14 ` Drew Fustini [this message]
2023-08-05  3:14   ` [PATCH RFC v2 2/4] riscv: dts: thead: Add TH1520 mmc controller and sdhci clock Drew Fustini
2023-08-05  3:14 ` [PATCH RFC v2 3/4] riscv: dts: thead: Enable BeagleV Ahead eMMC controller Drew Fustini
2023-08-05  3:14   ` Drew Fustini
2023-08-05  3:14 ` [PATCH RFC v2 4/4] mmc: sdhci-of-dwcmshc: Add support for T-Head TH1520 Drew Fustini
2023-08-05  3:14   ` Drew Fustini
2023-08-06 10:09   ` Jisheng Zhang
2023-08-06 10:09     ` Jisheng Zhang
2023-08-16 21:17     ` Drew Fustini
2023-08-16 21:17       ` Drew Fustini
2023-08-17 23:32       ` Guo Ren
2023-08-17 23:32         ` Guo Ren
2023-08-28  4:40 ` [PATCH RFC v2 0/4] RISC-V: Add basic eMMC support for BeagleV Ahead Jiexun Wang
2023-08-28  4:40   ` Jiexun Wang
2023-08-28 15:05   ` Jisheng Zhang
2023-08-28 15:05     ` Jisheng Zhang
2023-08-29  1:56     ` Jiexun Wang
2023-08-29  1:56       ` Jiexun Wang
2023-08-29 15:19       ` Drew Fustini
2023-08-29 15:19         ` Drew Fustini
2023-09-04 14:53         ` Jisheng Zhang
2023-09-04 14:53           ` Jisheng Zhang

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