From: Dmitry Frolov <frolov@swemel.ru>
To: jonathan.cameron@huawei.com, fan.ni@samsung.com, qemu-devel@nongnu.org
Cc: sdl.qemu@linuxtesting.org, Dmitry Frolov <frolov@swemel.ru>
Subject: [PATCH] hw/cxl: Fix out of bound array access
Date: Wed, 13 Sep 2023 13:10:56 +0300 [thread overview]
Message-ID: <20230913101055.754709-1-frolov@swemel.ru> (raw)
According to cxl_interleave_ways_enc(),
fw->num_targets is allowed to be up to 16.
This also corresponds to CXL specs.
So, the fw->target_hbs[] array is iterated from 0 to 15.
But it is staticaly declared of length 8.
Thus, out of bound array access may occur.
Fixes: c28db9e000 ("hw/pci-bridge: Make PCIe and CXL PXB Devices inherit from TYPE_PXB_DEV")
Signed-off-by: Dmitry Frolov <frolov@swemel.ru>
---
include/hw/cxl/cxl.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/cxl/cxl.h b/include/hw/cxl/cxl.h
index 56c9e7676e..4944725849 100644
--- a/include/hw/cxl/cxl.h
+++ b/include/hw/cxl/cxl.h
@@ -29,7 +29,7 @@ typedef struct PXBCXLDev PXBCXLDev;
typedef struct CXLFixedWindow {
uint64_t size;
char **targets;
- PXBCXLDev *target_hbs[8];
+ PXBCXLDev *target_hbs[16];
uint8_t num_targets;
uint8_t enc_int_ways;
uint8_t enc_int_gran;
--
2.34.1
next reply other threads:[~2023-09-13 10:12 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-13 10:10 Dmitry Frolov [this message]
2023-09-13 11:02 ` [PATCH] hw/cxl: Fix out of bound array access Jonathan Cameron via
2023-09-13 11:36 ` Philippe Mathieu-Daudé
2023-09-13 13:22 ` [PATCH v2] " Dmitry Frolov
2023-09-13 16:58 ` Jonathan Cameron via
2023-09-13 16:56 ` [PATCH] " Jonathan Cameron via
2023-09-14 7:06 ` [PATCH v3] " Dmitry Frolov
2023-09-14 12:36 ` Michael Tokarev
2023-09-14 12:37 ` [PATCH] " Michael Tokarev
2023-09-14 12:38 ` Michael Tokarev
2023-09-14 12:59 ` Philippe Mathieu-Daudé
2023-09-14 13:16 ` Michael Tokarev
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