All of lore.kernel.org
 help / color / mirror / Atom feed
From: Lorenzo Pieralisi <lpieralisi@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: Lorenzo Pieralisi <lpieralisi@kernel.org>,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-acpi@vger.kernel.org, Mark Rutland <mark.rutland@arm.com>,
	Robin Murphy <robin.murphy@arm.com>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Fang Xiang <fangxiang3@xiaomi.com>, Marc Zyngier <maz@kernel.org>
Subject: [PATCH v3 0/5] irqchip/gic-v3: Enable non-coherent GIC designs probing
Date: Fri,  6 Oct 2023 14:59:24 +0200	[thread overview]
Message-ID: <20231006125929.48591-1-lpieralisi@kernel.org> (raw)
In-Reply-To: <20230905104721.52199-1-lpieralisi@kernel.org>

This series is v3 of previous series:

v2: https://lore.kernel.org/all/20230906094139.16032-1-lpieralisi@kernel.org
v1: https://lore.kernel.org/all/20230905104721.52199-1-lpieralisi@kernel.org

v2 -> v3:
	- Added ACPICA temporary changes and ACPI changes to implement
	  ECR https://bugzilla.tianocore.org/show_bug.cgi?id=4557
	- ACPI changes are for testing purposes - subject to ECR code
	  first approval

v1 -> v2:
	- Updated DT bindings as per feedback
	- Updated patch[2] to use GIC quirks infrastructure

Original cover letter
---
The GICv3 architecture specifications provide a means for the
system programmer to set the shareability and cacheability
attributes the GIC components (redistributors and ITSes) use
to drive memory transactions.

Albeit the architecture give control over shareability/cacheability
memory transactions attributes (and barriers), it is allowed to
connect the GIC interconnect ports to non-coherent memory ports
on the interconnect, basically tying off shareability/cacheability
"wires" and de-facto making the redistributors and ITSes non-coherent
memory observers.

This series aims at starting a discussion over a possible solution
to this problem, by adding to the GIC device tree bindings the
standard dma-noncoherent property. The GIC driver uses the property
to force the redistributors and ITSes shareability attributes to
non-shareable, which consequently forces the driver to use CMOs
on GIC memory tables.

On ARM DT DMA is default non-coherent, so the GIC driver can't rely
on the generic DT dma-coherent/non-coherent property management layer
(of_dma_is_coherent()) which would default all GIC designs in the field
as non-coherent; it has to rely on ad-hoc dma-noncoherent property handling.

When a consistent approach is agreed upon for DT an equivalent binding will
be put forward for ACPI based systems.

Lorenzo Pieralisi (4):
  dt-bindings: interrupt-controller: arm,gic-v3: Add dma-noncoherent
    property
  irqchip/gic-v3: Enable non-coherent redistributors/ITSes DT probing
  ACPICA: Add new MADT GICC/GICR/ITS flags handling [code first]
  irqchip/gic-v3: Enable non-coherent redistributors/ITSes ACPI probing

Marc Zyngier (1):
  irqchip/gic-v3-its: Split allocation from initialisation of its_node

 .../interrupt-controller/arm,gic-v3.yaml      |  12 ++
 drivers/acpi/processor_core.c                 |  21 +++
 drivers/irqchip/irq-gic-common.h              |  12 ++
 drivers/irqchip/irq-gic-v3-its.c              | 174 +++++++++++-------
 drivers/irqchip/irq-gic-v3.c                  |  22 +++
 include/acpi/actbl2.h                         |  11 +-
 include/linux/acpi.h                          |   3 +
 7 files changed, 189 insertions(+), 66 deletions(-)

-- 
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: Lorenzo Pieralisi <lpieralisi@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: Lorenzo Pieralisi <lpieralisi@kernel.org>,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-acpi@vger.kernel.org, Mark Rutland <mark.rutland@arm.com>,
	Robin Murphy <robin.murphy@arm.com>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Fang Xiang <fangxiang3@xiaomi.com>, Marc Zyngier <maz@kernel.org>
Subject: [PATCH v3 0/5] irqchip/gic-v3: Enable non-coherent GIC designs probing
Date: Fri,  6 Oct 2023 14:59:24 +0200	[thread overview]
Message-ID: <20231006125929.48591-1-lpieralisi@kernel.org> (raw)
In-Reply-To: <20230905104721.52199-1-lpieralisi@kernel.org>

This series is v3 of previous series:

v2: https://lore.kernel.org/all/20230906094139.16032-1-lpieralisi@kernel.org
v1: https://lore.kernel.org/all/20230905104721.52199-1-lpieralisi@kernel.org

v2 -> v3:
	- Added ACPICA temporary changes and ACPI changes to implement
	  ECR https://bugzilla.tianocore.org/show_bug.cgi?id=4557
	- ACPI changes are for testing purposes - subject to ECR code
	  first approval

v1 -> v2:
	- Updated DT bindings as per feedback
	- Updated patch[2] to use GIC quirks infrastructure

Original cover letter
---
The GICv3 architecture specifications provide a means for the
system programmer to set the shareability and cacheability
attributes the GIC components (redistributors and ITSes) use
to drive memory transactions.

Albeit the architecture give control over shareability/cacheability
memory transactions attributes (and barriers), it is allowed to
connect the GIC interconnect ports to non-coherent memory ports
on the interconnect, basically tying off shareability/cacheability
"wires" and de-facto making the redistributors and ITSes non-coherent
memory observers.

This series aims at starting a discussion over a possible solution
to this problem, by adding to the GIC device tree bindings the
standard dma-noncoherent property. The GIC driver uses the property
to force the redistributors and ITSes shareability attributes to
non-shareable, which consequently forces the driver to use CMOs
on GIC memory tables.

On ARM DT DMA is default non-coherent, so the GIC driver can't rely
on the generic DT dma-coherent/non-coherent property management layer
(of_dma_is_coherent()) which would default all GIC designs in the field
as non-coherent; it has to rely on ad-hoc dma-noncoherent property handling.

When a consistent approach is agreed upon for DT an equivalent binding will
be put forward for ACPI based systems.

Lorenzo Pieralisi (4):
  dt-bindings: interrupt-controller: arm,gic-v3: Add dma-noncoherent
    property
  irqchip/gic-v3: Enable non-coherent redistributors/ITSes DT probing
  ACPICA: Add new MADT GICC/GICR/ITS flags handling [code first]
  irqchip/gic-v3: Enable non-coherent redistributors/ITSes ACPI probing

Marc Zyngier (1):
  irqchip/gic-v3-its: Split allocation from initialisation of its_node

 .../interrupt-controller/arm,gic-v3.yaml      |  12 ++
 drivers/acpi/processor_core.c                 |  21 +++
 drivers/irqchip/irq-gic-common.h              |  12 ++
 drivers/irqchip/irq-gic-v3-its.c              | 174 +++++++++++-------
 drivers/irqchip/irq-gic-v3.c                  |  22 +++
 include/acpi/actbl2.h                         |  11 +-
 include/linux/acpi.h                          |   3 +
 7 files changed, 189 insertions(+), 66 deletions(-)

-- 
2.34.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2023-10-06 12:59 UTC|newest]

Thread overview: 117+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-05 10:47 [PATCH 0/2] irqchip/gic-v3: Enable non-coherent GIC designs probing Lorenzo Pieralisi
2023-09-05 10:47 ` Lorenzo Pieralisi
2023-09-05 10:47 ` [PATCH 1/2] dt-bindings: interrupt-controller: arm,gic-v3: Add dma-noncoherent property Lorenzo Pieralisi
2023-09-05 10:47   ` Lorenzo Pieralisi
2023-09-05 11:17   ` Robin Murphy
2023-09-05 11:17     ` Robin Murphy
2023-09-05 12:22     ` Lorenzo Pieralisi
2023-09-05 12:22       ` Lorenzo Pieralisi
2023-09-05 12:57       ` Robin Murphy
2023-09-05 12:57         ` Robin Murphy
2023-09-05 18:23   ` Rob Herring
2023-09-05 18:23     ` Rob Herring
2023-09-05 10:47 ` [PATCH 2/2] irqchip/gic-v3: Enable non-coherent redistributors/ITSes probing Lorenzo Pieralisi
2023-09-05 10:47   ` Lorenzo Pieralisi
2023-09-05 11:34   ` Marc Zyngier
2023-09-05 11:34     ` Marc Zyngier
2023-09-05 12:14     ` Robin Murphy
2023-09-05 12:14       ` Robin Murphy
2023-09-05 12:30     ` Lorenzo Pieralisi
2023-09-05 12:30       ` Lorenzo Pieralisi
2023-09-05 12:41       ` Marc Zyngier
2023-09-05 12:41         ` Marc Zyngier
2023-09-05 14:24     ` Lorenzo Pieralisi
2023-09-05 14:24       ` Lorenzo Pieralisi
2023-09-05 14:34       ` Marc Zyngier
2023-09-05 14:34         ` Marc Zyngier
2023-09-06 11:01       ` Fang Xiang
2023-09-06 11:01         ` Fang Xiang
2023-09-06 11:10         ` Marc Zyngier
2023-10-03 14:43     ` Lorenzo Pieralisi
2023-10-03 14:43       ` Lorenzo Pieralisi
2023-10-03 16:18       ` Robin Murphy
2023-10-03 16:18         ` Robin Murphy
2023-10-03 16:44       ` Marc Zyngier
2023-10-03 16:44         ` Marc Zyngier
2023-10-04  7:13         ` Lorenzo Pieralisi
2023-10-04  7:13           ` Lorenzo Pieralisi
2023-10-05 13:59         ` Lorenzo Pieralisi
2023-10-05 13:59           ` Lorenzo Pieralisi
2023-09-06  9:41 ` [PATCH v2 0/2] irqchip/gic-v3: Enable non-coherent GIC designs probing Lorenzo Pieralisi
2023-09-06  9:41   ` Lorenzo Pieralisi
2023-09-06  9:41   ` [PATCH v2 1/2] dt-bindings: interrupt-controller: arm,gic-v3: Add dma-noncoherent property Lorenzo Pieralisi
2023-09-06  9:41     ` Lorenzo Pieralisi
2023-09-06 11:23     ` Rob Herring
2023-09-06 11:23       ` Rob Herring
2023-09-06 11:27     ` Lorenzo Pieralisi
2023-09-06 11:27       ` Lorenzo Pieralisi
2023-09-06  9:41   ` [PATCH v2 2/2] irqchip/gic-v3: Enable non-coherent redistributors/ITSes probing Lorenzo Pieralisi
2023-09-06  9:41     ` Lorenzo Pieralisi
2023-09-06  9:52   ` [PATCH v2 0/2] irqchip/gic-v3: Enable non-coherent GIC designs probing Marc Zyngier
2023-09-06  9:52     ` Marc Zyngier
2023-09-06 11:23     ` Lorenzo Pieralisi
2023-09-06 11:23       ` Lorenzo Pieralisi
2023-09-21 10:11       ` Lorenzo Pieralisi
2023-09-21 10:11         ` Lorenzo Pieralisi
2023-10-06 12:59 ` Lorenzo Pieralisi [this message]
2023-10-06 12:59   ` [PATCH v3 0/5] " Lorenzo Pieralisi
2023-10-06 12:59   ` [PATCH v3 1/5] dt-bindings: interrupt-controller: arm,gic-v3: Add dma-noncoherent property Lorenzo Pieralisi
2023-10-06 12:59     ` Lorenzo Pieralisi
2023-10-07 12:00     ` [irqchip: irq/irqchip-fixes] " irqchip-bot for Lorenzo Pieralisi
2023-10-06 12:59   ` [PATCH v3 2/5] irqchip/gic-v3: Enable non-coherent redistributors/ITSes DT probing Lorenzo Pieralisi
2023-10-06 12:59     ` Lorenzo Pieralisi
2023-10-07 12:00     ` [irqchip: irq/irqchip-fixes] " irqchip-bot for Lorenzo Pieralisi
2023-10-06 12:59   ` [PATCH v3 3/5] irqchip/gic-v3-its: Split allocation from initialisation of its_node Lorenzo Pieralisi
2023-10-06 12:59     ` Lorenzo Pieralisi
2023-10-07 12:00     ` [irqchip: irq/irqchip-fixes] " irqchip-bot for Marc Zyngier
2023-10-24  8:48     ` [PATCH v3 3/5] " Dominic Rath
2023-10-24  8:48       ` Dominic Rath
2023-10-24 10:18       ` Marc Zyngier
2023-10-24 10:18         ` Marc Zyngier
2023-10-24 13:13         ` Dominic Rath
2023-10-24 13:13           ` Dominic Rath
2023-10-25 19:51       ` [tip: irq/urgent] irqchip/gic-v3-its: Don't override quirk settings with default values tip-bot2 for Marc Zyngier
2023-10-06 12:59   ` [PATCH v3 4/5] ACPICA: Add new MADT GICC/GICR/ITS flags handling [code first] Lorenzo Pieralisi
2023-10-06 12:59     ` Lorenzo Pieralisi
2023-10-06 12:59   ` [PATCH v3 5/5] irqchip/gic-v3: Enable non-coherent redistributors/ITSes ACPI probing Lorenzo Pieralisi
2023-10-06 12:59     ` Lorenzo Pieralisi
2023-10-17 14:19     ` Lorenzo Pieralisi
2023-10-17 14:19       ` Lorenzo Pieralisi
2023-10-17 16:44       ` Marc Zyngier
2023-10-17 16:44         ` Marc Zyngier
2023-10-18  8:42         ` Lorenzo Pieralisi
2023-10-18  8:42           ` Lorenzo Pieralisi
2023-10-19 11:12           ` Marc Zyngier
2023-10-19 11:12             ` Marc Zyngier
2023-12-27 11:00 ` [PATCH v4 0/3] irqchip/gic-v3: Enable non-coherent GIC designs probing Lorenzo Pieralisi
2023-12-27 11:00   ` Lorenzo Pieralisi
2023-12-27 11:00   ` [PATCH v4 1/3] ACPICA: MADT: Add GICC online capable bit handling Lorenzo Pieralisi
2023-12-27 11:00     ` Lorenzo Pieralisi
2024-01-09 14:27     ` Rafael J. Wysocki
2024-01-09 14:27       ` Rafael J. Wysocki
2023-12-27 11:00   ` [PATCH v4 2/3] ACPICA: MADT: Add new MADT GICC/GICR/ITS non-coherent flags handling Lorenzo Pieralisi
2023-12-27 11:00     ` Lorenzo Pieralisi
2023-12-27 11:00   ` [PATCH v4 3/3] irqchip/gic-v3: Enable non-coherent redistributors/ITSes ACPI probing Lorenzo Pieralisi
2023-12-27 11:00     ` Lorenzo Pieralisi
2024-01-04 11:12     ` Marc Zyngier
2024-01-04 11:12       ` Marc Zyngier
2024-01-08  9:43       ` Lorenzo Pieralisi
2024-01-08  9:43         ` Lorenzo Pieralisi
2024-01-08  9:52         ` Marc Zyngier
2024-01-08  9:52           ` Marc Zyngier
2024-01-22 16:18     ` Lorenzo Pieralisi
2024-01-22 16:18       ` Lorenzo Pieralisi
2024-01-22 18:27       ` Marc Zyngier
2024-01-22 18:27         ` Marc Zyngier
2024-01-03 13:43   ` [PATCH v4 0/3] irqchip/gic-v3: Enable non-coherent GIC designs probing Rafael J. Wysocki
2024-01-03 13:43     ` Rafael J. Wysocki
2024-01-04 11:34     ` Marc Zyngier
2024-01-04 11:34       ` Marc Zyngier
2024-01-04 12:04       ` Russell King (Oracle)
2024-01-04 12:04         ` Russell King (Oracle)
2024-01-04 13:21         ` Rafael J. Wysocki
2024-01-04 13:21           ` Rafael J. Wysocki
2024-01-04 13:47           ` Russell King (Oracle)
2024-01-04 13:47             ` Russell King (Oracle)
2024-01-08  9:45           ` Lorenzo Pieralisi
2024-01-08  9:45             ` Lorenzo Pieralisi

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20231006125929.48591-1-lpieralisi@kernel.org \
    --to=lpieralisi@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=fangxiang3@xiaomi.com \
    --cc=linux-acpi@vger.kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=maz@kernel.org \
    --cc=rafael@kernel.org \
    --cc=robh+dt@kernel.org \
    --cc=robin.murphy@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.