[GIT PULL] irqchip fixes for 6.6, take #2

[Marc Zyngier <maz@kernel.org>]

Hi Thomas,

This is the second batch of irqchip fixes for 6.6.

On the menu this time are 3 interesting fixes: the RISC-V INTC marking
all of its nodes as initialised, allowing per-CPU device to correctly
probe, GICv3 needing some help to work with some integrations that
don't describe to SW how to deal with cacheable attributes, and STM32
not really knowing how to translate interrupts from DT. The rest is a
small set of DT binding updates.

Finally, something that is only important to me: I am removing myself
from the bulk of the IRQ subsystem maintenance. Not that I have done
much in terms of the core code in a while, and my reviewing bandwidth
is pretty much non-existent these days. I'll still keep maintaining
the ARM GICs though. Hopefully this will give me time for some actual
contributions instead of watching patches passing by.

I'd like to thank you for having trusted me with this code over the
years, as it has been quite an experience.

Please pull,

	M.

The following changes since commit 9b8df572ba3f4e544366196820a719a40774433e:

  irqchip: renesas-rzg2l: Fix logic to clear TINT interrupt source (2023-09-24 10:18:19 +0100)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git tags/irqchip-fixes-6.6-2

for you to fetch changes up to b673fe1a6229a49be5394f4e539055d9ce685615:

  MAINTAINERS: Remove myself from the general IRQ subsystem maintenance (2023-10-07 12:47:13 +0100)

----------------------------------------------------------------
irqchip fixes for 6.6, take #2

- DT binding updates for Renesas r8a779f0 and rzg2l

- Let GICv3 honor the "dma-non-coherent" attribute for systems that
  rely on SW guessing what the HW supports

- Fix the RISC-V INTC probing by marking all devices as initialised
  at once

- Properly translate interrupt numbers from DT on stm32-exti

- Use irq_data_get_irq_chip_data() in the rzg2l driver instead of
  blindly dereferencing the irq_data structure

- Add a MAINTAINERS entry for the various ARM GIC irqchip drivers

- Remove myself as the top-level irqchip/irqdomain maintainer

----------------------------------------------------------------
Anup Patel (1):
      irqchip/riscv-intc: Mark all INTC nodes as initialized

Ben Wolsieffer (1):
      irqchip/stm32-exti: add missing DT IRQ flag translation

Geert Uytterhoeven (2):
      dt-bindings: interrupt-controller: renesas,irqc: Add r8a779f0 support
      irqchip/renesas-rzg2l: Convert to irq_data_get_irq_chip_data()

Lad Prabhakar (1):
      dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/G2UL SoC

Lorenzo Pieralisi (2):
      dt-bindings: interrupt-controller: arm,gic-v3: Add dma-noncoherent property
      irqchip/gic-v3: Enable non-coherent redistributors/ITSes DT probing

Marc Zyngier (3):
      irqchip/gic-v3-its: Split allocation from initialisation of its_node
      MAINTAINERS: Add myself as the ARM GIC maintainer
      MAINTAINERS: Remove myself from the general IRQ subsystem maintenance

 .../bindings/interrupt-controller/arm,gic-v3.yaml  |  12 ++
 .../interrupt-controller/renesas,irqc.yaml         |   1 +
 .../interrupt-controller/renesas,rzg2l-irqc.yaml   | 225 ++++++++++++++++-----
 MAINTAINERS                                        |  14 +-
 drivers/irqchip/irq-gic-common.h                   |   4 +
 drivers/irqchip/irq-gic-v3-its.c                   | 170 ++++++++++------
 drivers/irqchip/irq-gic-v3.c                       |  13 ++
 drivers/irqchip/irq-renesas-rzg2l.c                |   2 +-
 drivers/irqchip/irq-riscv-intc.c                   |  10 +-
 drivers/irqchip/irq-stm32-exti.c                   |   1 +
 10 files changed, 329 insertions(+), 123 deletions(-)