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[2603:6081:7b00:6400:3f5:f73:ac9e:a6c1]) by smtp.gmail.com with ESMTPSA id v17-20020ac873d1000000b0041950c7f6d8sm3149897qtp.60.2023.11.14.17.38.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Nov 2023 17:38:28 -0800 (PST) Date: Tue, 14 Nov 2023 20:38:26 -0500 From: Tom Rini To: Bin Meng Cc: Simon Glass , U-Boot Mailing List , Anatolij Gustschin Subject: Re: [PATCH v4 09/12] x86: Enable SSE in 64-bit mode Message-ID: <20231115013826.GF6601@bill-the-cat> References: <20231112200255.172351-1-sjg@chromium.org> <20231112200255.172351-5-sjg@chromium.org> <20231113225915.GL6601@bill-the-cat> <20231113235210.GM6601@bill-the-cat> <20231114162228.GU6601@bill-the-cat> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="N3tDePZvWxv64ZDS" Content-Disposition: inline In-Reply-To: X-Clacks-Overhead: GNU Terry Pratchett X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean --N3tDePZvWxv64ZDS Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Nov 15, 2023 at 08:44:22AM +0800, Bin Meng wrote: > Hi Tom, >=20 > On Wed, Nov 15, 2023 at 12:22=E2=80=AFAM Tom Rini wr= ote: > > > > On Tue, Nov 14, 2023 at 09:49:08AM +0800, Bin Meng wrote: > > > Hi Tom, > > > > > > On Tue, Nov 14, 2023 at 7:52=E2=80=AFAM Tom Rini = wrote: > > > > > > > > On Tue, Nov 14, 2023 at 07:46:36AM +0800, Bin Meng wrote: > > > > > Hi Tom, > > > > > > > > > > On Tue, Nov 14, 2023 at 6:59=E2=80=AFAM Tom Rini wrote: > > > > > > > > > > > > On Mon, Nov 13, 2023 at 03:28:13PM -0700, Simon Glass wrote: > > > > > > > Hi Bin, > > > > > > > > > > > > > > On Mon, 13 Nov 2023 at 15:08, Bin Meng w= rote: > > > > > > > > > > > > > > > > Hi Simon, > > > > > > > > > > > > > > > > On Mon, Nov 13, 2023 at 4:03=E2=80=AFAM Simon Glass wrote: > > > > > > > > > > > > > > > > > > This is needed to support Truetype fonts. In any case, th= e compiler > > > > > > > > > expects SSE to be available in 64-bit mode. Provide an op= tion to enable > > > > > > > > > SSE so that hardware floating-point arithmetic works. > > > > > > > > > > > > > > > > > > Signed-off-by: Simon Glass > > > > > > > > > Suggested-by: Bin Meng > > > > > > > > > --- > > > > > > > > > > > > > > > > > > Changes in v4: > > > > > > > > > - Use a Kconfig option > > > > > > > > > > > > > > > > > > arch/x86/Kconfig | 8 ++++++++ > > > > > > > > > arch/x86/config.mk | 4 ++++ > > > > > > > > > arch/x86/cpu/x86_64/cpu.c | 12 ++++++++++++ > > > > > > > > > drivers/video/Kconfig | 1 + > > > > > > > > > 4 files changed, 25 insertions(+) > > > > > > > > > > > > > > > > > > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig > > > > > > > > > index 99e59d94c606..6b532d712ee8 100644 > > > > > > > > > --- a/arch/x86/Kconfig > > > > > > > > > +++ b/arch/x86/Kconfig > > > > > > > > > @@ -723,6 +723,14 @@ config ROM_TABLE_SIZE > > > > > > > > > hex > > > > > > > > > default 0x10000 > > > > > > > > > > > > > > > > > > +config X86_HARDFP > > > > > > > > > + bool "Support hardware floating point" > > > > > > > > > + help > > > > > > > > > + U-Boot generally does not make use of floating = point. Where this is > > > > > > > > > + needed, it can be enabled using this option. Th= is adjusts the > > > > > > > > > + start-up code for 64-bit mode and changes the c= ompiler options for > > > > > > > > > + 64-bit to enable SSE. > > > > > > > > > > > > > > > > As discussed in another thread, this option should be made = global to > > > > > > > > all architectures and by default no. > > > > > > > > > > > > > > > > > + > > > > > > > > > config HAVE_ITSS > > > > > > > > > bool "Enable ITSS" > > > > > > > > > help > > > > > > > > > diff --git a/arch/x86/config.mk b/arch/x86/config.mk > > > > > > > > > index 26ec1af2f0b0..2e3a7119e798 100644 > > > > > > > > > --- a/arch/x86/config.mk > > > > > > > > > +++ b/arch/x86/config.mk > > > > > > > > > @@ -27,9 +27,13 @@ ifeq ($(IS_32BIT),y) > > > > > > > > > PLATFORM_CPPFLAGS +=3D -march=3Di386 -m32 > > > > > > > > > else > > > > > > > > > PLATFORM_CPPFLAGS +=3D $(if $(CONFIG_SPL_BUILD),,-fpic) = -fno-common -march=3Dcore2 -m64 > > > > > > > > > + > > > > > > > > > +ifndef CONFIG_X86_HARDFP > > > > > > > > > PLATFORM_CPPFLAGS +=3D -mno-mmx -mno-sse > > > > > > > > > endif > > > > > > > > > > > > > > > > > > +endif # IS_32BIT > > > > > > > > > + > > > > > > > > > PLATFORM_RELFLAGS +=3D -fdata-sections -ffunction-sectio= ns -fvisibility=3Dhidden > > > > > > > > > > > > > > > > > > KBUILD_LDFLAGS +=3D -Bsymbolic -Bsymbolic-functions > > > > > > > > > diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86= _64/cpu.c > > > > > > > > > index 2647bff891f8..5ea746ecce4d 100644 > > > > > > > > > --- a/arch/x86/cpu/x86_64/cpu.c > > > > > > > > > +++ b/arch/x86/cpu/x86_64/cpu.c > > > > > > > > > @@ -10,6 +10,7 @@ > > > > > > > > > #include > > > > > > > > > #include > > > > > > > > > #include > > > > > > > > > +#include > > > > > > > > > > > > > > > > > > DECLARE_GLOBAL_DATA_PTR; > > > > > > > > > > > > > > > > > > @@ -39,11 +40,22 @@ int x86_mp_init(void) > > > > > > > > > return 0; > > > > > > > > > } > > > > > > > > > > > > > > > > > > +/* enable SSE features for hardware floating point */ > > > > > > > > > +static void setup_sse_features(void) > > > > > > > > > +{ > > > > > > > > > + asm ("mov %%cr4, %%rax\n" \ > > > > > > > > > + "or %0, %%rax\n" \ > > > > > > > > > + "mov %%rax, %%cr4\n" \ > > > > > > > > > + : : "i" (X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT) : "= eax"); > > > > > > > > > +} > > > > > > > > > + > > > > > > > > > int x86_cpu_reinit_f(void) > > > > > > > > > { > > > > > > > > > /* set the vendor to Intel so that native_calibra= te_tsc() works */ > > > > > > > > > gd->arch.x86_vendor =3D X86_VENDOR_INTEL; > > > > > > > > > gd->arch.has_mtrr =3D true; > > > > > > > > > + if (IS_ENABLED(CONFIG_X86_HARDFP)) > > > > > > > > > + setup_sse_features(); > > > > > > > > > > > > > > > > > > return 0; > > > > > > > > > } > > > > > > > > > diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig > > > > > > > > > index 6f319ba0d544..39c82521be16 100644 > > > > > > > > > --- a/drivers/video/Kconfig > > > > > > > > > +++ b/drivers/video/Kconfig > > > > > > > > > @@ -180,6 +180,7 @@ config CONSOLE_ROTATION > > > > > > > > > > > > > > > > > > config CONSOLE_TRUETYPE > > > > > > > > > bool "Support a console that uses TrueType fonts" > > > > > > > > > + select X86_HARDFP if X86 > > > > > > > > > > > > > > > > This should be "depends on HARDFP", indicating that the Tru= eType > > > > > > > > library is using hardware fp itself, and user has to explic= itly turn > > > > > > > > the hardware fp Kconfig option on. > > > > > > > > > > > > > > So you mean 'depends on HARDFP if X86' ? After all, this is = only for > > > > > > > X86 - other archs can use softfp which is already enabled, as= I > > > > > > > understand it. > > > > > > > > > > > > > > > > > > > > > > > "Select" does not work for architectures that does not have= the > > > > > > > > "enabling hardware fp" logic in place. > > > > > > > > > > > > > > > > > help > > > > > > > > > TrueTrype fonts can provide outline-drawing cap= ability rather than > > > > > > > > > needing to provide a bitmap for each font and s= ize that is needed. > > > > > > > > > -- > > > > > > > > > > > > > > I still don't think we are on the same page here. I would pre= fer to > > > > > > > just enable the options without any option. I really don't wa= nt to get > > > > > > > into RISC-V stuff - that is a separate concern. > > > > > > > > > > > > > > From my POV it seems that x86 is special in that: > > > > > > > - it uses hardfp > > > > > > > - hardfp is always available in any CPU with 64-bit support (= I think?) > > > > > > > > > > > > Maybe the issue even is that on x86 we're being too imprecise i= n our > > > > > > build rules (and also on RISC-V, another issue). Today on x86 t= his fails > > > > > > because we say -mno-mmx -mno-sse and not also -msoft-float. I c= an just > > > > > > turn that on, on all x86 targets today and things build. Would = that not > > > > > > also fix the truetype issue? > > > > > > > > > > One can easily turn on compiler flags for x86 (and for RISC-V too= ) to > > > > > tell the compiler to generate floating point instructions if it s= ees > > > > > fit. > > > > > > > > > > However on x86 and RISC-V there are configurations needed to prog= ram > > > > > the CPU registers to turn on the hardware FP, otherwise an except= ion > > > > > will be generated. > > > > > > > > Right, which is why I'm saying why don't we just use -msoft-float > > > > instead, so that we don't have to worry about enabling features (and > > > > also additional registers on the stack yes?) ? > > > > > > Yes, we should be using -msoft-float for all architectures by default > > > if the compiler supports that on each arch. IIRC, the RISC-V back-end > > > didn't support that years ago but things may change recently. > > > > OK, so for this series, lets please just simplify the logic in > > arch/x86/config.mk (and do some boot testing too of course) to > > -msoft-float everyone, and then the fonts should also be working and we > > don't have to deal with some other details as well, yes? And having said > > that, just for sanity sake keep a stopwatch nearby and do some normal > > functional tests too, to make sure we don't suddenly speed-regress? >=20 > To make fonts work with -msoft-float for everyone, we need U-Boot to > link with the compiler intrinsics library (e.g.: libgcc, or > compler-rt). As of today some architectures choose a private libgcc > implementation within U-Boot. OK, so playing around further, I thought there was already a config that hit this as a run-time problem, which isn't the case. So, yes, I was wrong and for x86_64 I guess you just need to do what needs doing for SSE to be available and build those files with the right flags. Everyone else can safely turn off floating point and use a software library (or at least, RISC-V is the only outstanding question, we can deal with it later). Sorry for the confusion. --=20 Tom --N3tDePZvWxv64ZDS Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmVUIQsACgkQFHw5/5Y0 tyzvDAv/dN9z4onfM4Nlb4LTFsxc76Iu9fTezOzxa4sTz7clCM/oYSOYkKUf6EDe ze4UkvT64gPey1DH+8OCqaKY090u/fw7ueDcC5xjYwGsoBDpuRaC5bsUrlwxRlQb 1K1y770VWZ3ZbgcWPafLyctrndGZtE2f/H2kcw8xOwGbknHNNNuRrbR3GD4p7B6r gNFv/pvaUXru1qwLfB8+FXqpY82fk8LDJkJKe5kutZ/l799BnzP5RyBcPoGaGCYD tyUDGgXWTG/N0W0K2asGTwhLxEUhiR5Luwu+ar42zS64G33H5zqNFVjqewvev5jC 0VW7Jc69Csriye6Bv70uIRSSqMtMi0/O3uF9ZEV0/j0Bb1A5dNgoVuDfTt2toj+5 tI6jpMGW3LnS8eNCkS+3Nppcj5m/rGaFxjRHtot7LqU5aD+c4Sr9u8Uhm8SFL7OW ujJK+xTHw5Ox2z3DUng/KgIgUzaSCSQfzmj0fCcr1N58qEm4Irlrlu5WCSABxBad 6AMN6xi3 =PGbk -----END PGP SIGNATURE----- --N3tDePZvWxv64ZDS--