From: Jason Gunthorpe <jgg@ziepe.ca>
To: Lu Baolu <baolu.lu@linux.intel.com>
Cc: Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Kevin Tian <kevin.tian@intel.com>,
iommu@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/1] iommu/vt-d: Support enforce_cache_coherency only for empty domains
Date: Wed, 29 Nov 2023 16:08:34 -0400 [thread overview]
Message-ID: <20231129200834.GJ1312390@ziepe.ca> (raw)
In-Reply-To: <20231114011036.70142-1-baolu.lu@linux.intel.com>
On Tue, Nov 14, 2023 at 09:10:33AM +0800, Lu Baolu wrote:
> diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h
> index 65d37a138c75..ce030c5b5772 100644
> --- a/drivers/iommu/intel/iommu.h
> +++ b/drivers/iommu/intel/iommu.h
> @@ -602,6 +602,9 @@ struct dmar_domain {
> */
> u8 dirty_tracking:1; /* Dirty tracking is enabled */
> u8 nested_parent:1; /* Has other domains nested on it */
> + u8 has_mappings:1; /* Has mappings configured through
> + * iommu_map() interface.
> + */
Is it racey?
The other option is to make iommfd do this and forbid it from
switching the enforce_cache_coherency if the IOAS has any maps
attached. We can get the correct locking at that point.
AMD has the same issue if it ever wants to implement its per-PTE bit
Jason
next prev parent reply other threads:[~2023-11-29 20:08 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-14 1:10 [PATCH 1/1] iommu/vt-d: Support enforce_cache_coherency only for empty domains Lu Baolu
2023-11-14 1:10 ` [PATCH 1/1] iommu/vt-d: Omit devTLB invalidation requests when TES=0 Lu Baolu
2023-11-14 3:14 ` Tian, Kevin
2023-11-14 3:13 ` Baolu Lu
2023-11-14 4:45 ` Tian, Kevin
2023-11-14 4:54 ` Baolu Lu
2023-11-14 5:31 ` Tian, Kevin
2023-11-29 20:10 ` Jason Gunthorpe
2023-11-30 4:06 ` Baolu Lu
2023-11-30 12:15 ` Jason Gunthorpe
2023-11-14 1:10 ` [PATCH 1/1] iommu/vt-d: Disable PCI ATS in legacy passthrough mode Lu Baolu
2023-11-14 3:14 ` Tian, Kevin
2023-11-16 7:35 ` Baolu Lu
2023-11-16 8:24 ` Tian, Kevin
2023-11-17 1:09 ` Baolu Lu
2023-11-17 2:22 ` Tian, Kevin
2023-11-29 20:13 ` Jason Gunthorpe
2023-11-30 5:44 ` Baolu Lu
2023-11-30 16:18 ` Jason Gunthorpe
2023-11-14 1:10 ` [PATCH 1/1] iommu/vt-d: Make context clearing consistent with context mapping Lu Baolu
2023-11-14 3:20 ` Tian, Kevin
2023-11-14 3:22 ` Baolu Lu
2023-11-14 4:46 ` Tian, Kevin
2023-11-14 3:16 ` [PATCH 1/1] iommu/vt-d: Support enforce_cache_coherency only for empty domains Tian, Kevin
2023-11-29 20:08 ` Jason Gunthorpe [this message]
2023-11-30 3:48 ` Baolu Lu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20231129200834.GJ1312390@ziepe.ca \
--to=jgg@ziepe.ca \
--cc=baolu.lu@linux.intel.com \
--cc=iommu@lists.linux.dev \
--cc=joro@8bytes.org \
--cc=kevin.tian@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=robin.murphy@arm.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.