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Thu, 01 Feb 2024 23:33:36 -0800 (PST) Date: Fri, 2 Feb 2024 13:03:34 +0530 From: Viresh Kumar To: Konrad Dybcio Cc: Manivannan Sadhasivam , Krishna chaitanya chundru , Bjorn Andersson , Bjorn Helgaas , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Rob Herring , Johan Hovold , Brian Masney , Georgi Djakov , linux-arm-msm@vger.kernel.org, vireshk@kernel.org, quic_vbadigan@quicinc.com, quic_skananth@quicinc.com, quic_nitegupt@quicinc.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v6 5/6] arm64: dts: qcom: sm8450: Add opp table support to PCIe Message-ID: <20240202073334.mkabgezwxn3qe7iy@vireshk-i7> References: <20240112-opp_support-v6-5-77bbf7d0cc37@quicinc.com> <20240129160420.GA27739@thinkpad> <20240130061111.eeo2fzaltpbh35sj@vireshk-i7> <20240130071449.GG32821@thinkpad> <20240130083619.lqbj47fl7aa5j3k5@vireshk-i7> <20240130094804.GD83288@thinkpad> <20240130095508.zgufudflizrpxqhy@vireshk-i7> <20240130131625.GA2554@thinkpad> <20240131052335.6nqpmccgr64voque@vireshk-i7> <610d5d7c-ec8d-42f1-81a2-1376b8a1a43f@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <610d5d7c-ec8d-42f1-81a2-1376b8a1a43f@linaro.org> On 01-02-24, 15:45, Konrad Dybcio wrote: > I'm lukewarm on this. > > A *lot* of hardware has more complex requirements than "x MBps at y MHz", > especially when performance counters come into the picture for dynamic > bw management. > > OPP tables can't really handle this properly. There was a similar concern for voltages earlier on and we added the capability of adjusting the voltage for OPPs in the OPP core. Maybe something similar can be done here ? -- viresh