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From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: ville.syrjala@linux.intel.com, pekka.paalanen@collabora.com,
	contact@emersion.fr, harry.wentland@amd.com, mwen@igalia.com,
	jadahl@redhat.com, sebastian.wick@redhat.com,
	shashank.sharma@amd.com, agoins@nvidia.com, joshua@froggi.es,
	mdaenzer@redhat.com, aleixpol@kde.org, xaver.hugl@gmail.com,
	victoria@system76.com, daniel@ffwll.ch, quic_naseer@quicinc.com,
	quic_cbraga@quicinc.com, quic_abhinavk@quicinc.com,
	arthurgrillo@riseup.net, marcan@marcan.st, Liviu.Dudau@arm.com,
	sashamcintosh@google.com, sean@poorly.run,
	Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>,
	Uma Shankar <uma.shankar@intel.com>
Subject: [PATCH 18/28] drm/i915/color: Add and attach COLORPIPELINE plane property
Date: Tue, 13 Feb 2024 12:18:25 +0530	[thread overview]
Message-ID: <20240213064835.139464-19-uma.shankar@intel.com> (raw)
In-Reply-To: <20240213064835.139464-1-uma.shankar@intel.com>

From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>

Add supported color pipelines and attach it to plane.

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 37 ++++++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_color.h |  3 ++
 2 files changed, 40 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 223cd1ff7291..d6d5e56b4f2c 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -4000,6 +4000,43 @@ int intel_plane_tf_pipeline_init(struct drm_plane *plane, struct drm_prop_enum_l
 	return 0;
 }
 
+int intel_plane_color_init(struct drm_plane *plane)
+{
+	struct drm_device *dev = plane->dev;
+	struct drm_property *prop;
+	struct drm_prop_enum_list pipelines[MAX_COLOR_PIPELINES];
+	int len = 0;
+	int ret;
+
+	/* Add "Bypass" (i.e. NULL) pipeline */
+	pipelines[len].type = 0;
+	pipelines[len].name = "Bypass";
+	len++;
+
+	/* Add pipeline consisting of transfer functions */
+	ret = intel_plane_tf_pipeline_init(plane, &pipelines[len]);
+	if (ret)
+		return ret;
+	len++;
+
+	/* Create COLOR_PIPELINE property and attach */
+	prop = drm_property_create_enum(dev, DRM_MODE_PROP_ATOMIC,
+					"COLOR_PIPELINE",
+					pipelines, len);
+	if (!prop)
+		return -ENOMEM;
+
+	plane->color_pipeline_property = prop;
+
+	drm_object_attach_property(&plane->base, prop, 0);
+
+	/* TODO check if needed */
+	if (plane->state)
+		plane->state->color_pipeline = NULL;
+
+	return 0;
+}
+
 void intel_color_crtc_init(struct intel_crtc *crtc)
 {
 	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
diff --git a/drivers/gpu/drm/i915/display/intel_color.h b/drivers/gpu/drm/i915/display/intel_color.h
index e0b75dcb1b65..df0e1f6be067 100644
--- a/drivers/gpu/drm/i915/display/intel_color.h
+++ b/drivers/gpu/drm/i915/display/intel_color.h
@@ -16,6 +16,8 @@ struct drm_plane;
 struct drm_prop_enum_list;
 enum intel_color_block;
 
+#define MAX_COLOR_PIPELINES 5
+
 void intel_color_init_hooks(struct drm_i915_private *i915);
 int intel_color_init(struct drm_i915_private *i915);
 void intel_color_crtc_init(struct intel_crtc *crtc);
@@ -37,5 +39,6 @@ void intel_color_assert_luts(const struct intel_crtc_state *crtc_state);
 struct intel_plane_colorop *intel_colorop_alloc(void);
 struct intel_plane_colorop *intel_plane_colorop_create(enum intel_color_block id);
 int intel_plane_tf_pipeline_init(struct drm_plane *plane, struct drm_prop_enum_list *list);
+int intel_plane_color_init(struct drm_plane *plane);
 
 #endif /* __INTEL_COLOR_H__ */
-- 
2.42.0


  parent reply	other threads:[~2024-02-13  6:42 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-13  6:48 [PATCH 00/28] Plane Color Pipeline support for Intel platforms Uma Shankar
2024-02-13  6:48 ` [PATCH 01/28] [NOT FOR REVIEW] drm: color pipeline base work Uma Shankar
2024-02-13 21:15   ` kernel test robot
2024-02-14  2:46   ` kernel test robot
2024-02-16 12:07   ` kernel test robot
2024-02-17 16:56   ` kernel test robot
2024-02-13  6:48 ` [PATCH 02/28] drm: Add missing function declarations Uma Shankar
2024-02-13  6:48 ` [PATCH 03/28] drm: handle NULL next colorop in drm_colorop_set_next_property Uma Shankar
2024-02-13  6:48 ` [PATCH 04/28] drm: Fix error logging in set Color Pipeline Uma Shankar
2024-02-13  6:48 ` [PATCH 05/28] drm: Add support for 3x3 CTM Uma Shankar
2024-02-13  9:15   ` Pekka Paalanen
2024-02-14  6:55     ` Shankar, Uma
2024-02-13  6:48 ` [PATCH 06/28] drm: Add Enhanced LUT precision structure Uma Shankar
2024-02-13  6:48 ` [PATCH 07/28] drm: Add 1D LUT color op Uma Shankar
2024-02-13  6:48 ` [PATCH 08/28] drm: Add Color lut range attributes Uma Shankar
2024-02-13 12:04   ` Sebastian Wick
2024-02-14  7:34     ` Shankar, Uma
2024-02-13  6:48 ` [PATCH 09/28] drm: Add Color ops capability property Uma Shankar
2024-02-13 12:04   ` Sebastian Wick
2024-02-14  7:36     ` Shankar, Uma
2024-02-13  6:48 ` [PATCH 10/28] drm: Define helper to create color " Uma Shankar
2024-02-13  6:48 ` [PATCH 11/28] drm: Define helper for adding capability property for 1D LUT Uma Shankar
2024-02-13  6:48 ` [PATCH 12/28] drm/i915: Add identifiers for intel color blocks Uma Shankar
2024-02-13  6:48 ` [PATCH 13/28] drm/i915: Add intel_color_op Uma Shankar
2024-02-13  6:48 ` [PATCH 14/28] drm/i915/color: Add helper to allocate intel colorop Uma Shankar
2024-02-13  6:48 ` [PATCH 15/28] drm/i915/color: Add helper to create " Uma Shankar
2024-02-13  6:48 ` [PATCH 16/28] drm/i915/color: Create a transfer function color pipeline Uma Shankar
2024-02-19  7:34   ` Dan Carpenter
2024-02-13  6:48 ` [PATCH 17/28] drm/i915: Define segmented Lut and add capabilities to colorop Uma Shankar
2024-02-13  9:37   ` Pekka Paalanen
2024-02-14  7:28     ` Shankar, Uma
2024-02-14  9:03       ` Pekka Paalanen
2024-02-19 10:34         ` Shankar, Uma
2024-02-19 12:02           ` Pekka Paalanen
2024-02-13  6:48 ` Uma Shankar [this message]
2024-02-13  6:48 ` [PATCH 19/28] drm/i915/color: Add framework to set colorop Uma Shankar
2024-02-13  6:48 ` [PATCH 20/28] drm/i915/color: Add callbacks to set plane CTM Uma Shankar
2024-02-13  6:48 ` [PATCH 21/28] drm/i915/color: Add plane CTM callback for TGL and beyond Uma Shankar
2024-02-13  6:48 ` [PATCH 22/28] drm/i915: Add register definitions for Plane Degamma Uma Shankar
2024-02-13  6:48 ` [PATCH 23/28] drm/i915/color: Add framework to program PRE/POST CSC LUT Uma Shankar
2024-02-13  6:48 ` [PATCH 24/28] drm/i915: Add register definitions for Plane Post CSC Uma Shankar
2024-02-13  6:48 ` [PATCH 25/28] drm/i915/color: Program Pre-CSC registers Uma Shankar
2024-02-13  6:48 ` [PATCH 26/28] drm/i915/xelpd: Program Plane Post CSC Registers Uma Shankar
2024-02-13  6:48 ` [PATCH 27/28] FIXME: force disable legacy plane color properties for TGL and beyond Uma Shankar
2024-02-13  6:48 ` [PATCH 28/28] drm/i915/color: Enable Plane Color Pipelines Uma Shankar
2024-02-13  8:09 ` ✗ Fi.CI.CHECKPATCH: warning for Plane Color Pipeline support for Intel platforms Patchwork
2024-02-13  8:10 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-02-13  8:28 ` ✗ Fi.CI.BAT: failure " Patchwork
2024-02-13 11:01 ` [PATCH 00/28] " Pekka Paalanen
2024-02-14  7:33   ` Shankar, Uma
2024-02-16 21:47 ` Harry Wentland
2024-02-19 10:49   ` Shankar, Uma

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