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Tue, 12 Mar 2024 04:20:47 -0500 From: Wayne Lin To: CC: , , , , , , , , , , Wayne Lin , Daniel Wheeler Subject: [PATCH 00/43] DC Patches March 18, 2024 Date: Tue, 12 Mar 2024 17:19:53 +0800 Message-ID: <20240312092036.3283319-1-Wayne.Lin@amd.com> X-Mailer: git-send-email 2.37.3 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: None (SATLEXMB03.amd.com: Wayne.Lin@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000971E8:EE_|IA0PR12MB8278:EE_ X-MS-Office365-Filtering-Correlation-Id: bb6c6183-bd17-485a-371c-08dc4275ba2c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: luUyl6VIulmMqjw7sJRppF/w/79r5mMwO3zwBj/AuncO2WzWbfpKu2RPpMT4wAFi5JErR9Ds6o3MmiFep62Wz6/essGOoxiNf1HBpfZ2OSoEuTR0mzVhf4oA9u1vuvlkwak1jYVtXnFX18wDjlnf30+CQjkTz0YlzJYoFT7qV+ovb29drgFzKyVrgMbM+2D2k+ji3bt+g8ICyGnpezvRvqUWH/eaPPFN38OXt7XxhXa/xPtA73FxIOmdPEZZKLZE98QqbRovRmOjOXZkP0NihiB5XP+NlD9o7/duMRPONtdkao+SAvJPtMw95EALFUsAYZQ+7Cr2L/1XBT85G7ZXvYQ6RDncdUsF7WmugMi+NSnCMS8l2JhSxAZPxaAuy+lv6RPCipOK8FIa5mAlw/gYNg10cqJvCuXu7kEW+luyG6i6B26pmJNqVarxsjwwREp3CMi06I8UIHdh/u5mIIGzE+IarKsUqcv6ca4+i98/iMn0QHRmkmMQfLrkJMtERTwLchFLGAzDMQlMPJ85kytgxKKp6ntbit/14b8h8i+ISLcTU3XPC7gdhw5vbEzSf5ACsgW4vapfsPWMfLKCWWoVloe9Ib7FZL3CQAfxNYRsRNJw2xgm6EJRmBphyEZ0vvxjuJCeiA6O8HfITUZqYjQ3/vcvC/HhpX6envqYroxHyj3jIhqeTr8hPO5P5EA6VPQwthBQpbI0uf1fO/BHQybRV53IaBWLtzPDSmFzDAuIElibv0dvCrFaz9aS+d/cCMrW X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(1800799015)(376005)(36860700004)(82310400014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2024 09:20:58.0272 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bb6c6183-bd17-485a-371c-08dc4275ba2c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000971E8.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB8278 X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" This DC patchset brings improvements in multiple areas. In summary, we highlight: - Clear mpc_tree in init_pipes - Program pixclk according to dcn revision - Add stream clock source to DP DTO params - Enabling urgent latency adjustment for DCN35 - To adjust dprefclk by down spread percentage - Add debug option for idle reg checks - Revert few patches which cause regression - skip forcing odm in minimal transition - Fix noise issue on HDMI AV mute - Enable fast update for DCN314 - Enable 2to1 ODM policy for DCN35 - Fix DCN31 underflow problem - Add the MALL size in the fallback function - Modify coding style/errors and remove redundant codes - Add missing registers and offset - Fix few problems for DCN35 - Fix a bug which dereferences freed memory - Enable new interface design for alternate scrambling - Enhance IPS handshake - Increase Z8 watermark times - Fix DML2 problem - Revert patch which cause regression - Fix problems for dmub idle power optimization Cc: Daniel Wheeler --- Alex Hung (2): drm/amd/display: Delete duplicated function prototypes drm/amd/display: Correct indentations and spaces Anthony Koo (1): drm/amd/display: [FW Promotion] Release 0.0.208.0 Aric Cyr (2): drm/amd/display: 3.2.276 drm/amd/display: 3.2.277 Chaitanya Dhere (1): drm/amd/display: Add TB_BORROWED_MAX definition Charlene Liu (2): drm/amd/display: fix debug key not working on dml2 drm/amd/display: change aux_init to apu version Chris Park (1): drm/amd/display: Prevent crash on bring-up Dillon Varone (3): drm/amd/display: add stream clock source to DP DTO params drm/amd/display: Program pixclk according to dcn revision drm/amd/display: Power on VPG memory unconditionally if off Gabe Teeger (1): drm/amd/display: Revert Add left edge pixel + ODM pipe split Leo Ma (1): drm/amd/display: Fix noise issue on HDMI AV mute Martin Leung (1): drm/amd/display: revert Exit idle optimizations before HDCP execution Natanel Roizenman (2): drm/amd/display: Added debug prints for zstate_support and StutterPeriod drm/amd/display: Increase Z8 watermark times. Nicholas Kazlauskas (6): drm/amd/display: Add debug option for idle reg checks drm/amd/display: Workaround register access in idle race with cursor drm/amd/display: Detect and disallow idle reallow during reentrancy drm/amd/display: Add optional optimization for IPS handshake drm/amd/display: Enable optimized handshake for DCN35 drm/amd/display: Enable reallow for idle on DCN35 Nicholas Susanto (1): drm/amd/display: Enabling urgent latency adjustment for DCN35 Ovidiu Bunea (1): drm/amd/display: Revert "Set the power_down_on_boot function pointer to null" Rodrigo Siqueira (9): drm/amd/display: Remove code duplication drm/amd/display: Remove wrong signal from vrr calculation drm/amd/display: Enable 2to1 ODM policy for DCN35 drm/amd/display: Add the MALL size in the fallback function drm/amd/display: Move define to the proper header drm/amd/display: Enable fast update for DCN314 drm/amd/display: Remove legacy code drm/amd/display: Comments adjustments drm/amd/display: Add missing registers and offset Samson Tam (1): drm/amd/display: clear mpc_tree in init_pipes Sherry Wang (1): drm/amd/display: correct hostvm flag Sung Joon Kim (1): drm/amd/display: Enable new interface design for alternate scrambling Wenjing Liu (3): drm/amd/display: skip forcing odm in minimal transition drm/amd/display: Revert Remove pixle rate limit for subvp drm/amd/display: fix a bug to dereference already freed old current state memory Xi Liu (2): drm/amd/display: increase bb clock for DCN351 drm/amd/display: Remove unnecessary hard coded DPM states Zhongwei (1): drm/amd/display: To adjust dprefclk by down spread percentage .../gpu/drm/amd/display/dc/bios/bios_parser.c | 1 + .../gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 15 ++- .../display/dc/clk_mgr/dcn314/dcn314_smu.h | 42 +++---- .../dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.h | 3 +- .../display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 50 ++++++++ drivers/gpu/drm/amd/display/dc/core/dc.c | 118 +++++++++++------- .../gpu/drm/amd/display/dc/core/dc_resource.c | 40 +----- drivers/gpu/drm/amd/display/dc/core/dc_stat.c | 2 +- drivers/gpu/drm/amd/display/dc/dc.h | 5 +- drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 44 +++++-- drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h | 1 + .../display/dc/dcn31/dcn31_dio_link_encoder.c | 2 +- .../display/dc/dcn31/dcn31_dio_link_encoder.h | 2 + .../gpu/drm/amd/display/dc/dcn31/dcn31_vpg.c | 7 +- .../display/dc/dcn35/dcn35_dio_link_encoder.c | 2 +- .../drm/amd/display/dc/dml/dcn31/dcn31_fpu.h | 1 + .../drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 1 + .../drm/amd/display/dc/dml/dcn35/dcn35_fpu.c | 12 +- .../amd/display/dc/dml/dcn351/dcn351_fpu.c | 94 +++++++++++--- .../amd/display/dc/dml2/display_mode_core.c | 2 + .../display/dc/dml2/dml2_translation_helper.c | 17 ++- .../gpu/drm/amd/display/dc/dml2/dml2_utils.c | 6 + .../amd/display/dc/hwss/dce110/dce110_hwseq.c | 3 +- .../amd/display/dc/hwss/dcn10/dcn10_hwseq.c | 16 +++ .../amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 10 -- .../amd/display/dc/hwss/dcn30/dcn30_hwseq.c | 12 +- .../amd/display/dc/hwss/dcn35/dcn35_hwseq.c | 16 +++ .../amd/display/dc/hwss/dcn35/dcn35_init.c | 2 +- .../gpu/drm/amd/display/dc/inc/core_types.h | 2 - drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h | 1 + drivers/gpu/drm/amd/display/dc/inc/resource.h | 4 - .../gpu/drm/amd/display/dc/link/link_dpms.c | 3 + .../dc/link/protocols/link_dp_training.c | 16 +-- .../link/protocols/link_edp_panel_control.c | 64 ++++++++++ .../link/protocols/link_edp_panel_control.h | 2 + .../dc/resource/dcn20/dcn20_resource.c | 7 +- .../dc/resource/dcn31/dcn31_resource.c | 5 +- .../dc/resource/dcn314/dcn314_resource.c | 21 +--- .../dc/resource/dcn316/dcn316_resource.c | 1 - .../dc/resource/dcn32/dcn32_resource.c | 3 +- .../dc/resource/dcn321/dcn321_resource.c | 4 +- .../dc/resource/dcn35/dcn35_resource.c | 5 +- .../dc/resource/dcn351/dcn351_resource.c | 3 + .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 73 ++++++++++- .../amd/display/modules/freesync/freesync.c | 2 +- .../gpu/drm/amd/display/modules/hdcp/hdcp.c | 10 -- .../drm/amd/display/modules/inc/mod_hdcp.h | 8 -- .../display/modules/info_packet/info_packet.c | 2 - .../include/asic_reg/dcn/dcn_3_2_1_offset.h | 37 +++++- .../include/asic_reg/dcn/dcn_3_2_1_sh_mask.h | 16 +++ 50 files changed, 581 insertions(+), 234 deletions(-) -- 2.37.3