All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jinjie Ruan via <qemu-devel@nongnu.org>
To: <peter.maydell@linaro.org>, <eduardo@habkost.net>,
	<marcel.apfelbaum@gmail.com>, <philmd@linaro.org>,
	<wangyanan55@huawei.com>, <richard.henderson@linaro.org>,
	<qemu-devel@nongnu.org>, <qemu-arm@nongnu.org>
Cc: <ruanjinjie@huawei.com>
Subject: [RFC PATCH v9 09/23] target/arm: Handle PSTATE.ALLINT on taking an exception
Date: Thu, 21 Mar 2024 13:07:58 +0000	[thread overview]
Message-ID: <20240321130812.2983113-10-ruanjinjie@huawei.com> (raw)
In-Reply-To: <20240321130812.2983113-1-ruanjinjie@huawei.com>

Set or clear PSTATE.ALLINT on taking an exception to ELx according to the
SCTLR_ELx.SPINTMASK bit.

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
v9:
- Not check SCTLR_NMI in arm_cpu_do_interrupt_aarch64().
v3:
- Add Reviewed-by.
---
 target/arm/helper.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/target/arm/helper.c b/target/arm/helper.c
index b57114d35d..967e833ee8 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -11730,6 +11730,14 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs)
         }
     }
 
+    if (cpu_isar_feature(aa64_nmi, cpu)) {
+        if (!(env->cp15.sctlr_el[new_el] & SCTLR_SPINTMASK)) {
+            new_mode |= PSTATE_ALLINT;
+        } else {
+            new_mode &= ~PSTATE_ALLINT;
+        }
+    }
+
     pstate_write(env, PSTATE_DAIF | new_mode);
     env->aarch64 = true;
     aarch64_restore_sp(env, new_el);
-- 
2.34.1



  parent reply	other threads:[~2024-03-21 13:11 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-21 13:07 [RFC PATCH v9 00/23] target/arm: Implement FEAT_NMI and FEAT_GICv3_NMI Jinjie Ruan via
2024-03-21 13:07 ` [RFC PATCH v9 01/23] target/arm: Handle HCR_EL2 accesses for bits introduced with FEAT_NMI Jinjie Ruan via
2024-03-21 13:07 ` [RFC PATCH v9 02/23] target/arm: Add PSTATE.ALLINT Jinjie Ruan via
2024-03-21 13:07 ` [RFC PATCH v9 03/23] target/arm: Add support for FEAT_NMI, Non-maskable Interrupt Jinjie Ruan via
2024-03-21 13:07 ` [RFC PATCH v9 04/23] target/arm: Implement ALLINT MSR (immediate) Jinjie Ruan via
2024-03-21 17:37   ` Peter Maydell
2024-03-21 13:07 ` [RFC PATCH v9 05/23] target/arm: Support MSR access to ALLINT Jinjie Ruan via
2024-03-21 13:07 ` [RFC PATCH v9 06/23] target/arm: Add support for Non-maskable Interrupt Jinjie Ruan via
2024-03-21 15:46   ` Peter Maydell
2024-03-21 18:28     ` Peter Maydell
2024-03-22  5:05       ` Jinjie Ruan via
2024-03-22 10:38         ` Peter Maydell
2024-03-22  3:56     ` Jinjie Ruan via
2024-03-22 10:56       ` Peter Maydell
2024-03-21 13:07 ` [RFC PATCH v9 07/23] target/arm: Add support for NMI in arm_phys_excp_target_el() Jinjie Ruan via
2024-03-21 13:07 ` [RFC PATCH v9 08/23] target/arm: Handle IS/FS in ISR_EL1 for NMI, VINMI and VFNMI Jinjie Ruan via
2024-03-21 13:07 ` Jinjie Ruan via [this message]
2024-03-21 13:07 ` [RFC PATCH v9 10/23] hw/arm/virt: Wire NMI and VINMI irq lines from GIC to CPU Jinjie Ruan via
2024-03-21 13:08 ` [RFC PATCH v9 11/23] hw/intc/arm_gicv3: Add external IRQ lines for NMI Jinjie Ruan via
2024-03-21 13:08 ` [RFC PATCH v9 12/23] target/arm: Handle NMI in arm_cpu_do_interrupt_aarch64() Jinjie Ruan via
2024-03-21 13:08 ` [RFC PATCH v9 13/23] hw/intc/arm_gicv3: Add irq superpriority information Jinjie Ruan via
2024-03-21 13:08 ` [RFC PATCH v9 14/23] hw/intc/arm_gicv3_redist: Implement GICR_INMIR0 Jinjie Ruan via
2024-03-21 13:08 ` [RFC PATCH v9 15/23] hw/intc/arm_gicv3: Implement GICD_INMIR Jinjie Ruan via
2024-03-21 13:08 ` [RFC PATCH v9 16/23] hw/intc: Enable FEAT_GICv3_NMI Feature Jinjie Ruan via
2024-03-21 13:08 ` [RFC PATCH v9 17/23] hw/intc/arm_gicv3: Add NMI handling CPU interface registers Jinjie Ruan via
2024-03-21 13:08 ` [RFC PATCH v9 18/23] hw/intc/arm_gicv3: Handle icv_nmiar1_read() for icc_nmiar1_read() Jinjie Ruan via
2024-03-21 13:08 ` [RFC PATCH v9 19/23] hw/intc/arm_gicv3: Implement NMI interrupt prioirty Jinjie Ruan via
2024-03-21 13:08 ` [RFC PATCH v9 20/23] hw/intc/arm_gicv3: Report the NMI interrupt in gicv3_cpuif_update() Jinjie Ruan via
2024-03-21 13:08 ` [RFC PATCH v9 21/23] hw/intc/arm_gicv3: Report the VINMI interrupt Jinjie Ruan via
2024-03-21 13:08 ` [RFC PATCH v9 22/23] target/arm: Add FEAT_NMI to max Jinjie Ruan via
2024-03-21 13:08 ` [RFC PATCH v9 23/23] hw/arm/virt: Add FEAT_GICv3_NMI feature support in virt GIC Jinjie Ruan via
2024-03-21 16:40 ` [RFC PATCH v9 00/23] target/arm: Implement FEAT_NMI and FEAT_GICv3_NMI Peter Maydell
2024-03-22 11:01 ` Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240321130812.2983113-10-ruanjinjie@huawei.com \
    --to=qemu-devel@nongnu.org \
    --cc=eduardo@habkost.net \
    --cc=marcel.apfelbaum@gmail.com \
    --cc=peter.maydell@linaro.org \
    --cc=philmd@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=richard.henderson@linaro.org \
    --cc=ruanjinjie@huawei.com \
    --cc=wangyanan55@huawei.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.