From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3D8DC129A6C; Sun, 24 Mar 2024 22:54:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711320870; cv=none; b=oIyIJCJwjP/cfMuyhXaqyCncQkwfTEIoRj+VLlXXs1jesIlWBK+CZG1pSqcaS1ZBPjjq8zqgdLzZH8osx6V8IM/PrxYkmRtYCzgxdNyjZ3JEf6I8glrdfpIhwWIbjCjr0h6HIzO8VeEBSMd2CpGVSPdx90wDQYfniBaQYHRDau4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711320870; c=relaxed/simple; bh=CppLPCfjU49vHu7bNWvje6/foOrxod7vVRZITwIj2fk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=X0xE6a51Qi+/Jyjom/PYg2meHTiuV8nnFqutsEYq4mzkuopzoOAvLdvOJAi7KRGxSNomsWqZRA8RngSxQZSpWILvaLuBA/5VxZ1JgLRJglTcY+uab1N18iZfOw+iZ82ITRFWZ6Qlrb6gGzYuTdxr/sutg4zx83/cy7ai6nwohu0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=kxd3dzmO; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="kxd3dzmO" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 63BD9C43399; Sun, 24 Mar 2024 22:54:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1711320870; bh=CppLPCfjU49vHu7bNWvje6/foOrxod7vVRZITwIj2fk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kxd3dzmO4aYtTAXZ6AA/jlDjDZP8jAnF3E3AQOZ5nsONqmR4ArCs5AQxmYmFzDKOb rhnhCS4MfLG3lyWMXPvaky4CiMCQD0gMHRxtvv3bNDMnYRp6zKjfuQ6xozkjrAKBpW mGHkdDDgDaUiufc+usGwmZQM1N1VKEXrIJYi4Fl9pGaPPmv7KqUVKDO+KYuW6S0LSf XBOYLfA2gHzSTL3mfAFB0/C1pgL8dlFe2jKNGk94rjTGdXqzUe2uE/AX+KHe6JxUUY c/r9yn/v9ozArwINGGSw451QPilyqI/2YseJ2QoVxSKxRM71ZF5clIy+20SFJgDmeP TXfeOFWFFx9UA== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Chen-Yu Tsai , AngeloGioacchino Del Regno , Linus Walleij , Sasha Levin Subject: [PATCH 6.7 434/713] pinctrl: mediatek: Drop bogus slew rate register range for MT8192 Date: Sun, 24 Mar 2024 18:42:40 -0400 Message-ID: <20240324224720.1345309-435-sashal@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240324224720.1345309-1-sashal@kernel.org> References: <20240324224720.1345309-1-sashal@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit From: Chen-Yu Tsai [ Upstream commit e15ab05a6b3ed42f2f43f8bd1a1abdbde64afecd ] The MT8192 does not support configuring pin slew rate. This is evident from both the datasheet, and the fact that the driver points the slew rate register range at the GPIO direction register range. Drop the bogus setting. Fixes: d32f38f2a8fc ("pinctrl: mediatek: Add pinctrl driver for mt8192") Signed-off-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20240131071910.3950450-2-wenst@chromium.org Signed-off-by: Linus Walleij Signed-off-by: Sasha Levin --- drivers/pinctrl/mediatek/pinctrl-mt8192.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8192.c b/drivers/pinctrl/mediatek/pinctrl-mt8192.c index dee1b3aefd36e..bf5788d6810ff 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8192.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8192.c @@ -1379,7 +1379,6 @@ static const struct mtk_pin_reg_calc mt8192_reg_cals[PINCTRL_PIN_REG_MAX] = { [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt8192_pin_dir_range), [PINCTRL_PIN_REG_DI] = MTK_RANGE(mt8192_pin_di_range), [PINCTRL_PIN_REG_DO] = MTK_RANGE(mt8192_pin_do_range), - [PINCTRL_PIN_REG_SR] = MTK_RANGE(mt8192_pin_dir_range), [PINCTRL_PIN_REG_SMT] = MTK_RANGE(mt8192_pin_smt_range), [PINCTRL_PIN_REG_IES] = MTK_RANGE(mt8192_pin_ies_range), [PINCTRL_PIN_REG_PU] = MTK_RANGE(mt8192_pin_pu_range), -- 2.43.0