From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx1.sberdevices.ru (mx2.sberdevices.ru [45.89.224.132]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EA82913C3F4; Tue, 26 Mar 2024 15:32:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.89.224.132 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711467162; cv=none; b=lETRguvAR8ZRPfHsYffVNO830/RXpVkaGVm18H7xBTiZ7mPg4fRUzqLa2N/oZc7/cQV+oPLspT+e2lBKd231WC8xxRFxgmE6P75TEW8Yje0C/ZgLTL6nstR5rvuQ+nS814zAjvFKKZdQBH5Atrq9VuS/HEcsb6dkBCdUW8S8Zvk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711467162; c=relaxed/simple; bh=RPIDCJ7DTY0xP1vLlS7UDb9i2k84O3frQMrJBdOCvTg=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=Uq1jLY3xmzK1+29V+VD8jUYJ35JwFJQTaxyNtS0OhsUsDtZxiKDaNeg0jC/kQH17fmuInG/8ZKjLhenCkDW7af6me3PRSBfSMLoFTNtbzSOo1VEXQFtG0YyaNYazahH02hOd6KMVjso1w+npqyCvzizhc/eeXscFhokebdxzM34= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=salutedevices.com; spf=pass smtp.mailfrom=salutedevices.com; dkim=pass (2048-bit key) header.d=salutedevices.com header.i=@salutedevices.com header.b=FkREBFLx; arc=none smtp.client-ip=45.89.224.132 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=salutedevices.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=salutedevices.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=salutedevices.com header.i=@salutedevices.com header.b="FkREBFLx" Received: from p-infra-ksmg-sc-msk02 (localhost [127.0.0.1]) by mx1.sberdevices.ru (Postfix) with ESMTP id 215CA120002; Tue, 26 Mar 2024 18:32:32 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.sberdevices.ru 215CA120002 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=salutedevices.com; s=mail; t=1711467152; bh=BCklwAWp3J0jXJ8BjDRutwl964F8kAWwbg9JLPowWfI=; h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type:From; b=FkREBFLxKvK8q4ODc7+umYl12wSFph/vsOtZpj7e04BLBcHJPqvJTXFaxNFGZwxOl IOrg/98geiS7Q2QadrMvfFkgSVIu1Day6J5FSs2eHHwXFhfllGEh7MvzK4lH2GN/Cy exsyq2KrcucxeqXyxYawYx704x5gks5Wut86TFlSZEREKXrsSlF/JJF9mxMICsp3qs Y/0T0/4T8WdbIVJYbqQTXbCRtz2pvmdncDSfP8Ta472ornulG2ww5TP8t+cNlmpgEL fMhFF6Oebxm6ZdwP4B1CcWrzMDo93FcbCuZZCfr6IONOn35njKgwT0zzXoUfHcxfp4 wdJjqQh4KGgbg== Received: from smtp.sberdevices.ru (p-i-exch-sc-m02.sberdevices.ru [172.16.192.103]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.sberdevices.ru (Postfix) with ESMTPS; Tue, 26 Mar 2024 18:32:31 +0300 (MSK) Received: from user-A520M-DS3H.sigma.sbrf.ru (100.64.160.123) by p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 26 Mar 2024 18:32:30 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v6 00/23] Support more Amlogic SoC families in crypto driver Date: Tue, 26 Mar 2024 18:31:56 +0300 Message-ID: <20240326153219.2915080-1-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 184425 [Mar 26 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 12 0.3.12 d1a01b14eb3fc102c904d35fe6c2622ed2d1c16e, {Tracking_uf_ne_domains}, {Tracking_from_domain_doesnt_match_to}, lore.kernel.org:7.1.1;d41d8cd98f00b204e9800998ecf8427e.com:7.1.1;gist.github.com:7.1.1;salutedevices.com:7.1.1;127.0.0.199:7.1.2;smtp.sberdevices.ru:5.0.1,7.1.1;100.64.160.123:7.1.2, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean, bases: 2024/03/26 11:48:00 X-KSMG-LinksScanning: Clean, bases: 2024/03/26 11:48:00 X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/03/26 13:11:00 #24452135 X-KSMG-AntiVirus-Status: Clean, skipped Hello! This patchset expand the funcionality of the Amlogic crypto driver by adding support for more SoC families: AXG, G12A, G12B, SM1, A1, S4. Also specify and enable crypto node in device tree for reference Amlogic devices. Tested on GXL, AXG, G12A/B, SM1, A1 and S4 devices via custom tests [1] and tcrypt module. --- Changes V1 -> V2 [2]: - Rebased over linux-next. - Adjusted device tree bindings description. - A1 and S4 dts use their own compatible, which is a G12 fallback. Changes V2 -> V3 [3]: - Fix errors in dt-bindings and device tree. - Add new field in platform data, which determines whether clock controller should be used for crypto IP. - Place back MODULE_DEVICE_TABLE. - Correct commit messages. Changes V3 -> V4 [4]: - Update dt-bindings as per Krzysztof Kozlowski comments. - Fix bisection: get rid of compiler errors in some patches. Changes V4 -> V5 [5]: - Tested on GXL board: 1. Fix panic detected by Corentin Labbe [6]. 2. Disable hasher backend for GXL: in its current realization is doesn't work. And there are no examples or docs in the vendor SDK. - Fix AES-CTR realization: legacy boards (gxl, g12, axg) requires inversion of the keyiv at keys setup stage. - A1 now uses its own compatible string. - S4 uses A1 compatible as fallback. - Code fixes based on comments Neil Atrmstrong and Rob Herring. - Style fixes (set correct indentations) Changes V5 -> V6 [7]: - Fix DMA sync warning reported by Corentin Labbe [8]. - Remove CLK input from driver. Remove clk definition and second interrput line from crypto node inside GXL dtsi. Links: - [1] https://gist.github.com/mRrvz/3fb8943a7487ab7b943ec140706995e7 - [2] https://lore.kernel.org/all/20240110201216.18016-1-avromanov@salutedevices.com/ - [3] https://lore.kernel.org/all/20240123165831.970023-1-avromanov@salutedevices.com/ - [4] https://lore.kernel.org/all/20240205155521.1795552-1-avromanov@salutedevices.com/ - [5] https://lore.kernel.org/all/20240212135108.549755-1-avromanov@salutedevices.com/ - [6] https://lore.kernel.org/all/ZcsYaPIUrBSg8iXu@Red/ - [7] https://lore.kernel.org/all/20240301132936.621238-1-avromanov@salutedevices.com/ - [8] https://lore.kernel.org/all/Zf1BAlYtiwPOG-Os@Red/ Alexey Romanov (23): drivers: crypto: meson: don't hardcode IRQ count drviers: crypto: meson: add platform data drivers: crypto: meson: remove clock input drivers: crypto: meson: add MMIO helpers drivers: crypto: meson: move get_engine_number() drivers: crypto: meson: drop status field from meson_flow drivers: crypto: meson: move algs definition and cipher API to cipher.c drivers: crypto: meson: cleanup defines drivers: crypto: meson: process more than MAXDESCS descriptors drivers: crypto: meson: avoid kzalloc in engine thread drivers: crypto: meson: introduce hasher drivers: crypto: meson: add support for AES-CTR drivers: crypto: meson: use fallback for 192-bit keys drivers: crypto: meson: add support for G12-series drivers: crypto: meson: add support for AXG-series drivers: crypto: meson: add support for A1-series dt-bindings: crypto: meson: remove clk and second interrupt line for GXL arch: arm64: dts: meson: gxl: correct crypto node definition dt-bindings: crypto: meson: support new SoC's arch: arm64: dts: meson: a1: add crypto node arch: arm64: dts: meson: s4: add crypto node arch: arm64: dts: meson: g12: add crypto node arch: arm64: dts: meson: axg: add crypto node .../bindings/crypto/amlogic,gxl-crypto.yaml | 24 +- arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 7 + arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 6 + .../boot/dts/amlogic/meson-g12-common.dtsi | 6 + arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 5 +- arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 6 + drivers/crypto/amlogic/Makefile | 2 +- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 617 ++++++++++++------ drivers/crypto/amlogic/amlogic-gxl-core.c | 292 +++++---- drivers/crypto/amlogic/amlogic-gxl-hasher.c | 460 +++++++++++++ drivers/crypto/amlogic/amlogic-gxl.h | 118 +++- 11 files changed, 1185 insertions(+), 358 deletions(-) create mode 100644 drivers/crypto/amlogic/amlogic-gxl-hasher.c -- 2.34.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3F5B0CD11DD for ; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Hello! This patchset expand the funcionality of the Amlogic crypto driver by adding support for more SoC families: AXG, G12A, G12B, SM1, A1, S4. Also specify and enable crypto node in device tree for reference Amlogic devices. Tested on GXL, AXG, G12A/B, SM1, A1 and S4 devices via custom tests [1] and tcrypt module. --- Changes V1 -> V2 [2]: - Rebased over linux-next. - Adjusted device tree bindings description. - A1 and S4 dts use their own compatible, which is a G12 fallback. Changes V2 -> V3 [3]: - Fix errors in dt-bindings and device tree. - Add new field in platform data, which determines whether clock controller should be used for crypto IP. - Place back MODULE_DEVICE_TABLE. - Correct commit messages. Changes V3 -> V4 [4]: - Update dt-bindings as per Krzysztof Kozlowski comments. - Fix bisection: get rid of compiler errors in some patches. Changes V4 -> V5 [5]: - Tested on GXL board: 1. Fix panic detected by Corentin Labbe [6]. 2. Disable hasher backend for GXL: in its current realization is doesn't work. And there are no examples or docs in the vendor SDK. - Fix AES-CTR realization: legacy boards (gxl, g12, axg) requires inversion of the keyiv at keys setup stage. - A1 now uses its own compatible string. - S4 uses A1 compatible as fallback. - Code fixes based on comments Neil Atrmstrong and Rob Herring. - Style fixes (set correct indentations) Changes V5 -> V6 [7]: - Fix DMA sync warning reported by Corentin Labbe [8]. - Remove CLK input from driver. Remove clk definition and second interrput line from crypto node inside GXL dtsi. Links: - [1] https://gist.github.com/mRrvz/3fb8943a7487ab7b943ec140706995e7 - [2] https://lore.kernel.org/all/20240110201216.18016-1-avromanov@salutedevices.com/ - [3] https://lore.kernel.org/all/20240123165831.970023-1-avromanov@salutedevices.com/ - [4] https://lore.kernel.org/all/20240205155521.1795552-1-avromanov@salutedevices.com/ - [5] https://lore.kernel.org/all/20240212135108.549755-1-avromanov@salutedevices.com/ - [6] https://lore.kernel.org/all/ZcsYaPIUrBSg8iXu@Red/ - [7] https://lore.kernel.org/all/20240301132936.621238-1-avromanov@salutedevices.com/ - [8] https://lore.kernel.org/all/Zf1BAlYtiwPOG-Os@Red/ Alexey Romanov (23): drivers: crypto: meson: don't hardcode IRQ count drviers: crypto: meson: add platform data drivers: crypto: meson: remove clock input drivers: crypto: meson: add MMIO helpers drivers: crypto: meson: move get_engine_number() drivers: crypto: meson: drop status field from meson_flow drivers: crypto: meson: move algs definition and cipher API to cipher.c drivers: crypto: meson: cleanup defines drivers: crypto: meson: process more than MAXDESCS descriptors drivers: crypto: meson: avoid kzalloc in engine thread drivers: crypto: meson: introduce hasher drivers: crypto: meson: add support for AES-CTR drivers: crypto: meson: use fallback for 192-bit keys drivers: crypto: meson: add support for G12-series drivers: crypto: meson: add support for AXG-series drivers: crypto: meson: add support for A1-series dt-bindings: crypto: meson: remove clk and second interrupt line for GXL arch: arm64: dts: meson: gxl: correct crypto node definition dt-bindings: crypto: meson: support new SoC's arch: arm64: dts: meson: a1: add crypto node arch: arm64: dts: meson: s4: add crypto node arch: arm64: dts: meson: g12: add crypto node arch: arm64: dts: meson: axg: add crypto node .../bindings/crypto/amlogic,gxl-crypto.yaml | 24 +- arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 7 + arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 6 + .../boot/dts/amlogic/meson-g12-common.dtsi | 6 + arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 5 +- arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 6 + drivers/crypto/amlogic/Makefile | 2 +- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 617 ++++++++++++------ drivers/crypto/amlogic/amlogic-gxl-core.c | 292 +++++---- drivers/crypto/amlogic/amlogic-gxl-hasher.c | 460 +++++++++++++ drivers/crypto/amlogic/amlogic-gxl.h | 118 +++- 11 files changed, 1185 insertions(+), 358 deletions(-) create mode 100644 drivers/crypto/amlogic/amlogic-gxl-hasher.c -- 2.34.1 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 93C53CD11DD for ; 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Tue, 26 Mar 2024 18:32:31 +0300 (MSK) Received: from user-A520M-DS3H.sigma.sbrf.ru (100.64.160.123) by p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 26 Mar 2024 18:32:30 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v6 00/23] Support more Amlogic SoC families in crypto driver Date: Tue, 26 Mar 2024 18:31:56 +0300 Message-ID: <20240326153219.2915080-1-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Originating-IP: [100.64.160.123] X-ClientProxiedBy: p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 184425 [Mar 26 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 12 0.3.12 d1a01b14eb3fc102c904d35fe6c2622ed2d1c16e, {Tracking_uf_ne_domains}, {Tracking_from_domain_doesnt_match_to}, lore.kernel.org:7.1.1;d41d8cd98f00b204e9800998ecf8427e.com:7.1.1;gist.github.com:7.1.1;salutedevices.com:7.1.1;127.0.0.199:7.1.2;smtp.sberdevices.ru:5.0.1,7.1.1;100.64.160.123:7.1.2, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean, bases: 2024/03/26 11:48:00 X-KSMG-LinksScanning: Clean, bases: 2024/03/26 11:48:00 X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/03/26 13:11:00 #24452135 X-KSMG-AntiVirus-Status: Clean, skipped X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240326_083238_906819_F6571428 X-CRM114-Status: GOOD ( 12.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello! This patchset expand the funcionality of the Amlogic crypto driver by adding support for more SoC families: AXG, G12A, G12B, SM1, A1, S4. Also specify and enable crypto node in device tree for reference Amlogic devices. Tested on GXL, AXG, G12A/B, SM1, A1 and S4 devices via custom tests [1] and tcrypt module. --- Changes V1 -> V2 [2]: - Rebased over linux-next. - Adjusted device tree bindings description. - A1 and S4 dts use their own compatible, which is a G12 fallback. Changes V2 -> V3 [3]: - Fix errors in dt-bindings and device tree. - Add new field in platform data, which determines whether clock controller should be used for crypto IP. - Place back MODULE_DEVICE_TABLE. - Correct commit messages. Changes V3 -> V4 [4]: - Update dt-bindings as per Krzysztof Kozlowski comments. - Fix bisection: get rid of compiler errors in some patches. Changes V4 -> V5 [5]: - Tested on GXL board: 1. Fix panic detected by Corentin Labbe [6]. 2. Disable hasher backend for GXL: in its current realization is doesn't work. And there are no examples or docs in the vendor SDK. - Fix AES-CTR realization: legacy boards (gxl, g12, axg) requires inversion of the keyiv at keys setup stage. - A1 now uses its own compatible string. - S4 uses A1 compatible as fallback. - Code fixes based on comments Neil Atrmstrong and Rob Herring. - Style fixes (set correct indentations) Changes V5 -> V6 [7]: - Fix DMA sync warning reported by Corentin Labbe [8]. - Remove CLK input from driver. Remove clk definition and second interrput line from crypto node inside GXL dtsi. Links: - [1] https://gist.github.com/mRrvz/3fb8943a7487ab7b943ec140706995e7 - [2] https://lore.kernel.org/all/20240110201216.18016-1-avromanov@salutedevices.com/ - [3] https://lore.kernel.org/all/20240123165831.970023-1-avromanov@salutedevices.com/ - [4] https://lore.kernel.org/all/20240205155521.1795552-1-avromanov@salutedevices.com/ - [5] https://lore.kernel.org/all/20240212135108.549755-1-avromanov@salutedevices.com/ - [6] https://lore.kernel.org/all/ZcsYaPIUrBSg8iXu@Red/ - [7] https://lore.kernel.org/all/20240301132936.621238-1-avromanov@salutedevices.com/ - [8] https://lore.kernel.org/all/Zf1BAlYtiwPOG-Os@Red/ Alexey Romanov (23): drivers: crypto: meson: don't hardcode IRQ count drviers: crypto: meson: add platform data drivers: crypto: meson: remove clock input drivers: crypto: meson: add MMIO helpers drivers: crypto: meson: move get_engine_number() drivers: crypto: meson: drop status field from meson_flow drivers: crypto: meson: move algs definition and cipher API to cipher.c drivers: crypto: meson: cleanup defines drivers: crypto: meson: process more than MAXDESCS descriptors drivers: crypto: meson: avoid kzalloc in engine thread drivers: crypto: meson: introduce hasher drivers: crypto: meson: add support for AES-CTR drivers: crypto: meson: use fallback for 192-bit keys drivers: crypto: meson: add support for G12-series drivers: crypto: meson: add support for AXG-series drivers: crypto: meson: add support for A1-series dt-bindings: crypto: meson: remove clk and second interrupt line for GXL arch: arm64: dts: meson: gxl: correct crypto node definition dt-bindings: crypto: meson: support new SoC's arch: arm64: dts: meson: a1: add crypto node arch: arm64: dts: meson: s4: add crypto node arch: arm64: dts: meson: g12: add crypto node arch: arm64: dts: meson: axg: add crypto node .../bindings/crypto/amlogic,gxl-crypto.yaml | 24 +- arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 7 + arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 6 + .../boot/dts/amlogic/meson-g12-common.dtsi | 6 + arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 5 +- arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 6 + drivers/crypto/amlogic/Makefile | 2 +- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 617 ++++++++++++------ drivers/crypto/amlogic/amlogic-gxl-core.c | 292 +++++---- drivers/crypto/amlogic/amlogic-gxl-hasher.c | 460 +++++++++++++ drivers/crypto/amlogic/amlogic-gxl.h | 118 +++- 11 files changed, 1185 insertions(+), 358 deletions(-) create mode 100644 drivers/crypto/amlogic/amlogic-gxl-hasher.c -- 2.34.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel