[PATCH] drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2

From: Tao Zhou <tao.zhou1@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Tao Zhou <tao.zhou1@amd.com>
Subject: [PATCH] drm/amdgpu: implement IRQ_STATE_ENABLE for SDMA v4.4.2
Date: Thu, 28 Mar 2024 18:27:46 +0800	[thread overview]
Message-ID: <20240328102746.365376-1-tao.zhou1@amd.com> (raw)

SDMA_CNTL is not set in some cases, driver configures it by itself.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
index 71c2f50530cb..d10ae4ce5ddd 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
@@ -1608,10 +1608,11 @@ static int sdma_v4_4_2_set_ecc_irq_state(struct amdgpu_device *adev,
 					  DRAM_ECC_INT_ENABLE, 0);
 		WREG32_SDMA(type, regSDMA_CNTL, sdma_cntl);
 		break;
-	/* sdma ecc interrupt is enabled by default
-	 * driver doesn't need to do anything to
-	 * enable the interrupt */
 	case AMDGPU_IRQ_STATE_ENABLE:
+		sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA_CNTL,
+					  DRAM_ECC_INT_ENABLE, 1);
+		WREG32_SDMA(type, regSDMA_CNTL, sdma_cntl);
+		break;
 	default:
 		break;
 	}
-- 
2.34.1

