All of lore.kernel.org
 help / color / mirror / Atom feed
From: Song Gao <gaosong@loongson.cn>
To: qemu-devel@nongnu.org, maobibo@loongson.cn
Cc: richard.henderson@linaro.org, peter.maydell@linaro.org,
	philmd@linaro.org, zltjiangshi@gmail.com
Subject: [PATCH v7 03/17] hw/loongarch: Add slave cpu boot_code
Date: Fri, 26 Apr 2024 17:15:37 +0800	[thread overview]
Message-ID: <20240426091551.2397867-4-gaosong@loongson.cn> (raw)
In-Reply-To: <20240426091551.2397867-1-gaosong@loongson.cn>

Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240307164835.300412-4-gaosong@loongson.cn>
---
 hw/loongarch/boot.c | 62 ++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 61 insertions(+), 1 deletion(-)

diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c
index a9522d6912..d1a8434127 100644
--- a/hw/loongarch/boot.c
+++ b/hw/loongarch/boot.c
@@ -15,6 +15,54 @@
 #include "sysemu/reset.h"
 #include "sysemu/qtest.h"
 
+static const unsigned int slave_boot_code[] = {
+                  /* Configure reset ebase.                    */
+    0x0400302c,   /* csrwr      $t0, LOONGARCH_CSR_EENTRY      */
+
+                  /* Disable interrupt.                        */
+    0x0380100c,   /* ori        $t0, $zero,0x4                 */
+    0x04000180,   /* csrxchg    $zero, $t0, LOONGARCH_CSR_CRMD */
+
+                  /* Clear mailbox.                            */
+    0x1400002d,   /* lu12i.w    $t1, 1(0x1)                    */
+    0x038081ad,   /* ori        $t1, $t1, CORE_BUF_20  */
+    0x06481da0,   /* iocsrwr.d  $zero, $t1                     */
+
+                  /* Enable IPI interrupt.                     */
+    0x1400002c,   /* lu12i.w    $t0, 1(0x1)                    */
+    0x0400118c,   /* csrxchg    $t0, $t0, LOONGARCH_CSR_ECFG   */
+    0x02fffc0c,   /* addi.d     $t0, $r0,-1(0xfff)             */
+    0x1400002d,   /* lu12i.w    $t1, 1(0x1)                    */
+    0x038011ad,   /* ori        $t1, $t1, CORE_EN_OFF          */
+    0x064819ac,   /* iocsrwr.w  $t0, $t1                       */
+    0x1400002d,   /* lu12i.w    $t1, 1(0x1)                    */
+    0x038081ad,   /* ori        $t1, $t1, CORE_BUF_20          */
+
+                  /* Wait for wakeup  <.L11>:                  */
+    0x06488000,   /* idle       0x0                            */
+    0x03400000,   /* andi       $zero, $zero, 0x0              */
+    0x064809ac,   /* iocsrrd.w  $t0, $t1                       */
+    0x43fff59f,   /* beqz       $t0, -12(0x7ffff4) # 48 <.L11> */
+
+                  /* Read and clear IPI interrupt.             */
+    0x1400002d,   /* lu12i.w    $t1, 1(0x1)                    */
+    0x064809ac,   /* iocsrrd.w  $t0, $t1                       */
+    0x1400002d,   /* lu12i.w    $t1, 1(0x1)                    */
+    0x038031ad,   /* ori        $t1, $t1, CORE_CLEAR_OFF       */
+    0x064819ac,   /* iocsrwr.w  $t0, $t1                       */
+
+                  /* Disable  IPI interrupt.                   */
+    0x1400002c,   /* lu12i.w    $t0, 1(0x1)                    */
+    0x04001180,   /* csrxchg    $zero, $t0, LOONGARCH_CSR_ECFG */
+
+                  /* Read mail buf and jump to specified entry */
+    0x1400002d,   /* lu12i.w    $t1, 1(0x1)                    */
+    0x038081ad,   /* ori        $t1, $t1, CORE_BUF_20          */
+    0x06480dac,   /* iocsrrd.d  $t0, $t1                       */
+    0x00150181,   /* move       $ra, $t0                       */
+    0x4c000020,   /* jirl       $zero, $ra,0                   */
+};
+
 static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
 {
     return addr & MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS);
@@ -126,11 +174,23 @@ static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info)
         }
     }
 
+    /* Load slave boot code at pflash0 . */
+    void *boot_code = g_malloc0(VIRT_FLASH0_SIZE);
+    memcpy(boot_code, &slave_boot_code, sizeof(slave_boot_code));
+    rom_add_blob_fixed("boot_code", boot_code, VIRT_FLASH0_SIZE, VIRT_FLASH0_BASE);
+
     CPU_FOREACH(cs) {
         lacpu = LOONGARCH_CPU(cs);
         lacpu->env.load_elf = true;
-        lacpu->env.elf_address = kernel_addr;
+        if (cs == first_cpu) {
+            lacpu->env.elf_address = kernel_addr;
+        } else {
+            lacpu->env.elf_address = VIRT_FLASH0_BASE;
+        }
+        lacpu->env.boot_info = info;
     }
+
+    g_free(boot_code);
 }
 
 void loongarch_load_kernel(MachineState *ms, struct loongarch_boot_info *info)
-- 
2.25.1



  parent reply	other threads:[~2024-04-26  9:34 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-26  9:15 [PATCH v7 00/17] Add boot LoongArch elf kernel with FDT Song Gao
2024-04-26  9:15 ` [PATCH v7 01/17] hw/loongarch: Move boot functions to boot.c Song Gao
2024-04-26  9:15 ` [PATCH v7 02/17] hw/loongarch: Add load initrd Song Gao
2024-04-26  9:15 ` Song Gao [this message]
2024-04-28  1:15   ` [PATCH v7 03/17] hw/loongarch: Add slave cpu boot_code maobibo
2024-04-28  7:15     ` gaosong
2024-04-26  9:15 ` [PATCH v7 04/17] hw/loongarch: Add init_cmdline Song Gao
2024-04-26  9:15 ` [PATCH v7 05/17] hw/loongarch: Init efi_system_table Song Gao
2024-04-26  9:15 ` [PATCH v7 06/17] hw/loongarch: Init efi_boot_memmap table Song Gao
2024-04-28  1:34   ` maobibo
2024-04-28  7:19     ` gaosong
2024-04-26  9:15 ` [PATCH v7 07/17] hw/loongarch: Init efi_initrd table Song Gao
2024-04-26  9:15 ` [PATCH v7 08/17] hw/loongarch: Init efi_fdt table Song Gao
2024-04-26  9:15 ` [PATCH v7 09/17] hw/loongarch: Fix fdt memory node wrong 'reg' Song Gao
2024-04-26  9:15 ` [PATCH v7 10/17] hw/loongarch: fdt adds cpu interrupt controller node Song Gao
2024-04-26  9:15 ` [PATCH v7 11/17] hw/loongarch: fdt adds Extend I/O Interrupt Controller Song Gao
2024-04-26  9:15 ` [PATCH v7 12/17] hw/loongarch: fdt adds pch_pic Controller Song Gao
2024-04-26  9:15 ` [PATCH v7 13/17] hw/loongarch: fdt adds pch_msi Controller Song Gao
2024-04-26  9:15 ` [PATCH v7 14/17] hw/loongarch: fdt adds pcie irq_map node Song Gao
2024-04-26  9:15 ` [PATCH v7 15/17] hw/loongarch: fdt remove unused irqchip node Song Gao
2024-04-26  9:15 ` [PATCH v7 16/17] hw/loongarch: Add cells missing from uart node Song Gao
2024-04-26  9:15 ` [PATCH v7 17/17] hw/loongarch: Add cells missing from rtc node Song Gao

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240426091551.2397867-4-gaosong@loongson.cn \
    --to=gaosong@loongson.cn \
    --cc=maobibo@loongson.cn \
    --cc=peter.maydell@linaro.org \
    --cc=philmd@linaro.org \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    --cc=zltjiangshi@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.