On 09/01/19 22:55, speck for Andi Kleen wrote:
>>>> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
>>>> index 677a3bd5fb25..77a1149e4bb3 100644
>>>> --- a/target/i386/cpu.c
>>>> +++ b/target/i386/cpu.c
>>>> @@ -1038,7 +1038,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
>>>>          .feat_names = {
>>>>              NULL, NULL, "avx512-4vnniw", "avx512-4fmaps",
>>>>              NULL, NULL, NULL, NULL,
>>>> -            NULL, NULL, NULL, NULL,
>>>> +            NULL, NULL, "mbclear", NULL,
>>>>              NULL, NULL, NULL, NULL,
>>>>              NULL, NULL, "pconfig", NULL,
>>>>              NULL, NULL, NULL, NULL,
>>
>> Are there any CPU families which will all have it (e.g. IceLake server,
>> Cascade Lake?).  Prerelease/prototype silicon does not count.
> 
> All the past ones which get the VERW microcode update
> (somewhere between Nehalem and Skylake)
> 
> Future systems which don't have/need VERW won't have it in fact

Then

Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>


Thanks!

Paolo