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Tue, 2 Feb 2021 23:00:53 -0800 Envelope-to: git@xilinx.com, michal.simek@xilinx.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, andre.przywara@arm.com, monstr@monstr.eu, linux-kernel@vger.kernel.org, robh+dt@kernel.org Received: from [172.30.17.109] (port=49736) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1l7C9k-0003fA-7s; Tue, 02 Feb 2021 23:00:52 -0800 Subject: Re: [PATCH] ARM: dts: zynq: Add address-cells property to interrupt controllers To: Rob Herring , Michal Simek CC: "linux-kernel@vger.kernel.org" , "Michal Simek" , git , Andre Przywara , , linux-arm-kernel References: <91e3405245c89f134676449cf3822285798d2ed2.1612189652.git.michal.simek@xilinx.com> From: Michal Simek Message-ID: <210b0e5a-767b-c285-62e2-23de19bd3cf1@xilinx.com> Date: Wed, 3 Feb 2021 08:00:49 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: b5e2369e-1bcb-46f1-66ea-08d8c811806d X-MS-TrafficTypeDiagnostic: SN6PR02MB4224: X-LD-Processed: 657af505-d5df-48d0-8300-c31994686c5c,ExtAddr X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:350; 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X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Feb 2021 07:01:16.5998 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b5e2369e-1bcb-46f1-66ea-08d8c811806d X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch01.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: CY1NAM02FT052.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR02MB4224 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2/1/21 6:41 PM, Rob Herring wrote: > On Mon, Feb 1, 2021 at 8:27 AM Michal Simek wrote: >> >> The commit 3eb619b2f7d8 ("scripts/dtc: Update to upstream version >> v1.6.0-11-g9d7888cbf19c") updated dtc version which also contained DTC >> commit >> "81e0919a3e21 checks: Add interrupt provider test" >> where reasons for this checking are mentioned as >> "A missing #address-cells property is less critical, but creates >> ambiguities when used in interrupt-map properties, so warn about this as >> well now." >> >> Add address-cells property to gic and gpio nodes to get rid of this warning. >> The similar change has been done for ZynqMP too. > > FYI, we're going to make this check dependent on having an > interrupt-map property. So adding these isn't necessary. Good to know. Is there going to be report if interrupt-map doesn't exist? Which can end up with reverting these changes? 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Tue, 2 Feb 2021 23:00:53 -0800 Received: from [172.30.17.109] (port=49736) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1l7C9k-0003fA-7s; Tue, 02 Feb 2021 23:00:52 -0800 Subject: Re: [PATCH] ARM: dts: zynq: Add address-cells property to interrupt controllers To: Rob Herring , Michal Simek References: <91e3405245c89f134676449cf3822285798d2ed2.1612189652.git.michal.simek@xilinx.com> From: Michal Simek Message-ID: <210b0e5a-767b-c285-62e2-23de19bd3cf1@xilinx.com> Date: Wed, 3 Feb 2021 08:00:49 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: b5e2369e-1bcb-46f1-66ea-08d8c811806d X-MS-TrafficTypeDiagnostic: SN6PR02MB4224: X-LD-Processed: 657af505-d5df-48d0-8300-c31994686c5c,ExtAddr X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:350; 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DIR:OUT; SFP:1101; X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Feb 2021 07:01:16.5998 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b5e2369e-1bcb-46f1-66ea-08d8c811806d X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.62.198]; Helo=[xsj-pvapexch01.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: CY1NAM02FT052.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR02MB4224 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210203_020119_039504_CAE2262A X-CRM114-Status: GOOD ( 14.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Michal Simek , Andre Przywara , "linux-kernel@vger.kernel.org" , git , linux-arm-kernel Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2/1/21 6:41 PM, Rob Herring wrote: > On Mon, Feb 1, 2021 at 8:27 AM Michal Simek wrote: >> >> The commit 3eb619b2f7d8 ("scripts/dtc: Update to upstream version >> v1.6.0-11-g9d7888cbf19c") updated dtc version which also contained DTC >> commit >> "81e0919a3e21 checks: Add interrupt provider test" >> where reasons for this checking are mentioned as >> "A missing #address-cells property is less critical, but creates >> ambiguities when used in interrupt-map properties, so warn about this as >> well now." >> >> Add address-cells property to gic and gpio nodes to get rid of this warning. >> The similar change has been done for ZynqMP too. > > FYI, we're going to make this check dependent on having an > interrupt-map property. So adding these isn't necessary. Good to know. Is there going to be report if interrupt-map doesn't exist? Which can end up with reverting these changes? Thanks, Michal _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel