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[80.187.96.80]) by smtp.gmail.com with ESMTPSA id q3-20020adfcd83000000b0021e437fabd8sm3034038wrj.69.2022.07.20.03.31.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 20 Jul 2022 03:31:09 -0700 (PDT) Message-ID: <213763c7-b59a-45e0-cc8a-c21a2dea5baa@redhat.com> Date: Wed, 20 Jul 2022 12:31:08 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: [PATCH v3] hw/pci/pci_bridge: ensure PCIe slots have only one slot Content-Language: en-US To: Roman Kagan , qemu-devel@nongnu.org Cc: Vladimir Sementsov-Ogievskiy , Laurent Vivier , Marcel Apfelbaum , yc-core@yandex-team.ru, Paolo Bonzini , "Michael S. Tsirkin" References: <20220720102555.874394-1-rvkagan@yandex-team.ru> From: Thomas Huth In-Reply-To: <20220720102555.874394-1-rvkagan@yandex-team.ru> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=thuth@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -6 X-Spam_score: -0.7 X-Spam_bar: / X-Spam_report: (-0.7 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_SORBS_WEB=1.5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 20/07/2022 12.25, Roman Kagan wrote: > It's possible to create non-working configurations by attaching a device > to a derivative of PCIe slot (pcie-root-port, ioh3420, etc) and > specifying a slot number other that zero, e.g.: > > -device pcie-root-port,id=s0,... \ > -device virtio-blk-pci,bus=s0,addr=4,... > > Make QEMU reject such configurations and only allow addr=0 on the > secondary bus of a PCIe slot. > > To verify this new behavior, add two basic qtests for the PCIe bridges > that may be affected by change: pcie-root-port and x3130. For the > former, two testcases are included, one positive for slot #0 and one > negative for (arbitrary) slot #4; for the latter, only a positive > testcase for slot #4 is included. > > Signed-off-by: Roman Kagan > --- > v2 -> v3: > - do not use qtest-single stuff [Thomas] Acked-by: Thomas Huth