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From: BALATON Zoltan <balaton@eik.bme.hu>
To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: clg@kaod.org, Daniel Henrique Barboza <danielhb413@gmail.com>,
	Peter Maydell <peter.maydell@linaro.org>
Subject: [PATCH 15/22] hw/intc/ppc-uic: Convert ppc-uic to a PPC4xx DCR device
Date: Sat, 13 Aug 2022 17:34:42 +0200 (CEST)	[thread overview]
Message-ID: <221c889d9c783397dce54390cf6fcc3f3b194d22.1660402839.git.balaton@eik.bme.hu> (raw)
In-Reply-To: <cover.1660402839.git.balaton@eik.bme.hu>

Make ppc-uic a subclass of ppc4xx-dcr-device which will handle the cpu
link and make it uniform with the other PPC4xx devices.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
 hw/intc/ppc-uic.c         | 26 ++++++--------------------
 hw/ppc/ppc405_uc.c        |  6 ++----
 hw/ppc/ppc440_bamboo.c    |  7 ++-----
 hw/ppc/ppc4xx_devs.c      |  1 -
 hw/ppc/sam460ex.c         | 17 +++++++----------
 hw/ppc/virtex_ml507.c     |  7 ++-----
 include/hw/intc/ppc-uic.h |  6 ++----
 7 files changed, 21 insertions(+), 49 deletions(-)

diff --git a/hw/intc/ppc-uic.c b/hw/intc/ppc-uic.c
index 60013f2dde..dcf5de5d43 100644
--- a/hw/intc/ppc-uic.c
+++ b/hw/intc/ppc-uic.c
@@ -25,11 +25,8 @@
 #include "qemu/osdep.h"
 #include "hw/intc/ppc-uic.h"
 #include "hw/irq.h"
-#include "cpu.h"
-#include "hw/ppc/ppc.h"
 #include "hw/qdev-properties.h"
 #include "migration/vmstate.h"
-#include "qapi/error.h"
 
 enum {
     DCR_UICSR  = 0x000,
@@ -105,10 +102,9 @@ static void ppcuic_trigger_irq(PPCUIC *uic)
 
 static void ppcuic_set_irq(void *opaque, int irq_num, int level)
 {
-    PPCUIC *uic;
+    PPCUIC *uic = opaque;
     uint32_t mask, sr;
 
-    uic = opaque;
     mask = 1U << (31 - irq_num);
     LOG_UIC("%s: irq %d level %d uicsr %08" PRIx32
                 " mask %08" PRIx32 " => %08" PRIx32 " %08" PRIx32 "\n",
@@ -144,10 +140,9 @@ static void ppcuic_set_irq(void *opaque, int irq_num, int level)
 
 static uint32_t dcr_read_uic(void *opaque, int dcrn)
 {
-    PPCUIC *uic;
+    PPCUIC *uic = opaque;
     uint32_t ret;
 
-    uic = opaque;
     dcrn -= uic->dcr_base;
     switch (dcrn) {
     case DCR_UICSR:
@@ -192,9 +187,8 @@ static uint32_t dcr_read_uic(void *opaque, int dcrn)
 
 static void dcr_write_uic(void *opaque, int dcrn, uint32_t val)
 {
-    PPCUIC *uic;
+    PPCUIC *uic = opaque;
 
-    uic = opaque;
     dcrn -= uic->dcr_base;
     LOG_UIC("%s: dcr %d val 0x%x\n", __func__, dcrn, val);
     switch (dcrn) {
@@ -251,19 +245,12 @@ static void ppc_uic_reset(DeviceState *dev)
 static void ppc_uic_realize(DeviceState *dev, Error **errp)
 {
     PPCUIC *uic = PPC_UIC(dev);
+    Ppc4xxDcrDeviceState *dcr = PPC4xx_DCR_DEVICE(dev);
     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
-    PowerPCCPU *cpu;
     int i;
 
-    if (!uic->cpu) {
-        /* This is a programming error in the code using this device */
-        error_setg(errp, "ppc-uic 'cpu' link property was not set");
-        return;
-    }
-
-    cpu = POWERPC_CPU(uic->cpu);
     for (i = 0; i < DCR_UICMAX; i++) {
-        ppc_dcr_register(&cpu->env, uic->dcr_base + i, uic,
+        ppc4xx_dcr_register(dcr, uic->dcr_base + i, uic,
                          &dcr_read_uic, &dcr_write_uic);
     }
 
@@ -273,7 +260,6 @@ static void ppc_uic_realize(DeviceState *dev, Error **errp)
 }
 
 static Property ppc_uic_properties[] = {
-    DEFINE_PROP_LINK("cpu", PPCUIC, cpu, TYPE_CPU, CPUState *),
     DEFINE_PROP_UINT32("dcr-base", PPCUIC, dcr_base, 0xc0),
     DEFINE_PROP_BOOL("use-vectors", PPCUIC, use_vectors, true),
     DEFINE_PROP_END_OF_LIST()
@@ -308,7 +294,7 @@ static void ppc_uic_class_init(ObjectClass *klass, void *data)
 
 static const TypeInfo ppc_uic_info = {
     .name = TYPE_PPC_UIC,
-    .parent = TYPE_SYS_BUS_DEVICE,
+    .parent = TYPE_PPC4xx_DCR_DEVICE,
     .instance_size = sizeof(PPCUIC),
     .class_init = ppc_uic_class_init,
 };
diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c
index 82830f52bf..aa3617f876 100644
--- a/hw/ppc/ppc405_uc.c
+++ b/hw/ppc/ppc405_uc.c
@@ -1149,12 +1149,10 @@ static void ppc405_soc_realize(DeviceState *dev, Error **errp)
     sysbus_mmio_map(sbd, 0, 0xef600600);
 
     /* Universal interrupt controller */
-    object_property_set_link(OBJECT(&s->uic), "cpu", OBJECT(&s->cpu),
-                             &error_fatal);
-    sbd = SYS_BUS_DEVICE(&s->uic);
-    if (!sysbus_realize(sbd, errp)) {
+    if (!ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(&s->uic), &s->cpu, errp)) {
         return;
     }
+    sbd = SYS_BUS_DEVICE(&s->uic);
     sysbus_connect_irq(sbd, PPCUIC_OUTPUT_INT,
                        qdev_get_gpio_in(DEVICE(&s->cpu), PPC40x_INPUT_INT));
     sysbus_connect_irq(sbd, PPCUIC_OUTPUT_CINT,
diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c
index 873f930c77..b14a9ef776 100644
--- a/hw/ppc/ppc440_bamboo.c
+++ b/hw/ppc/ppc440_bamboo.c
@@ -193,12 +193,9 @@ static void bamboo_init(MachineState *machine)
 
     /* interrupt controller */
     uicdev = qdev_new(TYPE_PPC_UIC);
+    ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(uicdev), cpu, &error_fatal);
+    object_unref(OBJECT(uicdev));
     uicsbd = SYS_BUS_DEVICE(uicdev);
-
-    object_property_set_link(OBJECT(uicdev), "cpu", OBJECT(cpu),
-                             &error_fatal);
-    sysbus_realize_and_unref(uicsbd, &error_fatal);
-
     sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_INT,
                        qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_INT));
     sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_CINT,
diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c
index 96941ae040..49793b56cd 100644
--- a/hw/ppc/ppc4xx_devs.c
+++ b/hw/ppc/ppc4xx_devs.c
@@ -29,7 +29,6 @@
 #include "hw/irq.h"
 #include "hw/ppc/ppc.h"
 #include "hw/ppc/ppc4xx.h"
-#include "hw/intc/ppc-uic.h"
 #include "hw/qdev-properties.h"
 #include "qemu/log.h"
 #include "exec/address-spaces.h"
diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
index c16303462d..c96de98690 100644
--- a/hw/ppc/sam460ex.c
+++ b/hw/ppc/sam460ex.c
@@ -314,7 +314,6 @@ static void sam460ex_init(MachineState *machine)
 
     /* interrupt controllers */
     for (i = 0; i < ARRAY_SIZE(uic); i++) {
-        SysBusDevice *sbd;
         /*
          * UICs 1, 2 and 3 are cascaded through UIC 0.
          * input_ints[n] is the interrupt number on UIC 0 which
@@ -326,22 +325,20 @@ static void sam460ex_init(MachineState *machine)
         const int input_ints[] = { -1, 30, 10, 16 };
 
         uic[i] = qdev_new(TYPE_PPC_UIC);
-        sbd = SYS_BUS_DEVICE(uic[i]);
-
         qdev_prop_set_uint32(uic[i], "dcr-base", 0xc0 + i * 0x10);
-        object_property_set_link(OBJECT(uic[i]), "cpu", OBJECT(cpu),
-                                 &error_fatal);
-        sysbus_realize_and_unref(sbd, &error_fatal);
+        ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(uic[i]), cpu, &error_fatal);
+        object_unref(OBJECT(uic[i]));
 
+        sbdev = SYS_BUS_DEVICE(uic[i]);
         if (i == 0) {
-            sysbus_connect_irq(sbd, PPCUIC_OUTPUT_INT,
+            sysbus_connect_irq(sbdev, PPCUIC_OUTPUT_INT,
                              qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_INT));
-            sysbus_connect_irq(sbd, PPCUIC_OUTPUT_CINT,
+            sysbus_connect_irq(sbdev, PPCUIC_OUTPUT_CINT,
                              qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_CINT));
         } else {
-            sysbus_connect_irq(sbd, PPCUIC_OUTPUT_INT,
+            sysbus_connect_irq(sbdev, PPCUIC_OUTPUT_INT,
                                qdev_get_gpio_in(uic[0], input_ints[i]));
-            sysbus_connect_irq(sbd, PPCUIC_OUTPUT_CINT,
+            sysbus_connect_irq(sbdev, PPCUIC_OUTPUT_CINT,
                                qdev_get_gpio_in(uic[0], input_ints[i] + 1));
         }
     }
diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c
index 53b126ff48..493ea0c19f 100644
--- a/hw/ppc/virtex_ml507.c
+++ b/hw/ppc/virtex_ml507.c
@@ -104,12 +104,9 @@ static PowerPCCPU *ppc440_init_xilinx(const char *cpu_type, uint32_t sysclk)
 
     /* interrupt controller */
     uicdev = qdev_new(TYPE_PPC_UIC);
+    ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(uicdev), cpu, &error_fatal);
+    object_unref(OBJECT(uicdev));
     uicsbd = SYS_BUS_DEVICE(uicdev);
-
-    object_property_set_link(OBJECT(uicdev), "cpu", OBJECT(cpu),
-                             &error_fatal);
-    sysbus_realize_and_unref(uicsbd, &error_fatal);
-
     sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_INT,
                        qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_INT));
     sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_CINT,
diff --git a/include/hw/intc/ppc-uic.h b/include/hw/intc/ppc-uic.h
index 22dd5e5ac2..4d82e9a3c6 100644
--- a/include/hw/intc/ppc-uic.h
+++ b/include/hw/intc/ppc-uic.h
@@ -25,8 +25,7 @@
 #ifndef HW_INTC_PPC_UIC_H
 #define HW_INTC_PPC_UIC_H
 
-#include "hw/sysbus.h"
-#include "qom/object.h"
+#include "hw/ppc/ppc4xx.h"
 
 #define TYPE_PPC_UIC "ppc-uic"
 OBJECT_DECLARE_SIMPLE_TYPE(PPCUIC, PPC_UIC)
@@ -56,14 +55,13 @@ enum {
 
 struct PPCUIC {
     /*< private >*/
-    SysBusDevice parent_obj;
+    Ppc4xxDcrDeviceState parent_obj;
 
     /*< public >*/
     qemu_irq output_int;
     qemu_irq output_cint;
 
     /* properties */
-    CPUState *cpu;
     uint32_t dcr_base;
     bool use_vectors;
 
-- 
2.30.4



  parent reply	other threads:[~2022-08-13 16:02 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-13 15:34 [PATCH 00/22] QOMify PPC4xx devices and minor clean ups BALATON Zoltan
2022-08-13 15:34 ` [PATCH 01/22] ppc/ppc4xx: Introduce a DCR device model BALATON Zoltan
2022-08-16  7:32   ` Cédric Le Goater
2022-08-16  9:33     ` BALATON Zoltan
2022-08-16 11:13       ` Cédric Le Goater
2022-08-13 15:34 ` [PATCH 02/22] ppc/ppc405: QOM'ify CPC BALATON Zoltan
2022-08-13 15:34 ` [PATCH 03/22] ppc/ppc405: QOM'ify GPT BALATON Zoltan
2022-08-13 15:34 ` [PATCH 04/22] ppc/ppc405: QOM'ify OCM BALATON Zoltan
2022-08-13 15:34 ` [PATCH 05/22] ppc/ppc405: QOM'ify GPIO BALATON Zoltan
2022-08-13 15:34 ` [PATCH 06/22] ppc/ppc405: QOM'ify DMA BALATON Zoltan
2022-08-13 15:34 ` [PATCH 07/22] ppc/ppc405: QOM'ify EBC BALATON Zoltan
2022-08-13 15:34 ` [PATCH 08/22] ppc/ppc405: QOM'ify OPBA BALATON Zoltan
2022-08-13 15:34 ` [PATCH 09/22] ppc/ppc405: QOM'ify POB BALATON Zoltan
2022-08-13 15:34 ` [PATCH 10/22] ppc/ppc405: QOM'ify PLB BALATON Zoltan
2022-08-13 15:34 ` [PATCH 11/22] ppc/ppc405: QOM'ify MAL BALATON Zoltan
2022-08-13 15:34 ` [PATCH 12/22] ppc4xx: Move PLB model to ppc4xx_devs.c BALATON Zoltan
2022-08-16  7:34   ` Cédric Le Goater
2022-08-16  9:35     ` BALATON Zoltan
2022-08-13 15:34 ` [PATCH 13/22] ppc4xx: Move EBC " BALATON Zoltan
2022-08-16  7:35   ` Cédric Le Goater
2022-08-13 15:34 ` [PATCH 14/22] ppc/ppc405: Use an embedded PPCUIC model in SoC state BALATON Zoltan
2022-08-13 15:34 ` BALATON Zoltan [this message]
2022-08-16  7:36   ` [PATCH 15/22] hw/intc/ppc-uic: Convert ppc-uic to a PPC4xx DCR device Cédric Le Goater
2022-08-13 15:34 ` [PATCH 16/22] ppc/ppc405: Use an explicit I2C object BALATON Zoltan
2022-08-13 15:34 ` [PATCH 17/22] ppc/ppc405: QOM'ify FPGA BALATON Zoltan
2022-08-13 15:34 ` [PATCH 18/22] ppc405: Move machine specific code to ppc405_boards.c BALATON Zoltan
2022-08-16  7:46   ` Cédric Le Goater
2022-08-13 15:34 ` [PATCH 19/22] hw/ppc/Kconfig: Remove PPC405 dependency from sam460ex BALATON Zoltan
2022-08-16  7:39   ` Cédric Le Goater
2022-08-13 15:34 ` [PATCH 20/22] hw/ppc/Kconfig: Move imply before select BALATON Zoltan
2022-08-16  7:39   ` Cédric Le Goater
2022-08-13 15:34 ` [PATCH 21/22] ppc4xx: Drop empty default cases BALATON Zoltan
2022-08-16 11:18   ` Cédric Le Goater
2022-08-16 11:59     ` BALATON Zoltan
2022-08-13 15:34 ` [PATCH 22/22] ppc/ppc4xx: Fix sdram trace events BALATON Zoltan
2022-08-16 11:19 ` [PATCH 00/22] QOMify PPC4xx devices and minor clean ups Cédric Le Goater
2022-08-17 15:13   ` BALATON Zoltan

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