From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sergei Shtylyov Date: Wed, 11 Feb 2015 22:41:45 +0000 Subject: [PATCH] ARM: shmobile: silk: add Ether DT support Message-Id: <2276051.p98cm4dRE4@wasted.cogentembedded.com> List-Id: References: <201404250239.39150.sergei.shtylyov@cogentembedded.com> In-Reply-To: <201404250239.39150.sergei.shtylyov@cogentembedded.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: linux-arm-kernel@lists.infradead.org Define the SILK board dependent part of the Ether device node. Enable DHCP and NFS root for the kernel booting. Based on the original patch by Vladimir Barinov . Signed-off-by: Sergei Shtylyov --- This patch is against the 'renesas-devel-20150211-v3.19' tag of Simon Horman's 'renesas.git' repo. It depends on just posted SILK board initial DT patch in order to apply, on just posted R8A7794 PFC DT patch in order to compile, and on R8A7794 PFC driver patch in order for the pins to be configured. arch/arm/boot/dts/r8a7794-silk.dts | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) Index: renesas/arch/arm/boot/dts/r8a7794-silk.dts =================================--- renesas.orig/arch/arm/boot/dts/r8a7794-silk.dts +++ renesas/arch/arm/boot/dts/r8a7794-silk.dts @@ -22,7 +22,7 @@ }; chosen { - bootargs = "ignore_loglevel"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; stdout-path = &scif2; }; @@ -41,6 +41,16 @@ renesas,groups = "scif2_data"; renesas,function = "scif2"; }; + + ether_pins: ether { + renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; + renesas,function = "eth"; + }; + + phy1_pins: phy1 { + renesas,groups = "intc_irq8"; + renesas,function = "intc"; + }; }; &scif2 { @@ -49,3 +59,19 @@ status = "okay"; }; + +ðer { + pinctrl-0 = <ðer_pins &phy1_pins>; + pinctrl-names = "default"; + + phy-handle = <&phy1>; + renesas,ether-link-active-low; + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + interrupt-parent = <&irqc0>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; + micrel,led-mode = <1>; + }; +}; From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sergei Shtylyov Subject: [PATCH] ARM: shmobile: silk: add Ether DT support Date: Thu, 12 Feb 2015 01:41:45 +0300 Message-ID: <2276051.p98cm4dRE4@wasted.cogentembedded.com> References: <201404250239.39150.sergei.shtylyov@cogentembedded.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7Bit Return-path: In-Reply-To: <201404250239.39150.sergei.shtylyov@cogentembedded.com> Sender: linux-sh-owner@vger.kernel.org To: horms@verge.net.au, linux-sh@vger.kernel.org, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, devicetree@vger.kernel.org Cc: magnus.damm@gmail.com, linux@arm.linux.org.uk, linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org Define the SILK board dependent part of the Ether device node. Enable DHCP and NFS root for the kernel booting. Based on the original patch by Vladimir Barinov . Signed-off-by: Sergei Shtylyov --- This patch is against the 'renesas-devel-20150211-v3.19' tag of Simon Horman's 'renesas.git' repo. It depends on just posted SILK board initial DT patch in order to apply, on just posted R8A7794 PFC DT patch in order to compile, and on R8A7794 PFC driver patch in order for the pins to be configured. arch/arm/boot/dts/r8a7794-silk.dts | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) Index: renesas/arch/arm/boot/dts/r8a7794-silk.dts =================================================================== --- renesas.orig/arch/arm/boot/dts/r8a7794-silk.dts +++ renesas/arch/arm/boot/dts/r8a7794-silk.dts @@ -22,7 +22,7 @@ }; chosen { - bootargs = "ignore_loglevel"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; stdout-path = &scif2; }; @@ -41,6 +41,16 @@ renesas,groups = "scif2_data"; renesas,function = "scif2"; }; + + ether_pins: ether { + renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; + renesas,function = "eth"; + }; + + phy1_pins: phy1 { + renesas,groups = "intc_irq8"; + renesas,function = "intc"; + }; }; &scif2 { @@ -49,3 +59,19 @@ status = "okay"; }; + +ðer { + pinctrl-0 = <ðer_pins &phy1_pins>; + pinctrl-names = "default"; + + phy-handle = <&phy1>; + renesas,ether-link-active-low; + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + interrupt-parent = <&irqc0>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; + micrel,led-mode = <1>; + }; +}; From mboxrd@z Thu Jan 1 00:00:00 1970 From: sergei.shtylyov@cogentembedded.com (Sergei Shtylyov) Date: Thu, 12 Feb 2015 01:41:45 +0300 Subject: [PATCH] ARM: shmobile: silk: add Ether DT support In-Reply-To: <201404250239.39150.sergei.shtylyov@cogentembedded.com> References: <201404250239.39150.sergei.shtylyov@cogentembedded.com> Message-ID: <2276051.p98cm4dRE4@wasted.cogentembedded.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Define the SILK board dependent part of the Ether device node. Enable DHCP and NFS root for the kernel booting. Based on the original patch by Vladimir Barinov . Signed-off-by: Sergei Shtylyov --- This patch is against the 'renesas-devel-20150211-v3.19' tag of Simon Horman's 'renesas.git' repo. It depends on just posted SILK board initial DT patch in order to apply, on just posted R8A7794 PFC DT patch in order to compile, and on R8A7794 PFC driver patch in order for the pins to be configured. arch/arm/boot/dts/r8a7794-silk.dts | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) Index: renesas/arch/arm/boot/dts/r8a7794-silk.dts =================================================================== --- renesas.orig/arch/arm/boot/dts/r8a7794-silk.dts +++ renesas/arch/arm/boot/dts/r8a7794-silk.dts @@ -22,7 +22,7 @@ }; chosen { - bootargs = "ignore_loglevel"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; stdout-path = &scif2; }; @@ -41,6 +41,16 @@ renesas,groups = "scif2_data"; renesas,function = "scif2"; }; + + ether_pins: ether { + renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; + renesas,function = "eth"; + }; + + phy1_pins: phy1 { + renesas,groups = "intc_irq8"; + renesas,function = "intc"; + }; }; &scif2 { @@ -49,3 +59,19 @@ status = "okay"; }; + +ðer { + pinctrl-0 = <ðer_pins &phy1_pins>; + pinctrl-names = "default"; + + phy-handle = <&phy1>; + renesas,ether-link-active-low; + status = "okay"; + + phy1: ethernet-phy at 1 { + reg = <1>; + interrupt-parent = <&irqc0>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; + micrel,led-mode = <1>; + }; +};