From mboxrd@z Thu Jan 1 00:00:00 1970 From: Patrice CHOTARD Date: Wed, 16 May 2018 07:59:58 +0000 Subject: [U-Boot] [PATCH] stm32f429-disco: ram: Adds stm32f429-disco fixes for HardFault at booting In-Reply-To: <1526398198-32571-1-git-send-email-radoslaw.pietrzyk@gmail.com> References: <1526398198-32571-1-git-send-email-radoslaw.pietrzyk@gmail.com> Message-ID: <228e256d-77cc-eb94-7217-42ffa5d82f84@st.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Radoslaw Some minor remarks On 05/15/2018 05:29 PM, Radoslaw Pietrzyk wrote: > - adds reading FMC swap setting from DTB to SDRAM driver > - sets FMC swap for stm32f429-disco board > - changes ram start address to 0x90000000 > > Signed-off-by: Radoslaw Pietrzyk > --- > arch/arm/dts/stm32f429-disco-u-boot.dtsi | 2 ++ > drivers/ram/stm32_sdram.c | 37 +++++++++++++++++++++----------- > include/configs/stm32f429-discovery.h | 6 +++--- > 3 files changed, 29 insertions(+), 16 deletions(-) > > diff --git a/arch/arm/dts/stm32f429-disco-u-boot.dtsi b/arch/arm/dts/stm32f429-disco-u-boot.dtsi > index 8a0f642..10e0950 100644 > --- a/arch/arm/dts/stm32f429-disco-u-boot.dtsi > +++ b/arch/arm/dts/stm32f429-disco-u-boot.dtsi > @@ -37,6 +37,8 @@ > clocks = <&rcc 0 STM32F4_AHB3_CLOCK(FMC)>; > pinctrl-0 = <&fmc_pins>; > pinctrl-names = "default"; > + st,syscfg = <&syscfg>; > + st,swp_fmc = <1>; > u-boot,dm-pre-reloc; > > /* > diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c > index dc39f33..eed3a22 100644 > --- a/drivers/ram/stm32_sdram.c > +++ b/drivers/ram/stm32_sdram.c > @@ -11,6 +11,8 @@ > #include > > #define MEM_MODE_MASK GENMASK(2, 0) > +#define SWP_FMC_OFFSET 10 > +#define SWP_FMC_MASK GENMASK(SWP_FMC_OFFSET+1, SWP_FMC_OFFSET) I noticed that these SWP_FMC bits are not described into F429 speficication but in the F469 specification. Nevertheless, it fixes the issue for F429 ... :-) > #define NOT_FOUND 0xff > > struct stm32_fmc_regs { > @@ -256,27 +258,36 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev) > struct ofnode_phandle_args args; > u32 *syscfg_base; > u32 mem_remap; > + u32 swp_fmc; > ofnode bank_node; > char *bank_name; > u8 bank = 0; > int ret; > > - mem_remap = dev_read_u32_default(dev, "st,mem_remap", NOT_FOUND); > - if (mem_remap != NOT_FOUND) { > - ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0, > + ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0, > &args); > - if (ret) { > - debug("%s: can't find syscon device (%d)\n", __func__, > - ret); > - return ret; > - } > - > + if (ret) { > + debug("%s: can't find syscon device (%d)\n", __func__, ret); replace debug() by dev_dbg() > + } else { > syscfg_base = (u32 *)ofnode_get_addr(args.node); > > - /* set memory mapping selection */ > - clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap); > - } else { > - debug("%s: cannot find st,mem_remap property\n", __func__); > + mem_remap = dev_read_u32_default(dev, "st,mem_remap", NOT_FOUND); > + if (mem_remap != NOT_FOUND) { > + /* set memory mapping selection */ > + clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap); > + } else { > + debug("%s: cannot find st,mem_remap property\n", __func__); ditto > + } > + > + swp_fmc = dev_read_u32_default(dev, "st,swp_fmc", NOT_FOUND); > + if (swp_fmc != NOT_FOUND) { > + /* set fmc swapping selection */ > + clrsetbits_le32(syscfg_base, SWP_FMC_MASK, swp_fmc << SWP_FMC_OFFSET); > + } else { > + debug("%s: cannot find st,swp_fmc property\n", __func__); ditto > + } > + > + debug("syscfg %x = %x\n", (u32)syscfg_base, *syscfg_base); ditto > } > > dev_for_each_subnode(bank_node, dev) { > diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h > index 4fd9c23..46eda1d 100644 > --- a/include/configs/stm32f429-discovery.h > +++ b/include/configs/stm32f429-discovery.h > @@ -22,10 +22,10 @@ > #define CONFIG_NR_DRAM_BANKS 1 > #define CONFIG_SYS_RAM_CS 1 > #define CONFIG_SYS_RAM_FREQ_DIV 2 > -#define CONFIG_SYS_RAM_BASE 0xD0000000 > +#define CONFIG_SYS_RAM_BASE 0x90000000 > #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE > -#define CONFIG_SYS_LOAD_ADDR 0xD0400000 > -#define CONFIG_LOADADDR 0xD0400000 > +#define CONFIG_SYS_LOAD_ADDR 0x90400000 > +#define CONFIG_LOADADDR 0x90400000 > > #define CONFIG_SYS_MAX_FLASH_SECT 12 > #define CONFIG_SYS_MAX_FLASH_BANKS 2 > Thanks Patrice