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[83.21.93.182]) by smtp.gmail.com with ESMTPSA id f16-20020a17090624d000b0096b20c968afsm9075964ejb.124.2023.05.31.09.23.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 31 May 2023 09:23:55 -0700 (PDT) Message-ID: <22b7f290-6372-4525-926e-463ab9337f29@linaro.org> Date: Wed, 31 May 2023 18:23:54 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH 1/1] hw/arm/sbsa-ref: use XHCI to replace EHCI Content-Language: pl-PL, en-GB, en-HK To: Peter Maydell , Graeme Gregory Cc: wangyuquan1236@phytium.com.cn, quic_llindhol@quicinc.com, chenbaozi@phytium.com.cn, qemu-arm@nongnu.org, qemu-devel@nongnu.org References: <20230531070229.334124-1-wangyuquan1236@phytium.com.cn> <20230531070229.334124-2-wangyuquan1236@phytium.com.cn> From: Marcin Juszkiewicz Organization: Linaro In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::62c; envelope-from=marcin.juszkiewicz@linaro.org; helo=mail-ej1-x62c.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.091, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org W dniu 31.05.2023 o 17:27, Peter Maydell pisze: > On Wed, 31 May 2023 at 15:58, Graeme Gregory wrote: >> On Wed, May 31, 2023 at 03:02:29PM +0800, wangyuquan1236@phytium.com.cn wrote: >>> From: Yuquan Wang >>> >>> The current sbsa-ref cannot use EHCI controller which is only >>> able to do 32-bit DMA, since sbsa-ref doesn't have RAM above 4GB. >>> Hence, this uses XHCI to provide a usb controller with 64-bit >>> DMA capablity instead of EHCI. >> Should this be below 4G? > It would be pretty disruptive to try to rearrange the memory > map to put RAM below 4GB at this point, though in theory it's > possible I guess. (I have a vague recollection that there was > some reason the RAM was all put above 4GB, but can't find > anything about that in my email archives. Perhaps Leif remembers?) I thought that memory starts at 40bit was to not use Cortex-A53 cpu with sbsa-ref. Nowadays it also removed Cortex-A76. > Looking back at the archives, it seems we discussed XHCI vs > EHCI when the sbsa-ref board went in, and the conclusion was > that XHCI would be better. But there wasn't a sysbus XHCI device > at that point, so we ended up committing the sbsa-ref board > with EHCI and a plan to switch to XHCI when the sysbus-xhci > device was done, which we then forgot about: > https://mail.gnu.org/archive/html/qemu-arm/2018-11/msg00638.html Moving from EHCI to XHCI on sysbus requires also firmware changes. Or we can just add "qemu-xhci" pcie card and have USB running.