All of lore.kernel.org
 help / color / mirror / Atom feed
From: Tiezhu Yang <yangtiezhu@loongson.cn>
To: WANG Xuerui <kernel@xen0n.name>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Huacai Chen <chenhc@lemote.com>,
	Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
	Xuefeng Li <lixuefeng@loongson.cn>
Subject: Re: [PATCH 2/3] MIPS: Loongson: Add hwmon support for generic CPU
Date: Sat, 9 May 2020 10:23:47 +0800	[thread overview]
Message-ID: <234fe99b-44db-46b9-76fb-6426598f4448@loongson.cn> (raw)
In-Reply-To: <f7184121-c044-6e79-78ab-dcc9103b27c2@xen0n.name>

On 05/08/2020 08:51 PM, WANG Xuerui wrote:
> On 2020/5/8 19:55, Tiezhu Yang wrote:
>
>> Add PRID_IMP_LOONGSON_64G case to enable hwmon support for Loongson
>> generic CPU such as 3A4000 and newer CPU.
>>
>> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
>> ---
>>   drivers/platform/mips/cpu_hwmon.c | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/platform/mips/cpu_hwmon.c 
>> b/drivers/platform/mips/cpu_hwmon.c
>> index add5f52..7b4bde1 100644
>> --- a/drivers/platform/mips/cpu_hwmon.c
>> +++ b/drivers/platform/mips/cpu_hwmon.c
>> @@ -43,6 +43,7 @@ int loongson3_cpu_temp(int cpu)
>>           break;
>>       case PRID_REV_LOONGSON3A_R3_0:
>>       case PRID_REV_LOONGSON3A_R3_1:
>> +    case PRID_IMP_LOONGSON_64G:
>>       default:
>>           reg = (reg & 0xffff)*731/0x4000 - 273;
>>           break;
>
> Hi,
>
> This is obviously wrong, as the value being matched is a PRID_REV. You 
> can tell from the neighboring match arms.
>
> Also, the LOONGSON_64G cores are 3A4000 and newer, that have CSR 
> support. The csr_temp_enable flag is probed in loongson_hwmon_init, 
> then the switch is simply never entered for these.

Hi Xuerui,

Thanks for your review. You are right.

I notice that this feature has been done in the commit 7507445b1993
("MIPS: Loongson: Add Loongson-3A R4 basic support"). My initial aim
is to get CPU temperature for the Loongson generic CPU when the flag
csr_temp_enable is false, but this is just the default case. So this
patch is meaningless, please ignore it.

Because patch 3/3 depends on this patch 2/3, I will remake and send v2
patch series without this patch.

Thanks,
Tiezhu Yang


  reply	other threads:[~2020-05-09  2:24 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-08 11:55 [PATCH 0/3] MIPS: Loongson: Fix some issues of cpu_hwmon.c Tiezhu Yang
2020-05-08 11:55 ` [PATCH 1/3] MIPS: Loongson: Cleanup cpu_hwmon.c Tiezhu Yang
2020-05-08 11:55 ` [PATCH 2/3] MIPS: Loongson: Add hwmon support for generic CPU Tiezhu Yang
2020-05-08 12:51   ` WANG Xuerui
2020-05-09  2:23     ` Tiezhu Yang [this message]
2020-05-08 11:55 ` [PATCH 3/3] MIPS: Loongson: Add log before power off due to high temperature Tiezhu Yang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=234fe99b-44db-46b9-76fb-6426598f4448@loongson.cn \
    --to=yangtiezhu@loongson.cn \
    --cc=chenhc@lemote.com \
    --cc=jiaxun.yang@flygoat.com \
    --cc=kernel@xen0n.name \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mips@vger.kernel.org \
    --cc=lixuefeng@loongson.cn \
    --cc=tsbogend@alpha.franken.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.