* [PATCH] arm64: tegra194: Fix Tegra194 PCIe EP compatible string
@ 2021-07-27 18:50 Vidya Sagar
2021-07-27 19:05 ` Jon Hunter
0 siblings, 1 reply; 2+ messages in thread
From: Vidya Sagar @ 2021-07-27 18:50 UTC (permalink / raw)
To: robh+dt, thierry.reding, jonathanh
Cc: devicetree, linux-tegra, linux-kernel, kthota, mmaddireddy,
vidyas, sagar.tv
The initialization sequence performed by the generic platform driver
pcie-designware-plat.c for a DWC based implementation doesn't work for
Tegra194. Tegra194 has a different initialization sequence requirement
which can only be satisfied by the Tegra194 specific platform driver
pcie-tegra194.c. So, remove the generic compatible string "snps,dw-pcie-ep"
from Tegra194's endpoint controller nodes.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index 076d5efc4c3d..2f58f3e4746b 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -2098,7 +2098,7 @@
};
pcie_ep@14160000 {
- compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";
+ compatible = "nvidia,tegra194-pcie-ep";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX4A>;
reg = <0x00 0x14160000 0x0 0x00020000>, /* appl registers (128K) */
<0x00 0x36040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
@@ -2130,7 +2130,7 @@
};
pcie_ep@14180000 {
- compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";
+ compatible = "nvidia,tegra194-pcie-ep";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8B>;
reg = <0x00 0x14180000 0x0 0x00020000>, /* appl registers (128K) */
<0x00 0x38040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
@@ -2162,7 +2162,7 @@
};
pcie_ep@141a0000 {
- compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";
+ compatible = "nvidia,tegra194-pcie-ep";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8A>;
reg = <0x00 0x141a0000 0x0 0x00020000>, /* appl registers (128K) */
<0x00 0x3a040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
--
2.17.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] arm64: tegra194: Fix Tegra194 PCIe EP compatible string
2021-07-27 18:50 [PATCH] arm64: tegra194: Fix Tegra194 PCIe EP compatible string Vidya Sagar
@ 2021-07-27 19:05 ` Jon Hunter
0 siblings, 0 replies; 2+ messages in thread
From: Jon Hunter @ 2021-07-27 19:05 UTC (permalink / raw)
To: Vidya Sagar, robh+dt, thierry.reding
Cc: devicetree, linux-tegra, linux-kernel, kthota, mmaddireddy, sagar.tv
On 27/07/2021 19:50, Vidya Sagar wrote:
> The initialization sequence performed by the generic platform driver
> pcie-designware-plat.c for a DWC based implementation doesn't work for
> Tegra194. Tegra194 has a different initialization sequence requirement
> which can only be satisfied by the Tegra194 specific platform driver
> pcie-tegra194.c. So, remove the generic compatible string "snps,dw-pcie-ep"
> from Tegra194's endpoint controller nodes.
>
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> ---
> arch/arm64/boot/dts/nvidia/tegra194.dtsi | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> index 076d5efc4c3d..2f58f3e4746b 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> @@ -2098,7 +2098,7 @@
> };
>
> pcie_ep@14160000 {
> - compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";
> + compatible = "nvidia,tegra194-pcie-ep";
> power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX4A>;
> reg = <0x00 0x14160000 0x0 0x00020000>, /* appl registers (128K) */
> <0x00 0x36040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
> @@ -2130,7 +2130,7 @@
> };
>
> pcie_ep@14180000 {
> - compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";
> + compatible = "nvidia,tegra194-pcie-ep";
> power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8B>;
> reg = <0x00 0x14180000 0x0 0x00020000>, /* appl registers (128K) */
> <0x00 0x38040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
> @@ -2162,7 +2162,7 @@
> };
>
> pcie_ep@141a0000 {
> - compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";
> + compatible = "nvidia,tegra194-pcie-ep";
> power-domains = <&bpmp TEGRA194_POWER_DOMAIN_PCIEX8A>;
> reg = <0x00 0x141a0000 0x0 0x00020000>, /* appl registers (128K) */
> <0x00 0x3a040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
>
Thanks! We should also push a patch to remove this compatible string
from the example in
Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt. For this
one ...
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Cheers!
Jon
--
nvpublic
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2021-07-27 18:50 [PATCH] arm64: tegra194: Fix Tegra194 PCIe EP compatible string Vidya Sagar
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