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* [PATCH v4 0/3] arm: bcmbca: add bcm6878 soc support
@ 2022-06-02 22:16 ` Anand Gore
  0 siblings, 0 replies; 12+ messages in thread
From: Anand Gore @ 2022-06-02 22:16 UTC (permalink / raw)
  To: Linux ARM List
  Cc: kursad.oney, florian.fainelli, tomer.yacoby, samyon.furman,
	dan.beygelman, William Zhang, joel.peshkin, Anand Gore,
	Arnd Bergmann, Broadcom internal kernel review list,
	Krzysztof Kozlowski, Olof Johansson, Rob Herring, devicetree,
	linux-kernel, soc

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The initial support includes a bare-bone dts
for dual core ARM v7  with a pl011 uart.

Changes in v4:
- Fixed subject line

Changes in v3:
- Simplify subject line

Changes in v2:
- Fix psci, GIC dts entries
- Remove extra empty lines

Anand Gore (3):
  ARM: dts: add dts files for bcmbca soc 6878
  dt-bindings: arm: add BCM6878 soc
  MAINTAINERS: add bcm6878 to bcmbca arch entry

 .../bindings/arm/bcm/brcm,bcmbca.yaml         |   7 ++
 MAINTAINERS                                   |   1 +
 arch/arm/boot/dts/Makefile                    |   3 +-
 arch/arm/boot/dts/bcm6878.dtsi                | 110 ++++++++++++++++++
 arch/arm/boot/dts/bcm96878.dts                |  30 +++++
 5 files changed, 150 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/bcm6878.dtsi
 create mode 100644 arch/arm/boot/dts/bcm96878.dts

-- 
2.25.1


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^ permalink raw reply	[flat|nested] 12+ messages in thread

* [PATCH v4 0/3] arm: bcmbca: add bcm6878 soc support
@ 2022-06-02 22:16 ` Anand Gore
  0 siblings, 0 replies; 12+ messages in thread
From: Anand Gore @ 2022-06-02 22:16 UTC (permalink / raw)
  To: Linux ARM List
  Cc: kursad.oney, florian.fainelli, tomer.yacoby, samyon.furman,
	dan.beygelman, William Zhang, joel.peshkin, Anand Gore,
	Arnd Bergmann, Broadcom internal kernel review list,
	Krzysztof Kozlowski, Olof Johansson, Rob Herring, devicetree,
	linux-kernel, soc


[-- Attachment #1.1: Type: text/plain, Size: 847 bytes --]


The initial support includes a bare-bone dts
for dual core ARM v7  with a pl011 uart.

Changes in v4:
- Fixed subject line

Changes in v3:
- Simplify subject line

Changes in v2:
- Fix psci, GIC dts entries
- Remove extra empty lines

Anand Gore (3):
  ARM: dts: add dts files for bcmbca soc 6878
  dt-bindings: arm: add BCM6878 soc
  MAINTAINERS: add bcm6878 to bcmbca arch entry

 .../bindings/arm/bcm/brcm,bcmbca.yaml         |   7 ++
 MAINTAINERS                                   |   1 +
 arch/arm/boot/dts/Makefile                    |   3 +-
 arch/arm/boot/dts/bcm6878.dtsi                | 110 ++++++++++++++++++
 arch/arm/boot/dts/bcm96878.dts                |  30 +++++
 5 files changed, 150 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/bcm6878.dtsi
 create mode 100644 arch/arm/boot/dts/bcm96878.dts

-- 
2.25.1


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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 12+ messages in thread

* [PATCH v4 1/3] ARM: dts: add dts files for bcmbca soc 6878
  2022-06-02 22:16 ` Anand Gore
@ 2022-06-02 22:16   ` Anand Gore
  -1 siblings, 0 replies; 12+ messages in thread
From: Anand Gore @ 2022-06-02 22:16 UTC (permalink / raw)
  To: Linux ARM List
  Cc: kursad.oney, florian.fainelli, tomer.yacoby, samyon.furman,
	dan.beygelman, William Zhang, joel.peshkin, Anand Gore,
	Arnd Bergmann, Broadcom internal kernel review list,
	Krzysztof Kozlowski, Olof Johansson, Rob Herring, devicetree,
	linux-kernel, soc

[-- Attachment #1: Type: text/plain, Size: 4498 bytes --]

Add dts for ARMv7 based broadband SoC BCM6878. bcm6878.dtsi is the
SoC description dts header and bcm96878.dts is a simple dts file for
Broadcom BCM96878 Reference board that only enable the UART port.

Signed-off-by: Anand Gore <anand.gore@broadcom.com>
---

(no changes since v2)

Changes in v2:
- Fix psci, GIC dts entries

 arch/arm/boot/dts/Makefile     |   3 +-
 arch/arm/boot/dts/bcm6878.dtsi | 110 +++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/bcm96878.dts |  30 +++++++++
 3 files changed, 142 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/bcm6878.dtsi
 create mode 100644 arch/arm/boot/dts/bcm96878.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index d9ac59524408..553fef458926 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -183,7 +183,8 @@ dtb-$(CONFIG_ARCH_BRCMSTB) += \
 	bcm7445-bcm97445svmb.dtb
 dtb-$(CONFIG_ARCH_BCMBCA) += \
 	bcm947622.dtb \
-	bcm963178.dtb
+	bcm963178.dtb \
+	bcm96878.dtb
 dtb-$(CONFIG_ARCH_CLPS711X) += \
 	ep7211-edb7211.dtb
 dtb-$(CONFIG_ARCH_DAVINCI) += \
diff --git a/arch/arm/boot/dts/bcm6878.dtsi b/arch/arm/boot/dts/bcm6878.dtsi
new file mode 100644
index 000000000000..a7dff596fe1e
--- /dev/null
+++ b/arch/arm/boot/dts/bcm6878.dtsi
@@ -0,0 +1,110 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+	compatible = "brcm,bcm6878", "brcm,bcmbca";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	interrupt-parent = <&gic>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		CA7_0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x0>;
+			next-level-cache = <&L2_0>;
+			enable-method = "psci";
+		};
+
+		CA7_1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x1>;
+			next-level-cache = <&L2_0>;
+			enable-method = "psci";
+		};
+		L2_0: l2-cache0 {
+			compatible = "cache";
+		};
+	};
+
+	timer {
+		compatible = "arm,armv7-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+		arm,cpu-registers-not-fw-configured;
+	};
+
+	pmu: pmu {
+		compatible = "arm,cortex-a7-pmu";
+		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&CA7_0>, <&CA7_1>;
+	};
+
+	clocks: clocks {
+		periph_clk: periph-clk {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <200000000>;
+		};
+		uart_clk: uart-clk {
+			compatible = "fixed-factor-clock";
+			#clock-cells = <0>;
+			clocks = <&periph_clk>;
+			clock-div = <4>;
+			clock-mult = <1>;
+		};
+	};
+
+	psci {
+		compatible = "arm,psci-0.2";
+		method = "smc";
+	};
+
+	axi@81000000 {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x81000000 0x8000>;
+
+		gic: interrupt-controller@1000 {
+			compatible = "arm,cortex-a7-gic";
+			#interrupt-cells = <3>;
+			interrupt-controller;
+			reg = <0x1000 0x1000>,
+				<0x2000 0x2000>,
+				<0x4000 0x2000>,
+				<0x6000 0x2000>;
+			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
+					IRQ_TYPE_LEVEL_HIGH)>;
+		};
+	};
+
+	bus@ff800000 {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0xff800000 0x800000>;
+
+		uart0: serial@12000 {
+			compatible = "arm,pl011", "arm,primecell";
+			reg = <0x12000 0x1000>;
+			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&uart_clk>, <&uart_clk>;
+			clock-names = "uartclk", "apb_pclk";
+			status = "disabled";
+		};
+	};
+};
diff --git a/arch/arm/boot/dts/bcm96878.dts b/arch/arm/boot/dts/bcm96878.dts
new file mode 100644
index 000000000000..8fbc175cb452
--- /dev/null
+++ b/arch/arm/boot/dts/bcm96878.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2019 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm6878.dtsi"
+
+/ {
+	model = "Broadcom BCM96878 Reference Board";
+	compatible = "brcm,bcm96878", "brcm,bcm6878", "brcm,bcmbca";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x08000000>;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
-- 
2.25.1


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^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v4 1/3] ARM: dts: add dts files for bcmbca soc 6878
@ 2022-06-02 22:16   ` Anand Gore
  0 siblings, 0 replies; 12+ messages in thread
From: Anand Gore @ 2022-06-02 22:16 UTC (permalink / raw)
  To: Linux ARM List
  Cc: kursad.oney, florian.fainelli, tomer.yacoby, samyon.furman,
	dan.beygelman, William Zhang, joel.peshkin, Anand Gore,
	Arnd Bergmann, Broadcom internal kernel review list,
	Krzysztof Kozlowski, Olof Johansson, Rob Herring, devicetree,
	linux-kernel, soc


[-- Attachment #1.1: Type: text/plain, Size: 4498 bytes --]

Add dts for ARMv7 based broadband SoC BCM6878. bcm6878.dtsi is the
SoC description dts header and bcm96878.dts is a simple dts file for
Broadcom BCM96878 Reference board that only enable the UART port.

Signed-off-by: Anand Gore <anand.gore@broadcom.com>
---

(no changes since v2)

Changes in v2:
- Fix psci, GIC dts entries

 arch/arm/boot/dts/Makefile     |   3 +-
 arch/arm/boot/dts/bcm6878.dtsi | 110 +++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/bcm96878.dts |  30 +++++++++
 3 files changed, 142 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/bcm6878.dtsi
 create mode 100644 arch/arm/boot/dts/bcm96878.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index d9ac59524408..553fef458926 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -183,7 +183,8 @@ dtb-$(CONFIG_ARCH_BRCMSTB) += \
 	bcm7445-bcm97445svmb.dtb
 dtb-$(CONFIG_ARCH_BCMBCA) += \
 	bcm947622.dtb \
-	bcm963178.dtb
+	bcm963178.dtb \
+	bcm96878.dtb
 dtb-$(CONFIG_ARCH_CLPS711X) += \
 	ep7211-edb7211.dtb
 dtb-$(CONFIG_ARCH_DAVINCI) += \
diff --git a/arch/arm/boot/dts/bcm6878.dtsi b/arch/arm/boot/dts/bcm6878.dtsi
new file mode 100644
index 000000000000..a7dff596fe1e
--- /dev/null
+++ b/arch/arm/boot/dts/bcm6878.dtsi
@@ -0,0 +1,110 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+	compatible = "brcm,bcm6878", "brcm,bcmbca";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	interrupt-parent = <&gic>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		CA7_0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x0>;
+			next-level-cache = <&L2_0>;
+			enable-method = "psci";
+		};
+
+		CA7_1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x1>;
+			next-level-cache = <&L2_0>;
+			enable-method = "psci";
+		};
+		L2_0: l2-cache0 {
+			compatible = "cache";
+		};
+	};
+
+	timer {
+		compatible = "arm,armv7-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+		arm,cpu-registers-not-fw-configured;
+	};
+
+	pmu: pmu {
+		compatible = "arm,cortex-a7-pmu";
+		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&CA7_0>, <&CA7_1>;
+	};
+
+	clocks: clocks {
+		periph_clk: periph-clk {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <200000000>;
+		};
+		uart_clk: uart-clk {
+			compatible = "fixed-factor-clock";
+			#clock-cells = <0>;
+			clocks = <&periph_clk>;
+			clock-div = <4>;
+			clock-mult = <1>;
+		};
+	};
+
+	psci {
+		compatible = "arm,psci-0.2";
+		method = "smc";
+	};
+
+	axi@81000000 {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x81000000 0x8000>;
+
+		gic: interrupt-controller@1000 {
+			compatible = "arm,cortex-a7-gic";
+			#interrupt-cells = <3>;
+			interrupt-controller;
+			reg = <0x1000 0x1000>,
+				<0x2000 0x2000>,
+				<0x4000 0x2000>,
+				<0x6000 0x2000>;
+			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
+					IRQ_TYPE_LEVEL_HIGH)>;
+		};
+	};
+
+	bus@ff800000 {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0xff800000 0x800000>;
+
+		uart0: serial@12000 {
+			compatible = "arm,pl011", "arm,primecell";
+			reg = <0x12000 0x1000>;
+			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&uart_clk>, <&uart_clk>;
+			clock-names = "uartclk", "apb_pclk";
+			status = "disabled";
+		};
+	};
+};
diff --git a/arch/arm/boot/dts/bcm96878.dts b/arch/arm/boot/dts/bcm96878.dts
new file mode 100644
index 000000000000..8fbc175cb452
--- /dev/null
+++ b/arch/arm/boot/dts/bcm96878.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2019 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm6878.dtsi"
+
+/ {
+	model = "Broadcom BCM96878 Reference Board";
+	compatible = "brcm,bcm96878", "brcm,bcm6878", "brcm,bcmbca";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x08000000>;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
-- 
2.25.1


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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v4 2/3] dt-bindings: arm: add BCM6878 soc
  2022-06-02 22:16 ` Anand Gore
@ 2022-06-02 22:16   ` Anand Gore
  -1 siblings, 0 replies; 12+ messages in thread
From: Anand Gore @ 2022-06-02 22:16 UTC (permalink / raw)
  To: Linux ARM List
  Cc: kursad.oney, florian.fainelli, tomer.yacoby, samyon.furman,
	dan.beygelman, William Zhang, joel.peshkin, Anand Gore,
	Krzysztof Kozlowski, Broadcom internal kernel review list,
	Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel

[-- Attachment #1: Type: text/plain, Size: 1012 bytes --]

Add BCM6878 SOC device tree description to bcmbca binding document.

Signed-off-by: Anand Gore <anand.gore@broadcom.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

---

Changes in v4:
- Fixed subject line

Changes in v3:
- Simplify subject line

Changes in v2:
- Remove extra empty lines

 Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
index a63e355ba8f9..8b8fc65e8b1b 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
@@ -43,6 +43,13 @@ properties:
           - const: brcm,bcmbca
 
 
+      - description: BCM6878 based boards
+        items:
+          - enum:
+              - brcm,bcm96878
+          - const: brcm,bcm6878
+          - const: brcm,bcmbca
+
 additionalProperties: true
 
 ...
-- 
2.25.1


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^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v4 2/3] dt-bindings: arm: add BCM6878 soc
@ 2022-06-02 22:16   ` Anand Gore
  0 siblings, 0 replies; 12+ messages in thread
From: Anand Gore @ 2022-06-02 22:16 UTC (permalink / raw)
  To: Linux ARM List
  Cc: kursad.oney, florian.fainelli, tomer.yacoby, samyon.furman,
	dan.beygelman, William Zhang, joel.peshkin, Anand Gore,
	Krzysztof Kozlowski, Broadcom internal kernel review list,
	Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel


[-- Attachment #1.1: Type: text/plain, Size: 1012 bytes --]

Add BCM6878 SOC device tree description to bcmbca binding document.

Signed-off-by: Anand Gore <anand.gore@broadcom.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

---

Changes in v4:
- Fixed subject line

Changes in v3:
- Simplify subject line

Changes in v2:
- Remove extra empty lines

 Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
index a63e355ba8f9..8b8fc65e8b1b 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
@@ -43,6 +43,13 @@ properties:
           - const: brcm,bcmbca
 
 
+      - description: BCM6878 based boards
+        items:
+          - enum:
+              - brcm,bcm96878
+          - const: brcm,bcm6878
+          - const: brcm,bcmbca
+
 additionalProperties: true
 
 ...
-- 
2.25.1


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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v4 3/3] MAINTAINERS: add bcm6878 to bcmbca arch entry
  2022-06-02 22:16 ` Anand Gore
@ 2022-06-02 22:16   ` Anand Gore
  -1 siblings, 0 replies; 12+ messages in thread
From: Anand Gore @ 2022-06-02 22:16 UTC (permalink / raw)
  To: Linux ARM List
  Cc: kursad.oney, florian.fainelli, tomer.yacoby, samyon.furman,
	dan.beygelman, William Zhang, joel.peshkin, Anand Gore,
	linux-kernel

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Add bcm6878 related files to BCMBCA ARCH maintainer list entry

Signed-off-by: Anand Gore <anand.gore@broadcom.com>
---

(no changes since v1)

 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 3ab33d0aeabf..551475841df6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3767,6 +3767,7 @@ F:	Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
 N:	bcmbca
 N:	bcm[9]?47622
 N:	bcm[9]?6858
+N:	bcm[9]?6878
 N:	bcm[9]?63178
 
 BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
-- 
2.25.1


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^ permalink raw reply related	[flat|nested] 12+ messages in thread

* [PATCH v4 3/3] MAINTAINERS: add bcm6878 to bcmbca arch entry
@ 2022-06-02 22:16   ` Anand Gore
  0 siblings, 0 replies; 12+ messages in thread
From: Anand Gore @ 2022-06-02 22:16 UTC (permalink / raw)
  To: Linux ARM List
  Cc: kursad.oney, florian.fainelli, tomer.yacoby, samyon.furman,
	dan.beygelman, William Zhang, joel.peshkin, Anand Gore,
	linux-kernel


[-- Attachment #1.1: Type: text/plain, Size: 529 bytes --]

Add bcm6878 related files to BCMBCA ARCH maintainer list entry

Signed-off-by: Anand Gore <anand.gore@broadcom.com>
---

(no changes since v1)

 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 3ab33d0aeabf..551475841df6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3767,6 +3767,7 @@ F:	Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
 N:	bcmbca
 N:	bcm[9]?47622
 N:	bcm[9]?6858
+N:	bcm[9]?6878
 N:	bcm[9]?63178
 
 BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
-- 
2.25.1


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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 12+ messages in thread

* Re: [PATCH v4 0/3] arm: bcmbca: add bcm6878 soc support
  2022-06-02 22:16 ` Anand Gore
@ 2022-06-06 21:35   ` Florian Fainelli
  -1 siblings, 0 replies; 12+ messages in thread
From: Florian Fainelli @ 2022-06-06 21:35 UTC (permalink / raw)
  To: Anand Gore, Linux ARM List
  Cc: kursad.oney, tomer.yacoby, samyon.furman, dan.beygelman,
	William Zhang, joel.peshkin, Arnd Bergmann,
	Broadcom internal kernel review list, Krzysztof Kozlowski,
	Olof Johansson, Rob Herring, devicetree, linux-kernel, soc

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On 6/3/2022 12:16 AM, Anand Gore wrote:
> 
> The initial support includes a bare-bone dts
> for dual core ARM v7  with a pl011 uart.

Patch 3 did not make it to bcm-kernel-feedback-list, can you please 
repost with the same CC list for all 3 patches plus the cover letter?

Thanks!
-- 
Florian

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^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v4 0/3] arm: bcmbca: add bcm6878 soc support
@ 2022-06-06 21:35   ` Florian Fainelli
  0 siblings, 0 replies; 12+ messages in thread
From: Florian Fainelli @ 2022-06-06 21:35 UTC (permalink / raw)
  To: Anand Gore, Linux ARM List
  Cc: kursad.oney, tomer.yacoby, samyon.furman, dan.beygelman,
	William Zhang, joel.peshkin, Arnd Bergmann,
	Broadcom internal kernel review list, Krzysztof Kozlowski,
	Olof Johansson, Rob Herring, devicetree, linux-kernel, soc


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On 6/3/2022 12:16 AM, Anand Gore wrote:
> 
> The initial support includes a bare-bone dts
> for dual core ARM v7  with a pl011 uart.

Patch 3 did not make it to bcm-kernel-feedback-list, can you please 
repost with the same CC list for all 3 patches plus the cover letter?

Thanks!
-- 
Florian

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[-- Type: application/pkcs7-signature, Size: 4221 bytes --]

[-- Attachment #2: Type: text/plain, Size: 176 bytes --]

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v4 0/3] arm: bcmbca: add bcm6878 soc support
  2022-06-02 22:16 ` Anand Gore
@ 2022-06-08  9:10   ` Florian Fainelli
  -1 siblings, 0 replies; 12+ messages in thread
From: Florian Fainelli @ 2022-06-08  9:10 UTC (permalink / raw)
  To: Anand Gore, Linux ARM List
  Cc: kursad.oney, tomer.yacoby, samyon.furman, dan.beygelman,
	William Zhang, joel.peshkin, Arnd Bergmann,
	Broadcom internal kernel review list, Krzysztof Kozlowski,
	Olof Johansson, Rob Herring, devicetree, linux-kernel, soc



On 6/3/2022 12:16 AM, Anand Gore wrote:
> 
> The initial support includes a bare-bone dts
> for dual core ARM v7  with a pl011 uart.
> 
> Changes in v4:
> - Fixed subject line
> 
> Changes in v3:
> - Simplify subject line
> 
> Changes in v2:
> - Fix psci, GIC dts entries
> - Remove extra empty lines
> 
> Anand Gore (3):
>    ARM: dts: add dts files for bcmbca soc 6878
>    dt-bindings: arm: add BCM6878 soc
>    MAINTAINERS: add bcm6878 to bcmbca arch entry

Series applied, thanks Anand!
-- 
Florian

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [PATCH v4 0/3] arm: bcmbca: add bcm6878 soc support
@ 2022-06-08  9:10   ` Florian Fainelli
  0 siblings, 0 replies; 12+ messages in thread
From: Florian Fainelli @ 2022-06-08  9:10 UTC (permalink / raw)
  To: Anand Gore, Linux ARM List
  Cc: kursad.oney, tomer.yacoby, samyon.furman, dan.beygelman,
	William Zhang, joel.peshkin, Arnd Bergmann,
	Broadcom internal kernel review list, Krzysztof Kozlowski,
	Olof Johansson, Rob Herring, devicetree, linux-kernel, soc



On 6/3/2022 12:16 AM, Anand Gore wrote:
> 
> The initial support includes a bare-bone dts
> for dual core ARM v7  with a pl011 uart.
> 
> Changes in v4:
> - Fixed subject line
> 
> Changes in v3:
> - Simplify subject line
> 
> Changes in v2:
> - Fix psci, GIC dts entries
> - Remove extra empty lines
> 
> Anand Gore (3):
>    ARM: dts: add dts files for bcmbca soc 6878
>    dt-bindings: arm: add BCM6878 soc
>    MAINTAINERS: add bcm6878 to bcmbca arch entry

Series applied, thanks Anand!
-- 
Florian

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2022-06-08  9:44 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-06-02 22:16 [PATCH v4 0/3] arm: bcmbca: add bcm6878 soc support Anand Gore
2022-06-02 22:16 ` Anand Gore
2022-06-02 22:16 ` [PATCH v4 1/3] ARM: dts: add dts files for bcmbca soc 6878 Anand Gore
2022-06-02 22:16   ` Anand Gore
2022-06-02 22:16 ` [PATCH v4 2/3] dt-bindings: arm: add BCM6878 soc Anand Gore
2022-06-02 22:16   ` Anand Gore
2022-06-02 22:16 ` [PATCH v4 3/3] MAINTAINERS: add bcm6878 to bcmbca arch entry Anand Gore
2022-06-02 22:16   ` Anand Gore
2022-06-06 21:35 ` [PATCH v4 0/3] arm: bcmbca: add bcm6878 soc support Florian Fainelli
2022-06-06 21:35   ` Florian Fainelli
2022-06-08  9:10 ` Florian Fainelli
2022-06-08  9:10   ` Florian Fainelli

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