From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2974BC433EF for ; Sun, 19 Sep 2021 17:39:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 01D5D610A8 for ; Sun, 19 Sep 2021 17:39:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230333AbhISRkb (ORCPT ); Sun, 19 Sep 2021 13:40:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57566 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229846AbhISRkZ (ORCPT ); Sun, 19 Sep 2021 13:40:25 -0400 Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [IPv6:2a00:1450:4864:20::52a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7D331C061574; Sun, 19 Sep 2021 10:38:50 -0700 (PDT) Received: by mail-ed1-x52a.google.com with SMTP id t6so51432856edi.9; Sun, 19 Sep 2021 10:38:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5M7w7zPy21obTvYguz5Oq3eJq+JEdmpFilnfj/UaVzQ=; b=LhN5noFjo+451RFhaPdyEiaEskENVgpQpw/AKZYzB8yPg8w21uDQt3oeX0bOsbP3Gr CGbr7gmvPPmOjUdEtYO1vPUHutZjRsb2Qz9ekOMJ9IuCgg1/ArcVxFt7UeAyH1dESchQ TifLDaNGbXnep5im/SQaOK2V8JBxUNsIiwi720vH6zqPKVpELwe09vto+ju7FUNMMn1N gU4slJRLmX75YPFoPC/T02fI96cx4hv6v05GkCo7tUDhkmnQftykur0LfeKdjI1NZIvs Y5++L/weCha9F5RhlJCbiweOVNPBFO5bD4F3ywAQIwH54pEdF7MqpE//ZPSgmjSdnZfZ nUXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5M7w7zPy21obTvYguz5Oq3eJq+JEdmpFilnfj/UaVzQ=; b=svHDiyI+2S58ekWXxPolli2uu6cYk8ZQlJFhYyTqloQtG6P2of8E8ZHVM+T3AVzO30 7TaDSUX4nuMpjsxxUM9WCpET55SjTcKYGRH9tZesa6IHtEbj1rCsAVlKmhMqh1ADV+ip oTCZrg2WCBRZojuKaSncTDlH0LFNJpj/UFOOrrDglQzkAedSPOBEUN4rcO0KN2U4+ptB v3iISRdqZCzc1WWinNr97AFkYS8UJNZVrbLT1osRivKURWDBurufAJT49WF2Iin+UfyE i6ZnK38FjBQqfsOTtF8wHVIieCvkW+GSTTCSWM/44DDynI8jsLlqlhP529nX4mChIxr9 c0Pw== X-Gm-Message-State: AOAM533pSIi8PQqwS54mcdo3W3RrL/pg5e96YTr6JzdGNkv5nJlSYh+P huo/iJVtb75IBBp9Qka53V4= X-Google-Smtp-Source: ABdhPJzIc1p2YHYXKQUZaJF5CsnCuPC6aHASPs/54dQ8LsS6ySMakHNHKw85yPRAQNwt3LxaJWqlFw== X-Received: by 2002:a05:6402:88e:: with SMTP id e14mr25583141edy.342.1632073128991; Sun, 19 Sep 2021 10:38:48 -0700 (PDT) Received: from archbook.localnet (84-72-105-84.dclient.hispeed.ch. [84.72.105.84]) by smtp.gmail.com with ESMTPSA id c28sm5214401ejc.102.2021.09.19.10.38.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Sep 2021 10:38:48 -0700 (PDT) From: Nicolas Frattaroli To: Mark Brown Cc: Liam Girdwood , Rob Herring , Heiko Stuebner , linux-rockchip@lists.infradead.org, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 2/4] dt-bindings: sound: add rockchip i2s-tdm binding Date: Sun, 19 Sep 2021 19:38:47 +0200 Message-ID: <2435067.tOv7cHfTnj@archbook> In-Reply-To: <20210916122549.GF5048@sirena.org.uk> References: <20210903231536.225540-1-frattaroli.nicolas@gmail.com> <42974939.Tn3hggVSkZ@archbook> <20210916122549.GF5048@sirena.org.uk> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Donnerstag, 16. September 2021 14:25:49 CEST Mark Brown wrote: > On Wed, Sep 15, 2021 at 07:06:14PM +0200, Nicolas Frattaroli wrote: > > On Mittwoch, 15. September 2021 16:10:12 CEST Mark Brown wrote: > > > Why is this not part of the normal bus format configuration? I don't > > > know what this is but it sounds a lot like I2S mode... > > > > This affects all TDM I2S modes, i.e. TDM Normal, TDM Left Justified and > > TDM > > Right Justified. > > > > Without tdm-fsync-half-frame, we purportedly get the following output in > > TDM Normal Mode (I2S Format): > > (ch0l = channel 0 left, ch0r = channel 0 right) > > > > fsync: _____________________________ > > > > \____________________________ > > > > sdi/sdo: ch0l, ch0r, ..., ch3l, ch3r, ch0l, ch0r, ... > > > > With tdm-fsync-half-frame, we purportedly get the following: > > > > fsync: _____________________________ > > > > \____________________________ > > > > sdi/sdo: ch0l, ch1l, ch2l, ch3l, ch0r, ch1r, ch2r, ch3r > > > > At least, according to the TRM. I do not have an oscilloscope to verify > > this myself, and in the following paragraphs, I will elaborate why this > > seems confusing to me. > > fsync-half-frame is just normal TDM for I2S, the default mode is how DSP > mode normally operates. I don't know that there's any pressing need to > support mix'n'match here, you could but it should be through the TDM > configuration API. > > > So to answer the question, it's not part of the bus format because it > > applies to three bus formats, and I'm completely out of my depth here and > > wouldn't define three separate bus formats based on my own speculation of > > how this works. > > It is part of the bus format really. I suspect the hardware is the kind > that only really implements DSP mode and can just fake up a LRCLK for > I2S in order to interoperate. Thank you for your explanation! Going forward, what would be a solution that is acceptable for upstream? As far as I understand, the obvious route here is to drop the rockchip,fsync- half-frame property and just always set this mode when we're using a TDM bus format. Is this correct? According to the TRM, the register bit this sets only affects TDM modes. Though since TDM is not standardised in any way from what I've read online, it is possible that there is hardware out there which expects the non-fsync-half- frame mode, but I am completely fine with only thinking about this hardware when it actually surfaces. Regards, Nicolas Frattaroli From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.7 required=3.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20896C433F5 for ; Sun, 19 Sep 2021 17:38:58 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C6778610A8 for ; Sun, 19 Sep 2021 17:38:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org C6778610A8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=FCaC1oOczqjg964FVICMBA9wEiYO9aMw8Og8HJGa+s0=; b=nhBWaY/dtSHtvo G+isx4nhRhm5r7ktEmdjqWucJouev6w1jW+8SLgxu+xz++CYS3IAqQVVKFkA6YwTAbxNE2JtrEPhB 3bNGBcnpks6LnkyvWphcXz9Y1F2c1T25jD3IkU+HvZGOu9Sfwk8avft+Ljy2T9v7TvhBZYIqW7Bej efbbazihusDFxwCajBG+0mrhPjECUUP7G2AKAokIuH/RqRdyDrQXrLYmh+MRXj2pAYDAUpSFILRDr vKUdWiIVaDXoE9xrWCsVjhc/QCBOMmoQ8e+kVjrcDmz07gOvH5Y+pm/vqRfIBesEUWN9GvZYPH0ZY Q0uLQrEDTys5kZqeOCDg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mS0mE-00HadK-8O; Sun, 19 Sep 2021 17:38:54 +0000 Received: from mail-ed1-x534.google.com ([2a00:1450:4864:20::534]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mS0mB-00HacE-W9; Sun, 19 Sep 2021 17:38:53 +0000 Received: by mail-ed1-x534.google.com with SMTP id n10so50712923eda.10; Sun, 19 Sep 2021 10:38:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5M7w7zPy21obTvYguz5Oq3eJq+JEdmpFilnfj/UaVzQ=; b=LhN5noFjo+451RFhaPdyEiaEskENVgpQpw/AKZYzB8yPg8w21uDQt3oeX0bOsbP3Gr CGbr7gmvPPmOjUdEtYO1vPUHutZjRsb2Qz9ekOMJ9IuCgg1/ArcVxFt7UeAyH1dESchQ TifLDaNGbXnep5im/SQaOK2V8JBxUNsIiwi720vH6zqPKVpELwe09vto+ju7FUNMMn1N gU4slJRLmX75YPFoPC/T02fI96cx4hv6v05GkCo7tUDhkmnQftykur0LfeKdjI1NZIvs Y5++L/weCha9F5RhlJCbiweOVNPBFO5bD4F3ywAQIwH54pEdF7MqpE//ZPSgmjSdnZfZ nUXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5M7w7zPy21obTvYguz5Oq3eJq+JEdmpFilnfj/UaVzQ=; b=tDhtjeukeuhja7QXkF1YEXrX28kzyL7GYox8I4f4OHP6LoYxmrQEvpRKFWd0RFamcg JccDdvhayL9O3QzZMVzcIYVa83iJC+ob+OEbys9L1b7JjaYdTNuh9+0D2hbmd/tokE0J q6r1gN3Aia+lds//Kb+iFEUtw56llJh2w2lAOIr3bv5idDv6KIcatAdPm2PHtS+J6kru 12iS6qojBvYVQ8IAzcACAxRvK/+Gl9gCEIXFWMppIB8nfBmtoghb/6O7Ps1ldVm1S3fN 4lE1wOyNKTCbbWJyltIB4UwFYwURI8MBBpLZ+Y8iOpCHfeOa3xolSqdklfPUtBqtyWNP sCVw== X-Gm-Message-State: AOAM532CXKB79hJj0/6TUIfWVhI1thCdzw8aNnzaIJCNhlJ3iywPQHJB BIZCEtX/eu13908ncWkBgucP1qtkNvs= X-Google-Smtp-Source: ABdhPJzIc1p2YHYXKQUZaJF5CsnCuPC6aHASPs/54dQ8LsS6ySMakHNHKw85yPRAQNwt3LxaJWqlFw== X-Received: by 2002:a05:6402:88e:: with SMTP id e14mr25583141edy.342.1632073128991; Sun, 19 Sep 2021 10:38:48 -0700 (PDT) Received: from archbook.localnet (84-72-105-84.dclient.hispeed.ch. [84.72.105.84]) by smtp.gmail.com with ESMTPSA id c28sm5214401ejc.102.2021.09.19.10.38.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Sep 2021 10:38:48 -0700 (PDT) From: Nicolas Frattaroli To: Mark Brown Cc: Liam Girdwood , Rob Herring , Heiko Stuebner , linux-rockchip@lists.infradead.org, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 2/4] dt-bindings: sound: add rockchip i2s-tdm binding Date: Sun, 19 Sep 2021 19:38:47 +0200 Message-ID: <2435067.tOv7cHfTnj@archbook> In-Reply-To: <20210916122549.GF5048@sirena.org.uk> References: <20210903231536.225540-1-frattaroli.nicolas@gmail.com> <42974939.Tn3hggVSkZ@archbook> <20210916122549.GF5048@sirena.org.uk> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210919_103852_111448_04CE3437 X-CRM114-Status: GOOD ( 29.60 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org On Donnerstag, 16. September 2021 14:25:49 CEST Mark Brown wrote: > On Wed, Sep 15, 2021 at 07:06:14PM +0200, Nicolas Frattaroli wrote: > > On Mittwoch, 15. September 2021 16:10:12 CEST Mark Brown wrote: > > > Why is this not part of the normal bus format configuration? I don't > > > know what this is but it sounds a lot like I2S mode... > > > > This affects all TDM I2S modes, i.e. TDM Normal, TDM Left Justified and > > TDM > > Right Justified. > > > > Without tdm-fsync-half-frame, we purportedly get the following output in > > TDM Normal Mode (I2S Format): > > (ch0l = channel 0 left, ch0r = channel 0 right) > > > > fsync: _____________________________ > > > > \____________________________ > > > > sdi/sdo: ch0l, ch0r, ..., ch3l, ch3r, ch0l, ch0r, ... > > > > With tdm-fsync-half-frame, we purportedly get the following: > > > > fsync: _____________________________ > > > > \____________________________ > > > > sdi/sdo: ch0l, ch1l, ch2l, ch3l, ch0r, ch1r, ch2r, ch3r > > > > At least, according to the TRM. I do not have an oscilloscope to verify > > this myself, and in the following paragraphs, I will elaborate why this > > seems confusing to me. > > fsync-half-frame is just normal TDM for I2S, the default mode is how DSP > mode normally operates. I don't know that there's any pressing need to > support mix'n'match here, you could but it should be through the TDM > configuration API. > > > So to answer the question, it's not part of the bus format because it > > applies to three bus formats, and I'm completely out of my depth here and > > wouldn't define three separate bus formats based on my own speculation of > > how this works. > > It is part of the bus format really. I suspect the hardware is the kind > that only really implements DSP mode and can just fake up a LRCLK for > I2S in order to interoperate. Thank you for your explanation! Going forward, what would be a solution that is acceptable for upstream? As far as I understand, the obvious route here is to drop the rockchip,fsync- half-frame property and just always set this mode when we're using a TDM bus format. Is this correct? According to the TRM, the register bit this sets only affects TDM modes. Though since TDM is not standardised in any way from what I've read online, it is possible that there is hardware out there which expects the non-fsync-half- frame mode, but I am completely fine with only thinking about this hardware when it actually surfaces. Regards, Nicolas Frattaroli _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.7 required=3.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65B6EC433F5 for ; Sun, 19 Sep 2021 17:39:49 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2015E611C3 for ; Sun, 19 Sep 2021 17:39:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 2015E611C3 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=alsa-project.org Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id D925C1672; Sun, 19 Sep 2021 19:38:55 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz D925C1672 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1632073185; bh=WHvQuFW9D9+C6ULoQquy/YHjWd3bxbUErWg430aG6V8=; h=From:To:Subject:Date:In-Reply-To:References:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=c8ApmoHMj2B6H4OysrJhsX0ACt+hYskLRX4uU/r8MBkK7uOgnrokzN6oiIfY5J29I yJBUuw7/xtCTk4rFepk3JGckJ+oiP8WH2VqjhY4vqhz3ANKw2XAe4/z9EJaSkrotIb jRl0s1ABH+sg4yLewegMxx3IusDHnQ7Qv9b1a3Fg= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id 52BD6F8025F; Sun, 19 Sep 2021 19:38:55 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 9E28CF80268; Sun, 19 Sep 2021 19:38:53 +0200 (CEST) Received: from mail-ed1-x531.google.com (mail-ed1-x531.google.com [IPv6:2a00:1450:4864:20::531]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 8380EF80152 for ; Sun, 19 Sep 2021 19:38:50 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 8380EF80152 Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="LhN5noFj" Received: by mail-ed1-x531.google.com with SMTP id j13so51496355edv.13 for ; Sun, 19 Sep 2021 10:38:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5M7w7zPy21obTvYguz5Oq3eJq+JEdmpFilnfj/UaVzQ=; b=LhN5noFjo+451RFhaPdyEiaEskENVgpQpw/AKZYzB8yPg8w21uDQt3oeX0bOsbP3Gr CGbr7gmvPPmOjUdEtYO1vPUHutZjRsb2Qz9ekOMJ9IuCgg1/ArcVxFt7UeAyH1dESchQ TifLDaNGbXnep5im/SQaOK2V8JBxUNsIiwi720vH6zqPKVpELwe09vto+ju7FUNMMn1N gU4slJRLmX75YPFoPC/T02fI96cx4hv6v05GkCo7tUDhkmnQftykur0LfeKdjI1NZIvs Y5++L/weCha9F5RhlJCbiweOVNPBFO5bD4F3ywAQIwH54pEdF7MqpE//ZPSgmjSdnZfZ nUXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5M7w7zPy21obTvYguz5Oq3eJq+JEdmpFilnfj/UaVzQ=; b=WowB7Q26G6vJ41z5feONiSGhPYZplUEaCeMQR0RnLgljUBwfoctHGS7RmnTSvFGesT ftV6X5GcZ3VPVV1jJWbheSAa5k95M4ImpE8oKDT3PRMslhVALjXXbHQ9F1SvKA27lX/w GZUN8OFVTV362cTXwb6j327/V3TT5euz2kXYkCayxKR9a3pnlTb6578dru9daviEehhK mbskCu+rChcJcLIDh/4u+etq+vG/nsoxwuz9FuS9kKCTMfjue7QZ3GkGjwxV3FzWkGRZ mB7XOS63oQDUWXoYwMZxIoh125wopXLm4OjKblN9uSpUhEZD78NCWN5axDPBqO8x09Hi jAzQ== X-Gm-Message-State: AOAM5314qypdZMZNTI0sQ49uQkkejwlzKlausGqiYmpRpJValgFZxsyj h7KLm2Y4gl/rdUn0UxWy0dw= X-Google-Smtp-Source: ABdhPJzIc1p2YHYXKQUZaJF5CsnCuPC6aHASPs/54dQ8LsS6ySMakHNHKw85yPRAQNwt3LxaJWqlFw== X-Received: by 2002:a05:6402:88e:: with SMTP id e14mr25583141edy.342.1632073128991; Sun, 19 Sep 2021 10:38:48 -0700 (PDT) Received: from archbook.localnet (84-72-105-84.dclient.hispeed.ch. [84.72.105.84]) by smtp.gmail.com with ESMTPSA id c28sm5214401ejc.102.2021.09.19.10.38.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Sep 2021 10:38:48 -0700 (PDT) From: Nicolas Frattaroli To: Mark Brown Subject: Re: [PATCH v4 2/4] dt-bindings: sound: add rockchip i2s-tdm binding Date: Sun, 19 Sep 2021 19:38:47 +0200 Message-ID: <2435067.tOv7cHfTnj@archbook> In-Reply-To: <20210916122549.GF5048@sirena.org.uk> References: <20210903231536.225540-1-frattaroli.nicolas@gmail.com> <42974939.Tn3hggVSkZ@archbook> <20210916122549.GF5048@sirena.org.uk> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, Heiko Stuebner , Liam Girdwood , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Rob Herring , linux-arm-kernel@lists.infradead.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" On Donnerstag, 16. September 2021 14:25:49 CEST Mark Brown wrote: > On Wed, Sep 15, 2021 at 07:06:14PM +0200, Nicolas Frattaroli wrote: > > On Mittwoch, 15. September 2021 16:10:12 CEST Mark Brown wrote: > > > Why is this not part of the normal bus format configuration? I don't > > > know what this is but it sounds a lot like I2S mode... > > > > This affects all TDM I2S modes, i.e. TDM Normal, TDM Left Justified and > > TDM > > Right Justified. > > > > Without tdm-fsync-half-frame, we purportedly get the following output in > > TDM Normal Mode (I2S Format): > > (ch0l = channel 0 left, ch0r = channel 0 right) > > > > fsync: _____________________________ > > > > \____________________________ > > > > sdi/sdo: ch0l, ch0r, ..., ch3l, ch3r, ch0l, ch0r, ... > > > > With tdm-fsync-half-frame, we purportedly get the following: > > > > fsync: _____________________________ > > > > \____________________________ > > > > sdi/sdo: ch0l, ch1l, ch2l, ch3l, ch0r, ch1r, ch2r, ch3r > > > > At least, according to the TRM. I do not have an oscilloscope to verify > > this myself, and in the following paragraphs, I will elaborate why this > > seems confusing to me. > > fsync-half-frame is just normal TDM for I2S, the default mode is how DSP > mode normally operates. I don't know that there's any pressing need to > support mix'n'match here, you could but it should be through the TDM > configuration API. > > > So to answer the question, it's not part of the bus format because it > > applies to three bus formats, and I'm completely out of my depth here and > > wouldn't define three separate bus formats based on my own speculation of > > how this works. > > It is part of the bus format really. I suspect the hardware is the kind > that only really implements DSP mode and can just fake up a LRCLK for > I2S in order to interoperate. Thank you for your explanation! Going forward, what would be a solution that is acceptable for upstream? As far as I understand, the obvious route here is to drop the rockchip,fsync- half-frame property and just always set this mode when we're using a TDM bus format. Is this correct? According to the TRM, the register bit this sets only affects TDM modes. Though since TDM is not standardised in any way from what I've read online, it is possible that there is hardware out there which expects the non-fsync-half- frame mode, but I am completely fine with only thinking about this hardware when it actually surfaces. Regards, Nicolas Frattaroli From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.7 required=3.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B969C433F5 for ; Sun, 19 Sep 2021 17:40:34 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E6776610A8 for ; Sun, 19 Sep 2021 17:40:33 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org E6776610A8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Sgn30D1EH2NBT2izYToMG/8HITOWQEP7HOaDMJovGJI=; b=MQYlWuIqkWbQb1 /gwlUK/7sDRy6e7fBWxhKXf3s+CMwS+9DW4LsnWsqsItFkPuLr6LW3VV0I6q3pBYsaJubMBbiDUDb F0l98dijoyTSOhV8k1rlPfIF7LAmB38RUWRbG7euMgwT8WFo09Pca7caGHm/R+Q0yChtn07WbTw0D i3mxV5TWyqJky9CwaIZTIGGiqSSG4saEgoZhxVNH1I+bAg33yg/ZjNJvSrkeSiqOltB0b5W1a34Dn xY9q/jCbcP/LuOAQjtEmn96Rq+dsuc6hAMqJ6pr06lNMUDuQBBU613YBdyC8ktZVVNsbn4wh4nZfC +agNYzOiujW5S0vYpybw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mS0mH-00HadY-11; Sun, 19 Sep 2021 17:38:57 +0000 Received: from mail-ed1-x534.google.com ([2a00:1450:4864:20::534]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mS0mB-00HacE-W9; Sun, 19 Sep 2021 17:38:53 +0000 Received: by mail-ed1-x534.google.com with SMTP id n10so50712923eda.10; Sun, 19 Sep 2021 10:38:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5M7w7zPy21obTvYguz5Oq3eJq+JEdmpFilnfj/UaVzQ=; b=LhN5noFjo+451RFhaPdyEiaEskENVgpQpw/AKZYzB8yPg8w21uDQt3oeX0bOsbP3Gr CGbr7gmvPPmOjUdEtYO1vPUHutZjRsb2Qz9ekOMJ9IuCgg1/ArcVxFt7UeAyH1dESchQ TifLDaNGbXnep5im/SQaOK2V8JBxUNsIiwi720vH6zqPKVpELwe09vto+ju7FUNMMn1N gU4slJRLmX75YPFoPC/T02fI96cx4hv6v05GkCo7tUDhkmnQftykur0LfeKdjI1NZIvs Y5++L/weCha9F5RhlJCbiweOVNPBFO5bD4F3ywAQIwH54pEdF7MqpE//ZPSgmjSdnZfZ nUXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5M7w7zPy21obTvYguz5Oq3eJq+JEdmpFilnfj/UaVzQ=; b=tDhtjeukeuhja7QXkF1YEXrX28kzyL7GYox8I4f4OHP6LoYxmrQEvpRKFWd0RFamcg JccDdvhayL9O3QzZMVzcIYVa83iJC+ob+OEbys9L1b7JjaYdTNuh9+0D2hbmd/tokE0J q6r1gN3Aia+lds//Kb+iFEUtw56llJh2w2lAOIr3bv5idDv6KIcatAdPm2PHtS+J6kru 12iS6qojBvYVQ8IAzcACAxRvK/+Gl9gCEIXFWMppIB8nfBmtoghb/6O7Ps1ldVm1S3fN 4lE1wOyNKTCbbWJyltIB4UwFYwURI8MBBpLZ+Y8iOpCHfeOa3xolSqdklfPUtBqtyWNP sCVw== X-Gm-Message-State: AOAM532CXKB79hJj0/6TUIfWVhI1thCdzw8aNnzaIJCNhlJ3iywPQHJB BIZCEtX/eu13908ncWkBgucP1qtkNvs= X-Google-Smtp-Source: ABdhPJzIc1p2YHYXKQUZaJF5CsnCuPC6aHASPs/54dQ8LsS6ySMakHNHKw85yPRAQNwt3LxaJWqlFw== X-Received: by 2002:a05:6402:88e:: with SMTP id e14mr25583141edy.342.1632073128991; Sun, 19 Sep 2021 10:38:48 -0700 (PDT) Received: from archbook.localnet (84-72-105-84.dclient.hispeed.ch. [84.72.105.84]) by smtp.gmail.com with ESMTPSA id c28sm5214401ejc.102.2021.09.19.10.38.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Sep 2021 10:38:48 -0700 (PDT) From: Nicolas Frattaroli To: Mark Brown Cc: Liam Girdwood , Rob Herring , Heiko Stuebner , linux-rockchip@lists.infradead.org, alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 2/4] dt-bindings: sound: add rockchip i2s-tdm binding Date: Sun, 19 Sep 2021 19:38:47 +0200 Message-ID: <2435067.tOv7cHfTnj@archbook> In-Reply-To: <20210916122549.GF5048@sirena.org.uk> References: <20210903231536.225540-1-frattaroli.nicolas@gmail.com> <42974939.Tn3hggVSkZ@archbook> <20210916122549.GF5048@sirena.org.uk> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210919_103852_111448_04CE3437 X-CRM114-Status: GOOD ( 29.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Donnerstag, 16. September 2021 14:25:49 CEST Mark Brown wrote: > On Wed, Sep 15, 2021 at 07:06:14PM +0200, Nicolas Frattaroli wrote: > > On Mittwoch, 15. September 2021 16:10:12 CEST Mark Brown wrote: > > > Why is this not part of the normal bus format configuration? I don't > > > know what this is but it sounds a lot like I2S mode... > > > > This affects all TDM I2S modes, i.e. TDM Normal, TDM Left Justified and > > TDM > > Right Justified. > > > > Without tdm-fsync-half-frame, we purportedly get the following output in > > TDM Normal Mode (I2S Format): > > (ch0l = channel 0 left, ch0r = channel 0 right) > > > > fsync: _____________________________ > > > > \____________________________ > > > > sdi/sdo: ch0l, ch0r, ..., ch3l, ch3r, ch0l, ch0r, ... > > > > With tdm-fsync-half-frame, we purportedly get the following: > > > > fsync: _____________________________ > > > > \____________________________ > > > > sdi/sdo: ch0l, ch1l, ch2l, ch3l, ch0r, ch1r, ch2r, ch3r > > > > At least, according to the TRM. I do not have an oscilloscope to verify > > this myself, and in the following paragraphs, I will elaborate why this > > seems confusing to me. > > fsync-half-frame is just normal TDM for I2S, the default mode is how DSP > mode normally operates. I don't know that there's any pressing need to > support mix'n'match here, you could but it should be through the TDM > configuration API. > > > So to answer the question, it's not part of the bus format because it > > applies to three bus formats, and I'm completely out of my depth here and > > wouldn't define three separate bus formats based on my own speculation of > > how this works. > > It is part of the bus format really. I suspect the hardware is the kind > that only really implements DSP mode and can just fake up a LRCLK for > I2S in order to interoperate. Thank you for your explanation! Going forward, what would be a solution that is acceptable for upstream? As far as I understand, the obvious route here is to drop the rockchip,fsync- half-frame property and just always set this mode when we're using a TDM bus format. Is this correct? According to the TRM, the register bit this sets only affects TDM modes. Though since TDM is not standardised in any way from what I've read online, it is possible that there is hardware out there which expects the non-fsync-half- frame mode, but I am completely fine with only thinking about this hardware when it actually surfaces. Regards, Nicolas Frattaroli _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel