From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 40207C433EF for ; Mon, 17 Jan 2022 12:15:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:Cc:To:Subject:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=8YiwkvVfn7Le1j37LE4S3AoYMp9d1cpsly2TTeDuhUU=; b=L/5dIdtqOcw+frcFlZDklbrEPC gsOx+UG29XBU6yx71Y/wpzrKr5zfvU7WasAS+BYGh8ua0xw/oynp+nynZXBMctdwubgYeIDCBnA0H RTxse6VLMgwglGWlmH8xhk6lxeKQnuMW4TJdlHTlLry8Yt06eKvQ3LvdS6AYqZ+Ac4/zpZjuHBqCI e0WqcsHzFpQ1Nb1zzbofe4F0hxporoV7fmJ7Phyb2CnZNZlZ+vkLBQcFW/LiOtQMwkIkfxXLnulp8 2nx5SrTdL1GivMfKDRa2eDTYcFVL4iG7pBWU5pRGPRLMgKYNWCHB8wMPwuGyTuutLv2azQy/llrq1 ygS6N4kw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n9QtN-00EpYn-Oy; Mon, 17 Jan 2022 12:13:45 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1n9QrN-00EoYm-WA for linux-arm-kernel@lists.infradead.org; Mon, 17 Jan 2022 12:11:43 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8A9F4101E; Mon, 17 Jan 2022 04:11:38 -0800 (PST) Received: from [10.57.35.210] (unknown [10.57.35.210]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 824423F73D; Mon, 17 Jan 2022 04:11:37 -0800 (PST) Subject: Re: [bootwrapper PATCH v2 02/13] Add bit-field macros To: Mark Rutland , linux-arm-kernel@lists.infradead.org Cc: andre.przywara@arm.com, Jaxson.Han@arm.com, robin.murphy@arm.com, vladimir.murzin@arm.com, Wei.Chen@arm.com References: <20220114105653.3003399-1-mark.rutland@arm.com> <20220114105653.3003399-3-mark.rutland@arm.com> From: Steven Price Message-ID: <253b79f8-9c8b-4d8d-4f60-2ac74d763c73@arm.com> Date: Mon, 17 Jan 2022 12:11:36 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0 MIME-Version: 1.0 In-Reply-To: <20220114105653.3003399-3-mark.rutland@arm.com> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220117_041142_240519_43A7A30A X-CRM114-Status: GOOD ( 26.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 14/01/2022 10:56, Mark Rutland wrote: > Arm architectural documentation typically defines bit-fields as > `[msb,lsb]` and single-bit fields as `[bit]`. For clarity it would be > helpful if we could define fields in the same way. > > Add helpers so that we can do so, along with helper to extract/insert > bit-field values. > > There should be no functional change as a result of this patch. > > Signed-off-by: Mark Rutland > --- > include/bits.h | 79 ++++++++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 79 insertions(+) > create mode 100644 include/bits.h > > diff --git a/include/bits.h b/include/bits.h > new file mode 100644 > index 0000000..0bf2c67 > --- /dev/null > +++ b/include/bits.h > @@ -0,0 +1,79 @@ > +/* > + * include/bits.h - helpers for bit-field definitions. > + * > + * Copyright (C) 2021 ARM Limited. All rights reserved. > + * > + * Use of this source code is governed by a BSD-style license that can be > + * found in the LICENSE.txt file. > + */ > +#ifndef __BITS_H > +#define __BITS_H > + > +#ifdef __ASSEMBLY__ > +#define UL(x) x > +#define ULL(x) x > +#else > +#define UL(x) x##UL > +#define ULL(x) x##ULL > +#endif > + > +/* > + * Define a contiguous mask of bits with `msb` as the most significant bit and > + * `lsb` as the least significant bit. The `msb` value must be greater than or > + * equal to `lsb`. > + * > + * For example: > + * - BITS(63, 63) is 0x8000000000000000 > + * - BITS(63, 0) is 0xFFFFFFFFFFFFFFFF > + * - BITS(0, 0) is 0x0000000000000001 > + * - BITS(49, 17) is 0x0001FFFFFFFE0000 > + */ > +#define BITS(msb, lsb) \ > + ((~ULL(0) >> (63 - msb)) & (~ULL(0) << lsb)) > + > +/* > + * Define a mask of a single set bit `b`. > + * > + * For example: > + * - BIT(63) is 0x8000000000000000 > + * - BIT(0) is 0x0000000000000001 > + * - BIT(32) is 0x0000000100000000 > + */ > +#define BIT(b) BITS(b, b) > + > +/* > + * Find the least significant set bit in the contiguous set of bits in `mask`. > + * > + * For example: > + * - BITS_LSB(0x0000000000000001) is 0 > + * - BITS_LSB(0x000000000000ff00) is 8 > + * - BITS_LSB(0x8000000000000000) is 63 > + */ > +#define BITS_LSB(mask) (__builtin_ffsll(mask) - 1) > + > +/* > + * Extract a bit-field out of `val` described by the contiguous set of bits in > + * `mask`. > + * > + * For example: > + * - BITS_EXTRACT(0xABCD, BITS(15, 12)) is 0xA > + * - BITS_EXTRACT(0xABCD, BITS(11, 8)) is 0xB > + * - BITS_EXTRACT(0xABCD, BIT(7)) is 0x1 > + */ > +#define BITS_EXTRACT(val, mask) \ > + (((val) & (mask)) >> BITS_LSB(mask)) > + > +/* > + * Insert the least significant bits of `val` into the bit-field described by > + * the contiguous set of bits in `mask`. > + * > + * For example: > + * - BITS_INSERT(BITS(3, 0), 0xA) is 0x000A > + * - BITS_INSERT(BITS(15, 12), 0xA) is 0xA000 > + * - BITS_INSERT(BIT(15), 0xF) is 0x1000 * - BITS_INSERT(BIT(35), 0x1) is 0x0 ... which might be surprising! of course BITS_INSERT(BIT(35), ULL(0x1)) works, but I feel either the description above needs to signpost this gotcha, or a cast is needed below. AFAICT this macro isn't actually used in your series. Steve > + * > + */ > +#define BITS_INSERT(mask, val) \ > + (((val) << BITS_LSB(mask)) & (mask)) > + > +#endif > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel