From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org>, patches@linaro.org
Subject: Re: [Qemu-devel] [PATCH 19/22] hw/ssi/pl022: Correct wrong value for PL022_INT_RT
Date: Thu, 23 Aug 2018 10:33:27 -0700 [thread overview]
Message-ID: <25543a01-8243-1389-3650-d3bd03fa16b5@linaro.org> (raw)
In-Reply-To: <20180820141116.9118-20-peter.maydell@linaro.org>
On 08/20/2018 07:11 AM, Peter Maydell wrote:
> The PL022 interrupt registers have bits allocated as:
> 0: ROR (receive overrun)
> 1: RT (receive timeout)
> 2: RX (receive FIFO half full or less)
> 3: TX (transmit FIFO half full or less)
>
> A cut and paste error meant we had the wrong value for
> the PL022_INT_RT constant. This bug doesn't affect device
> behaviour, because we don't implmenet the receive timeout
implement.
> feature and so never set that interrupt bit.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> hw/ssi/pl022.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2018-08-23 17:33 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-20 14:10 [Qemu-devel] [PATCH 00/22] MPS devices: FPGAIO, timer, watchdogs, MSC, DMA, SPI Peter Maydell
2018-08-20 14:10 ` [Qemu-devel] [PATCH 01/22] hw/misc/mps2-fpgaio: Implement 1Hz and 100Hz counters Peter Maydell
2018-08-21 18:34 ` Richard Henderson
2018-08-20 14:10 ` [Qemu-devel] [PATCH 02/22] hw/misc/mps2-fpgaio: Implement PSCNTR and COUNTER Peter Maydell
2018-08-23 13:31 ` Richard Henderson
2018-08-20 14:10 ` [Qemu-devel] [PATCH 03/22] hw/timer/cmsdk-apb-dualtimer: Implement CMSDK dual timer module Peter Maydell
2018-08-23 14:08 ` Richard Henderson
2018-08-20 14:10 ` [Qemu-devel] [PATCH 04/22] hw/arm/iotkit: Wire up the dualtimer Peter Maydell
2018-08-21 6:41 ` Philippe Mathieu-Daudé
2018-08-23 14:09 ` Richard Henderson
2018-08-20 14:10 ` [Qemu-devel] [PATCH 05/22] hw/arm/mps2: Wire up dual-timer in mps2-an385 and mps2-an511 Peter Maydell
2018-08-21 6:43 ` [Qemu-devel] [Qemu-arm] " Philippe Mathieu-Daudé
2018-08-23 14:11 ` [Qemu-devel] " Richard Henderson
2018-08-20 14:11 ` [Qemu-devel] [PATCH 06/22] hw/arm/iotkit: Wire up the watchdogs Peter Maydell
2018-08-23 14:17 ` Richard Henderson
2018-08-20 14:11 ` [Qemu-devel] [PATCH 07/22] hw/arm/iotkit: Wire up the S32KTIMER Peter Maydell
2018-08-23 14:18 ` Richard Henderson
2018-08-20 14:11 ` [Qemu-devel] [PATCH 08/22] hw/misc/iotkit-sysctl: Implement IoTKit system control element Peter Maydell
2018-08-23 14:24 ` Richard Henderson
2018-08-20 14:11 ` [Qemu-devel] [PATCH 09/22] hw/misc/iotkit-sysinfo: Implement IoTKit system information block Peter Maydell
2018-08-21 6:45 ` Philippe Mathieu-Daudé
2018-08-23 14:28 ` Richard Henderson
2018-08-20 14:11 ` [Qemu-devel] [PATCH 10/22] hw/misc/iotkit: Wire up the sysctl and sysinfo register blocks Peter Maydell
2018-08-21 6:47 ` Philippe Mathieu-Daudé
2018-08-23 14:29 ` Richard Henderson
2018-08-20 14:11 ` [Qemu-devel] [PATCH 11/22] hw/misc/tz-msc: Model TrustZone Master Security Controller Peter Maydell
2018-08-23 17:18 ` Richard Henderson
2018-08-20 14:11 ` [Qemu-devel] [PATCH 12/22] hw/misc/iotkit-secctl: Wire up registers for controlling MSCs Peter Maydell
2018-08-23 17:21 ` Richard Henderson
2018-08-23 17:25 ` Peter Maydell
2018-08-20 14:11 ` [Qemu-devel] [PATCH 13/22] hw/arm/iotkit: Wire up the lines for MSCs Peter Maydell
2018-08-23 17:23 ` Richard Henderson
2018-08-20 14:11 ` [Qemu-devel] [PATCH 14/22] hw/arm/mps2-tz: Create PL081s and MSCs Peter Maydell
2018-08-23 17:27 ` Richard Henderson
2018-08-20 14:11 ` [Qemu-devel] [PATCH 15/22] hw/ssi/pl022: Allow use as embedded-struct device Peter Maydell
2018-08-21 6:48 ` Philippe Mathieu-Daudé
2018-08-23 17:29 ` Richard Henderson
2018-08-20 14:11 ` [Qemu-devel] [PATCH 16/22] hw/ssi/pl022: Set up reset function in class init Peter Maydell
2018-08-21 6:49 ` Philippe Mathieu-Daudé
2018-08-23 17:29 ` Richard Henderson
2018-08-20 14:11 ` [Qemu-devel] [PATCH 17/22] hw/ssi/pl022: Don't directly call vmstate_register() Peter Maydell
2018-08-23 17:30 ` Richard Henderson
2018-08-20 14:11 ` [Qemu-devel] [PATCH 18/22] hw/ssi/pl022: Use DeviceState::realize rather than SysBusDevice::init Peter Maydell
2018-08-21 6:53 ` Philippe Mathieu-Daudé
2018-08-23 10:11 ` Peter Maydell
2018-08-23 17:31 ` Richard Henderson
2018-08-20 14:11 ` [Qemu-devel] [PATCH 19/22] hw/ssi/pl022: Correct wrong value for PL022_INT_RT Peter Maydell
2018-08-23 17:33 ` Richard Henderson [this message]
2018-08-20 14:11 ` [Qemu-devel] [PATCH 20/22] hw/ssi/pl022: Correct wrong DMACR and ICR handling Peter Maydell
2018-08-23 17:38 ` Richard Henderson
2018-08-20 14:11 ` [Qemu-devel] [PATCH 21/22] hw/arm/mps2-tz: Instantiate SPI controllers Peter Maydell
2018-08-23 17:39 ` Richard Henderson
2018-08-20 14:11 ` [Qemu-devel] [PATCH 22/22] hw/arm/mps2-tz: Fix MPS2 SCC config register values Peter Maydell
2018-08-23 17:42 ` Richard Henderson
2018-08-23 17:45 ` Peter Maydell
2018-08-23 17:46 ` Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=25543a01-8243-1389-3650-d3bd03fa16b5@linaro.org \
--to=richard.henderson@linaro.org \
--cc=f4bug@amsat.org \
--cc=patches@linaro.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.