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From: Julien Grall <julien@xen.org>
To: "Roger Pau Monné" <roger.pau@citrix.com>
Cc: Rahul Singh <rahul.singh@arm.com>,
	xen-devel@lists.xenproject.org, bertrand.marquis@arm.com,
	Jan Beulich <jbeulich@suse.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>, Wei Liu <wl@xen.org>,
	George Dunlap <george.dunlap@citrix.com>,
	Ian Jackson <iwj@xenproject.org>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Paul Durrant <paul@xen.org>,
	Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>,
	Daniel De Graaf <dgdegra@tycho.nsa.gov>
Subject: Re: [PATCH v2] xen/pci: Refactor PCI MSI interrupts related code
Date: Wed, 14 Apr 2021 09:49:37 +0100	[thread overview]
Message-ID: <258c91c7-e733-3c40-5e4e-7b107e4d20c3@xen.org> (raw)
In-Reply-To: <YHaiW4xX0p6ov2Z9@Air-de-Roger>

Hi Roger,

On 14/04/2021 09:05, Roger Pau Monné wrote:
> On Tue, Apr 13, 2021 at 06:12:10PM +0100, Julien Grall wrote:
>> Hi Roger,
>>
>> On 12/04/2021 11:49, Roger Pau Monné wrote:
>>> On Fri, Apr 09, 2021 at 05:00:41PM +0100, Rahul Singh wrote:
>>>> diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c
>>>> index 705137f8be..1b473502a1 100644
>>>> --- a/xen/drivers/passthrough/pci.c
>>>> +++ b/xen/drivers/passthrough/pci.c
>>>> @@ -1303,12 +1279,15 @@ static int __init setup_dump_pcidevs(void)
>>>>    }
>>>>    __initcall(setup_dump_pcidevs);
>>>> +
>>>> +#ifdef CONFIG_PCI_MSI_INTERCEPT
>>>>    int iommu_update_ire_from_msi(
>>>>        struct msi_desc *msi_desc, struct msi_msg *msg)
>>>>    {
>>>>        return iommu_intremap
>>>>               ? iommu_call(&iommu_ops, update_ire_from_msi, msi_desc, msg) : 0;
>>>>    }
>>>> +#endif
>>>
>>> This is not exactly related to MSI intercepts, the IOMMU interrupt
>>> remapping table will also be used for interrupt entries for devices
>>> being used by Xen directly, where no intercept is required.
>>
>> On Arm, this is not tie to the IOMMU. Instead, this handled is a separate
>> MSI controller (such as the ITS).
>>
>>>
>>> And then you also want to gate the hook from iommu_ops itself with
>>> CONFIG_PCI_MSI_INTERCEPT, if we want to got this route.
>>
>>
>> All the callers are in the x86 code. So how about moving the function in an
>> x86 specific file?
> 
> Yes, that seems fine. Just place it in asm-x86/iommu.h. I wonder why
> update_ire_from_msi wasn't moved when the rest of the x86 specific
> functions where moved there.

I am guessing it is because the function was protected by CONFIG_HAS_PCI 
rather than CONFIG_X86. So it was deferred until another arch enables 
CONFIG_HAS_PCI (it is easier to know what code should be moved).

> Was there an aim to use that in other
> arches?

In the future we may need to use MSIs in Xen (IIRC some SMMUs only 
support MSI interrupt). But I think the naming would be misleading as 
the IOMMU will not be used for the remapping.

So most likely, we would want a more generic name (maybe 
"arch_register_msi()"). This could call iommu_update_ire_from_msi() on 
x86 and the ITS on Arm.

I don't know how RISCv and PowerPC remap the interrupt. But if they are 
using the IOMMU then we could provide a generic helper protected by 
CONFIG_HAS_IOMMU_INTERRUPT_REMAP (or a similar name).

> 
> The hook in iommu_ops also need to be moved inside the x86 region.
> Please do this iommu change in a separate patch.

+1

Cheers,

-- 
Julien Grall


  reply	other threads:[~2021-04-14  8:49 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-09 16:00 [PATCH v2] xen/pci: Refactor PCI MSI interrupts related code Rahul Singh
2021-04-12 10:49 ` Roger Pau Monné
2021-04-12 11:28   ` Jan Beulich
2021-04-12 18:26     ` Rahul Singh
2021-04-12 16:28   ` Rahul Singh
2021-04-13 17:12   ` Julien Grall
2021-04-14  7:08     ` Jan Beulich
2021-04-14  8:28       ` Roger Pau Monné
2021-04-14  8:47         ` Jan Beulich
2021-04-14  8:28       ` Julien Grall
2021-04-14  8:05     ` Roger Pau Monné
2021-04-14  8:49       ` Julien Grall [this message]
2021-04-15 13:26         ` Roger Pau Monné
2021-04-15 13:31           ` Julien Grall
2021-04-19  7:16             ` Rahul Singh
2021-04-19  8:40               ` Roger Pau Monné
2021-04-19 11:16                 ` Jan Beulich
2021-04-19 11:54                   ` Julien Grall
2021-04-19 12:33                     ` Jan Beulich
2021-04-20 13:45                       ` Rahul Singh
2021-04-20 15:36                         ` Jan Beulich
2021-04-21  8:07                           ` Rahul Singh
2021-04-21  8:16                             ` Roger Pau Monné
2021-04-21  9:15                               ` Rahul Singh
2021-04-21  9:33                                 ` Jan Beulich
2021-04-21 11:55                                   ` Rahul Singh
2021-04-21  9:32                               ` Jan Beulich
2021-04-21  9:01                             ` Jan Beulich

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