All of lore.kernel.org
 help / color / mirror / Atom feed
From: AngeloGioacchino Del Regno  <angelogioacchino.delregno@somainline.org>
To: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Cc: MSM <linux-arm-msm@vger.kernel.org>,
	konrad.dybcio@somainline.org, marijn.suijten@somainline.org,
	martin.botka@somainline.org, phone-devel@vger.kernel.org,
	lkml <linux-kernel@vger.kernel.org>,
	Andy Gross <agross@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	linux-clk@vger.kernel.org, DTML <devicetree@vger.kernel.org>
Subject: Re: [PATCH v2 05/11] clk: qcom: gcc-msm8998: Mark gpu_cfg_ahb_clk as critical
Date: Fri, 15 Jan 2021 00:05:45 +0100	[thread overview]
Message-ID: <25d40e7d-fbd6-697f-7d4d-a7233aeb652c@somainline.org> (raw)
In-Reply-To: <CAOCk7NoVts21FjhhLtZp-0Xdw6-BnrKio_-tuZBRsgapsUdwfw@mail.gmail.com>

Il 14/01/21 23:37, Jeffrey Hugo ha scritto:
> On Thu, Jan 14, 2021 at 3:13 PM AngeloGioacchino Del Regno
> <angelogioacchino.delregno@somainline.org> wrote:
>>
>> The GPU IOMMU depends on this clock and the hypervisor will crash
>> the SoC if this clock gets disabled because the secure contexts
>> that have been set on this IOMMU by the bootloader will become
>> unaccessible (or they get reset).
>> Mark this clock as critical to avoid this issue when the Adreno
>> GPU is enabled.
>>
> 
> You should go review the last attempt to do this -
> https://lkml.org/lkml/2019/12/17/881
> 

Thanks for the tip, but unfortunately this isn't possible on the 
gpu_cfg_ahb_clk, as it is also needed for the Adreno IOMMU, which has 
secure contexts that are set up from one of the bootloader stages and if 
you reset/"mess up" one of them (by - in this case - un-clocking the 
MMU), then the hypervisor will kick in and generate a fault, rebooting 
the SoC.

Of course, this scenario is for the case in which you want to boot the 
device without any gpucc nor any runtime pm user of that.. and the 
aforementioned issue makes that solution not really usable.

Again, unfortunately.

  reply	other threads:[~2021-01-14 23:06 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-14 22:10 [PATCH v2 00/11] Clock fixes for MSM8998 GCC, MMCC, GPUCC AngeloGioacchino Del Regno
2021-01-14 22:10 ` [PATCH v2 01/11] dt-bindings: clocks: gcc-msm8998: Add GCC_MMSS_GPLL0_CLK definition AngeloGioacchino Del Regno
2021-02-08 18:19   ` Stephen Boyd
2021-01-14 22:10 ` [PATCH v2 02/11] clk: qcom: gcc-msm8998: Wire up gcc_mmss_gpll0 clock AngeloGioacchino Del Regno
2021-02-08 18:19   ` Stephen Boyd
2021-01-14 22:10 ` [PATCH v2 03/11] dt-bindings: clock: gcc-msm8998: Add HMSS_GPLL0_CLK_SRC definition AngeloGioacchino Del Regno
2021-02-08 18:19   ` Stephen Boyd
2021-01-14 22:10 ` [PATCH v2 04/11] clk: qcom: gcc-msm8998: Add missing hmss_gpll0_clk_src clock AngeloGioacchino Del Regno
2021-02-08 18:19   ` Stephen Boyd
2021-01-14 22:10 ` [PATCH v2 05/11] clk: qcom: gcc-msm8998: Mark gpu_cfg_ahb_clk as critical AngeloGioacchino Del Regno
2021-01-14 22:37   ` Jeffrey Hugo
2021-01-14 23:05     ` AngeloGioacchino Del Regno [this message]
2021-01-15  0:09       ` Jeffrey Hugo
2021-02-08 18:18   ` Stephen Boyd
2021-02-09 13:20     ` AngeloGioacchino Del Regno
2021-02-08 18:19   ` Stephen Boyd
2021-01-14 22:10 ` [PATCH v2 06/11] clk: qcom: gcc-msm8998: Fix Alpha PLL type for all GPLLs AngeloGioacchino Del Regno
2021-02-08 18:19   ` Stephen Boyd
2021-01-14 22:10 ` [PATCH v2 07/11] clk: qcom: mmcc-msm8998: Set CLK_GET_RATE_NOCACHE to pixel/byte clks AngeloGioacchino Del Regno
2021-02-08 18:20   ` Stephen Boyd
2021-02-08 18:21   ` Stephen Boyd
2021-02-09 13:19     ` AngeloGioacchino Del Regno
2021-01-14 22:10 ` [PATCH v2 08/11] clk: qcom: mmcc-msm8998: Add hardware clockgating registers to some clks AngeloGioacchino Del Regno
2021-02-08 18:21   ` Stephen Boyd
2021-01-14 22:10 ` [PATCH v2 09/11] clk: qcom: mmcc-msm8998: Set bimc_smmu_gdsc always on AngeloGioacchino Del Regno
2021-02-08 18:22   ` Stephen Boyd
2021-01-14 22:10 ` [PATCH v2 10/11] clk: qcom: gpucc-msm8998: Add resets, cxc, fix flags on gpu_gx_gdsc AngeloGioacchino Del Regno
2021-02-08 18:22   ` Stephen Boyd
2021-01-14 22:10 ` [PATCH v2 11/11] clk: qcom: gpucc-msm8998: Allow fabia gpupll0 rate setting AngeloGioacchino Del Regno
2021-02-08 18:22   ` Stephen Boyd
2021-02-08 18:24   ` Stephen Boyd
2021-02-09 13:18     ` AngeloGioacchino Del Regno
2021-01-14 22:12 ` [PATCH v2 00/11] Clock fixes for MSM8998 GCC, MMCC, GPUCC AngeloGioacchino Del Regno
2021-01-30 17:21 ` Konrad Dybcio

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=25d40e7d-fbd6-697f-7d4d-a7233aeb652c@somainline.org \
    --to=angelogioacchino.delregno@somainline.org \
    --cc=agross@kernel.org \
    --cc=bjorn.andersson@linaro.org \
    --cc=devicetree@vger.kernel.org \
    --cc=jeffrey.l.hugo@gmail.com \
    --cc=konrad.dybcio@somainline.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=marijn.suijten@somainline.org \
    --cc=martin.botka@somainline.org \
    --cc=mturquette@baylibre.com \
    --cc=phone-devel@vger.kernel.org \
    --cc=robh+dt@kernel.org \
    --cc=sboyd@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.